entry-intc.S 1.6 KB

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  1. /*
  2. * ARM Interrupt demux handler using INTC
  3. *
  4. * Copyright (C) 2010 Magnus Damm
  5. * Copyright (C) 2008 Renesas Solutions Corp.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <asm/entry-macro-multi.S>
  12. #define INTCA_BASE 0xe6980000
  13. #define INTFLGA_OFFS 0x00000018 /* accept pending interrupt */
  14. #define INTEVTA_OFFS 0x00000020 /* vector number of accepted interrupt */
  15. #define INTLVLA_OFFS 0x00000030 /* priority level of accepted interrupt */
  16. #define INTLVLB_OFFS 0x00000034 /* previous priority level */
  17. .macro get_irqnr_preamble, base, tmp
  18. ldr \base, =INTCA_BASE
  19. .endm
  20. .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
  21. /* The single INTFLGA read access below results in the following:
  22. *
  23. * 1. INTLVLB is updated with old priority value from INTLVLA
  24. * 2. Highest priority interrupt is accepted
  25. * 3. INTLVLA is updated to contain priority of accepted interrupt
  26. * 4. Accepted interrupt vector is stored in INTFLGA and INTEVTA
  27. */
  28. ldr \irqnr, [\base, #INTFLGA_OFFS]
  29. /* Restore INTLVLA with the value saved in INTLVLB.
  30. * This is required to support interrupt priorities properly.
  31. */
  32. ldrb \tmp, [\base, #INTLVLB_OFFS]
  33. strb \tmp, [\base, #INTLVLA_OFFS]
  34. /* Handle invalid vector number case */
  35. cmp \irqnr, #0
  36. beq 1000f
  37. /* Convert vector to irq number, same as the evt2irq() macro */
  38. lsr \irqnr, \irqnr, #0x5
  39. subs \irqnr, \irqnr, #16
  40. 1000:
  41. .endm
  42. .macro test_for_ipi, irqnr, irqstat, base, tmp
  43. .endm
  44. arch_irq_handler shmobile_handle_irq_intc