io.h 5.9 KB

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  1. /*
  2. * arch/arm/mach-s3c2410/include/mach/io.h
  3. * from arch/arm/mach-rpc/include/mach/io.h
  4. *
  5. * Copyright (C) 1997 Russell King
  6. * (C) 2003 Simtec Electronics
  7. */
  8. #ifndef __ASM_ARM_ARCH_IO_H
  9. #define __ASM_ARM_ARCH_IO_H
  10. #include <mach/hardware.h>
  11. #define IO_SPACE_LIMIT 0xffffffff
  12. /*
  13. * We use two different types of addressing - PC style addresses, and ARM
  14. * addresses. PC style accesses the PC hardware with the normal PC IO
  15. * addresses, eg 0x3f8 for serial#1. ARM addresses are above A28
  16. * and are translated to the start of IO. Note that all addresses are
  17. * not shifted left!
  18. */
  19. #define __PORT_PCIO(x) ((x) < (1<<28))
  20. #define PCIO_BASE (S3C24XX_VA_ISA_WORD)
  21. #define PCIO_BASE_b (S3C24XX_VA_ISA_BYTE)
  22. #define PCIO_BASE_w (S3C24XX_VA_ISA_WORD)
  23. #define PCIO_BASE_l (S3C24XX_VA_ISA_WORD)
  24. /*
  25. * Dynamic IO functions - let the compiler
  26. * optimize the expressions
  27. */
  28. #define DECLARE_DYN_OUT(sz,fnsuffix,instr) \
  29. static inline void __out##fnsuffix (unsigned int val, unsigned int port) \
  30. { \
  31. unsigned long temp; \
  32. __asm__ __volatile__( \
  33. "cmp %2, #(1<<28)\n\t" \
  34. "mov %0, %2\n\t" \
  35. "addcc %0, %0, %3\n\t" \
  36. "str" instr " %1, [%0, #0 ] @ out" #fnsuffix \
  37. : "=&r" (temp) \
  38. : "r" (val), "r" (port), "Ir" (PCIO_BASE_##fnsuffix) \
  39. : "cc"); \
  40. }
  41. #define DECLARE_DYN_IN(sz,fnsuffix,instr) \
  42. static inline unsigned sz __in##fnsuffix (unsigned int port) \
  43. { \
  44. unsigned long temp, value; \
  45. __asm__ __volatile__( \
  46. "cmp %2, #(1<<28)\n\t" \
  47. "mov %0, %2\n\t" \
  48. "addcc %0, %0, %3\n\t" \
  49. "ldr" instr " %1, [%0, #0 ] @ in" #fnsuffix \
  50. : "=&r" (temp), "=r" (value) \
  51. : "r" (port), "Ir" (PCIO_BASE_##fnsuffix) \
  52. : "cc"); \
  53. return (unsigned sz)value; \
  54. }
  55. static inline void __iomem *__ioaddr (unsigned long port)
  56. {
  57. return __PORT_PCIO(port) ? (PCIO_BASE + port) : (void __iomem *)port;
  58. }
  59. #define DECLARE_IO(sz,fnsuffix,instr) \
  60. DECLARE_DYN_IN(sz,fnsuffix,instr) \
  61. DECLARE_DYN_OUT(sz,fnsuffix,instr)
  62. DECLARE_IO(char,b,"b")
  63. DECLARE_IO(short,w,"h")
  64. DECLARE_IO(int,l,"")
  65. #undef DECLARE_IO
  66. #undef DECLARE_DYN_IN
  67. /*
  68. * Constant address IO functions
  69. *
  70. * These have to be macros for the 'J' constraint to work -
  71. * +/-4096 immediate operand.
  72. */
  73. #define __outbc(value,port) \
  74. ({ \
  75. if (__PORT_PCIO((port))) \
  76. __asm__ __volatile__( \
  77. "strb %0, [%1, %2] @ outbc" \
  78. : : "r" (value), "r" (PCIO_BASE), "Jr" ((port))); \
  79. else \
  80. __asm__ __volatile__( \
  81. "strb %0, [%1, #0] @ outbc" \
  82. : : "r" (value), "r" ((port))); \
  83. })
  84. #define __inbc(port) \
  85. ({ \
  86. unsigned char result; \
  87. if (__PORT_PCIO((port))) \
  88. __asm__ __volatile__( \
  89. "ldrb %0, [%1, %2] @ inbc" \
  90. : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port))); \
  91. else \
  92. __asm__ __volatile__( \
  93. "ldrb %0, [%1, #0] @ inbc" \
  94. : "=r" (result) : "r" ((port))); \
  95. result; \
  96. })
  97. #define __outwc(value,port) \
  98. ({ \
  99. unsigned long v = value; \
  100. if (__PORT_PCIO((port))) { \
  101. if ((port) < 256 && (port) > -256) \
  102. __asm__ __volatile__( \
  103. "strh %0, [%1, %2] @ outwc" \
  104. : : "r" (v), "r" (PCIO_BASE), "Jr" ((port))); \
  105. else if ((port) > 0) \
  106. __asm__ __volatile__( \
  107. "strh %0, [%1, %2] @ outwc" \
  108. : : "r" (v), \
  109. "r" (PCIO_BASE + ((port) & ~0xff)), \
  110. "Jr" (((port) & 0xff))); \
  111. else \
  112. __asm__ __volatile__( \
  113. "strh %0, [%1, #0] @ outwc" \
  114. : : "r" (v), \
  115. "r" (PCIO_BASE + (port))); \
  116. } else \
  117. __asm__ __volatile__( \
  118. "strh %0, [%1, #0] @ outwc" \
  119. : : "r" (v), "r" ((port))); \
  120. })
  121. #define __inwc(port) \
  122. ({ \
  123. unsigned short result; \
  124. if (__PORT_PCIO((port))) { \
  125. if ((port) < 256 && (port) > -256 ) \
  126. __asm__ __volatile__( \
  127. "ldrh %0, [%1, %2] @ inwc" \
  128. : "=r" (result) \
  129. : "r" (PCIO_BASE), \
  130. "Jr" ((port))); \
  131. else if ((port) > 0) \
  132. __asm__ __volatile__( \
  133. "ldrh %0, [%1, %2] @ inwc" \
  134. : "=r" (result) \
  135. : "r" (PCIO_BASE + ((port) & ~0xff)), \
  136. "Jr" (((port) & 0xff))); \
  137. else \
  138. __asm__ __volatile__( \
  139. "ldrh %0, [%1, #0] @ inwc" \
  140. : "=r" (result) \
  141. : "r" (PCIO_BASE + ((port)))); \
  142. } else \
  143. __asm__ __volatile__( \
  144. "ldrh %0, [%1, #0] @ inwc" \
  145. : "=r" (result) : "r" ((port))); \
  146. result; \
  147. })
  148. #define __outlc(value,port) \
  149. ({ \
  150. unsigned long v = value; \
  151. if (__PORT_PCIO((port))) \
  152. __asm__ __volatile__( \
  153. "str %0, [%1, %2] @ outlc" \
  154. : : "r" (v), "r" (PCIO_BASE), "Jr" ((port))); \
  155. else \
  156. __asm__ __volatile__( \
  157. "str %0, [%1, #0] @ outlc" \
  158. : : "r" (v), "r" ((port))); \
  159. })
  160. #define __inlc(port) \
  161. ({ \
  162. unsigned long result; \
  163. if (__PORT_PCIO((port))) \
  164. __asm__ __volatile__( \
  165. "ldr %0, [%1, %2] @ inlc" \
  166. : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port))); \
  167. else \
  168. __asm__ __volatile__( \
  169. "ldr %0, [%1, #0] @ inlc" \
  170. : "=r" (result) : "r" ((port))); \
  171. result; \
  172. })
  173. #define __ioaddrc(port) ((__PORT_PCIO(port) ? PCIO_BASE + (port) : (void __iomem *)(port)))
  174. #define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p))
  175. #define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p))
  176. #define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p))
  177. #define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
  178. #define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
  179. #define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
  180. #define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p))
  181. #define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l)
  182. #define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l)
  183. #define insl(p,d,l) __raw_readsl(__ioaddr(p),d,l)
  184. #define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l)
  185. #define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l)
  186. #define outsl(p,d,l) __raw_writesl(__ioaddr(p),d,l)
  187. #endif