dma-s3c2410.c 4.5 KB

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  1. /* linux/arch/arm/mach-s3c2410/dma.c
  2. *
  3. * Copyright (c) 2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2410 DMA selection
  7. *
  8. * http://armlinux.simtec.co.uk/
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/device.h>
  17. #include <linux/serial_core.h>
  18. #include <mach/map.h>
  19. #include <mach/dma.h>
  20. #include <plat/cpu.h>
  21. #include <plat/dma-s3c24xx.h>
  22. #include <plat/regs-serial.h>
  23. #include <mach/regs-gpio.h>
  24. #include <plat/regs-ac97.h>
  25. #include <plat/regs-dma.h>
  26. #include <mach/regs-mem.h>
  27. #include <mach/regs-lcd.h>
  28. #include <mach/regs-sdi.h>
  29. #include <plat/regs-iis.h>
  30. #include <plat/regs-spi.h>
  31. static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
  32. [DMACH_XD0] = {
  33. .name = "xdreq0",
  34. .channels[0] = S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID,
  35. },
  36. [DMACH_XD1] = {
  37. .name = "xdreq1",
  38. .channels[1] = S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID,
  39. },
  40. [DMACH_SDI] = {
  41. .name = "sdi",
  42. .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
  43. .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
  44. .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
  45. },
  46. [DMACH_SPI0] = {
  47. .name = "spi0",
  48. .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
  49. },
  50. [DMACH_SPI1] = {
  51. .name = "spi1",
  52. .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
  53. },
  54. [DMACH_UART0] = {
  55. .name = "uart0",
  56. .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
  57. },
  58. [DMACH_UART1] = {
  59. .name = "uart1",
  60. .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
  61. },
  62. [DMACH_UART2] = {
  63. .name = "uart2",
  64. .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
  65. },
  66. [DMACH_TIMER] = {
  67. .name = "timer",
  68. .channels[0] = S3C2410_DCON_CH0_TIMER | DMA_CH_VALID,
  69. .channels[2] = S3C2410_DCON_CH2_TIMER | DMA_CH_VALID,
  70. .channels[3] = S3C2410_DCON_CH3_TIMER | DMA_CH_VALID,
  71. },
  72. [DMACH_I2S_IN] = {
  73. .name = "i2s-sdi",
  74. .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
  75. .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
  76. },
  77. [DMACH_I2S_OUT] = {
  78. .name = "i2s-sdo",
  79. .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
  80. },
  81. [DMACH_USB_EP1] = {
  82. .name = "usb-ep1",
  83. .channels[0] = S3C2410_DCON_CH0_USBEP1 | DMA_CH_VALID,
  84. },
  85. [DMACH_USB_EP2] = {
  86. .name = "usb-ep2",
  87. .channels[1] = S3C2410_DCON_CH1_USBEP2 | DMA_CH_VALID,
  88. },
  89. [DMACH_USB_EP3] = {
  90. .name = "usb-ep3",
  91. .channels[2] = S3C2410_DCON_CH2_USBEP3 | DMA_CH_VALID,
  92. },
  93. [DMACH_USB_EP4] = {
  94. .name = "usb-ep4",
  95. .channels[3] =S3C2410_DCON_CH3_USBEP4 | DMA_CH_VALID,
  96. },
  97. };
  98. static void s3c2410_dma_select(struct s3c2410_dma_chan *chan,
  99. struct s3c24xx_dma_map *map)
  100. {
  101. chan->dcon = map->channels[chan->number] & ~DMA_CH_VALID;
  102. }
  103. static struct s3c24xx_dma_selection __initdata s3c2410_dma_sel = {
  104. .select = s3c2410_dma_select,
  105. .dcon_mask = 7 << 24,
  106. .map = s3c2410_dma_mappings,
  107. .map_size = ARRAY_SIZE(s3c2410_dma_mappings),
  108. };
  109. static struct s3c24xx_dma_order __initdata s3c2410_dma_order = {
  110. .channels = {
  111. [DMACH_SDI] = {
  112. .list = {
  113. [0] = 3 | DMA_CH_VALID,
  114. [1] = 2 | DMA_CH_VALID,
  115. [2] = 0 | DMA_CH_VALID,
  116. },
  117. },
  118. [DMACH_I2S_IN] = {
  119. .list = {
  120. [0] = 1 | DMA_CH_VALID,
  121. [1] = 2 | DMA_CH_VALID,
  122. },
  123. },
  124. },
  125. };
  126. static int __init s3c2410_dma_add(struct device *dev,
  127. struct subsys_interface *sif)
  128. {
  129. s3c2410_dma_init();
  130. s3c24xx_dma_order_set(&s3c2410_dma_order);
  131. return s3c24xx_dma_init_map(&s3c2410_dma_sel);
  132. }
  133. #if defined(CONFIG_CPU_S3C2410)
  134. static struct subsys_interface s3c2410_dma_interface = {
  135. .name = "s3c2410_dma",
  136. .subsys = &s3c2410_subsys,
  137. .add_dev = s3c2410_dma_add,
  138. };
  139. static int __init s3c2410_dma_drvinit(void)
  140. {
  141. return subsys_interface_register(&s3c2410_dma_interface);
  142. }
  143. arch_initcall(s3c2410_dma_drvinit);
  144. static struct subsys_interface s3c2410a_dma_interface = {
  145. .name = "s3c2410a_dma",
  146. .subsys = &s3c2410a_subsys,
  147. .add_dev = s3c2410_dma_add,
  148. };
  149. static int __init s3c2410a_dma_drvinit(void)
  150. {
  151. return subsys_interface_register(&s3c2410a_dma_interface);
  152. }
  153. arch_initcall(s3c2410a_dma_drvinit);
  154. #endif
  155. #if defined(CONFIG_CPU_S3C2442)
  156. /* S3C2442 DMA contains the same selection table as the S3C2410 */
  157. static struct subsys_interface s3c2442_dma_interface = {
  158. .name = "s3c2442_dma",
  159. .subsys = &s3c2442_subsys,
  160. .add_dev = s3c2410_dma_add,
  161. };
  162. static int __init s3c2442_dma_drvinit(void)
  163. {
  164. return subsys_interface_register(&s3c2442_dma_interface);
  165. }
  166. arch_initcall(s3c2442_dma_drvinit);
  167. #endif