iq81340sc.c 2.6 KB

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  1. /*
  2. * iq81340sc board support
  3. * Copyright (c) 2005-2006, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
  16. * Place - Suite 330, Boston, MA 02111-1307 USA.
  17. *
  18. */
  19. #include <linux/pci.h>
  20. #include <mach/hardware.h>
  21. #include <asm/irq.h>
  22. #include <asm/mach/pci.h>
  23. #include <asm/mach-types.h>
  24. #include <asm/mach/arch.h>
  25. #include <mach/pci.h>
  26. #include <asm/mach/time.h>
  27. #include <mach/time.h>
  28. extern int init_atu;
  29. static int __init
  30. iq81340sc_atux_map_irq(struct pci_dev *dev, u8 idsel, u8 pin)
  31. {
  32. WARN_ON(idsel < 1 || idsel > 2);
  33. switch (idsel) {
  34. case 1:
  35. switch (pin) {
  36. case 1: return ATUX_INTB;
  37. case 2: return ATUX_INTC;
  38. case 3: return ATUX_INTD;
  39. case 4: return ATUX_INTA;
  40. default: return -1;
  41. }
  42. case 2:
  43. switch (pin) {
  44. case 1: return ATUX_INTC;
  45. case 2: return ATUX_INTC;
  46. case 3: return ATUX_INTC;
  47. case 4: return ATUX_INTC;
  48. default: return -1;
  49. }
  50. default: return -1;
  51. }
  52. }
  53. static struct hw_pci iq81340sc_pci __initdata = {
  54. .swizzle = pci_std_swizzle,
  55. .nr_controllers = 0,
  56. .setup = iop13xx_pci_setup,
  57. .scan = iop13xx_scan_bus,
  58. .map_irq = iq81340sc_atux_map_irq,
  59. .preinit = iop13xx_pci_init
  60. };
  61. static int __init iq81340sc_pci_init(void)
  62. {
  63. iop13xx_atu_select(&iq81340sc_pci);
  64. pci_common_init(&iq81340sc_pci);
  65. iop13xx_map_pci_memory();
  66. return 0;
  67. }
  68. static void __init iq81340sc_init(void)
  69. {
  70. iop13xx_platform_init();
  71. iq81340sc_pci_init();
  72. iop13xx_add_tpmi_devices();
  73. }
  74. static void __init iq81340sc_timer_init(void)
  75. {
  76. unsigned long bus_freq = iop13xx_core_freq() / iop13xx_xsi_bus_ratio();
  77. printk(KERN_DEBUG "%s: bus frequency: %lu\n", __func__, bus_freq);
  78. iop_init_time(bus_freq);
  79. }
  80. static struct sys_timer iq81340sc_timer = {
  81. .init = iq81340sc_timer_init,
  82. };
  83. MACHINE_START(IQ81340SC, "Intel IQ81340SC")
  84. /* Maintainer: Dan Williams <dan.j.williams@intel.com> */
  85. .atag_offset = 0x100,
  86. .init_early = iop13xx_init_early,
  87. .map_io = iop13xx_map_io,
  88. .init_irq = iop13xx_init_irq,
  89. .timer = &iq81340sc_timer,
  90. .init_machine = iq81340sc_init,
  91. .restart = iop13xx_restart,
  92. MACHINE_END