tls.h 1.7 KB

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  1. #ifndef __ASMARM_TLS_H
  2. #define __ASMARM_TLS_H
  3. #ifdef __ASSEMBLY__
  4. #include <asm/asm-offsets.h>
  5. .macro switch_tls_none, base, tp, tpuser, tmp1, tmp2
  6. .endm
  7. .macro switch_tls_v6k, base, tp, tpuser, tmp1, tmp2
  8. mrc p15, 0, \tmp2, c13, c0, 2 @ get the user r/w register
  9. mcr p15, 0, \tp, c13, c0, 3 @ set TLS register
  10. mcr p15, 0, \tpuser, c13, c0, 2 @ and the user r/w register
  11. str \tmp2, [\base, #TI_TP_VALUE + 4] @ save it
  12. .endm
  13. .macro switch_tls_v6, base, tp, tpuser, tmp1, tmp2
  14. ldr \tmp1, =elf_hwcap
  15. ldr \tmp1, [\tmp1, #0]
  16. mov \tmp2, #0xffff0fff
  17. tst \tmp1, #HWCAP_TLS @ hardware TLS available?
  18. streq \tp, [\tmp2, #-15] @ set TLS value at 0xffff0ff0
  19. mrcne p15, 0, \tmp2, c13, c0, 2 @ get the user r/w register
  20. mcrne p15, 0, \tp, c13, c0, 3 @ yes, set TLS register
  21. mcrne p15, 0, \tpuser, c13, c0, 2 @ set user r/w register
  22. strne \tmp2, [\base, #TI_TP_VALUE + 4] @ save it
  23. .endm
  24. .macro switch_tls_software, base, tp, tpuser, tmp1, tmp2
  25. mov \tmp1, #0xffff0fff
  26. str \tp, [\tmp1, #-15] @ set TLS value at 0xffff0ff0
  27. .endm
  28. #endif
  29. #ifdef CONFIG_TLS_REG_EMUL
  30. #define tls_emu 1
  31. #define has_tls_reg 1
  32. #define switch_tls switch_tls_none
  33. #elif defined(CONFIG_CPU_V6)
  34. #define tls_emu 0
  35. #define has_tls_reg (elf_hwcap & HWCAP_TLS)
  36. #define switch_tls switch_tls_v6
  37. #elif defined(CONFIG_CPU_32v6K)
  38. #define tls_emu 0
  39. #define has_tls_reg 1
  40. #define switch_tls switch_tls_v6k
  41. #else
  42. #define tls_emu 0
  43. #define has_tls_reg 0
  44. #define switch_tls switch_tls_software
  45. #endif
  46. #ifndef __ASSEMBLY__
  47. static inline unsigned long get_tpuser(void)
  48. {
  49. unsigned long reg = 0;
  50. if (has_tls_reg && !tls_emu)
  51. __asm__("mrc p15, 0, %0, c13, c0, 2" : "=r" (reg));
  52. return reg;
  53. }
  54. #endif
  55. #endif /* __ASMARM_TLS_H */