cs8427.c 18 KB

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  1. /*
  2. * Routines for control of the CS8427 via i2c bus
  3. * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic
  4. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  5. *
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. *
  21. */
  22. #include <linux/slab.h>
  23. #include <linux/delay.h>
  24. #include <linux/init.h>
  25. #include <linux/bitrev.h>
  26. #include <linux/module.h>
  27. #include <asm/unaligned.h>
  28. #include <sound/core.h>
  29. #include <sound/control.h>
  30. #include <sound/pcm.h>
  31. #include <sound/cs8427.h>
  32. #include <sound/asoundef.h>
  33. static void snd_cs8427_reset(struct snd_i2c_device *cs8427);
  34. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  35. MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic");
  36. MODULE_LICENSE("GPL");
  37. #define CS8427_ADDR (0x20>>1) /* fixed address */
  38. struct cs8427_stream {
  39. struct snd_pcm_substream *substream;
  40. char hw_status[24]; /* hardware status */
  41. char def_status[24]; /* default status */
  42. char pcm_status[24]; /* PCM private status */
  43. char hw_udata[32];
  44. struct snd_kcontrol *pcm_ctl;
  45. };
  46. struct cs8427 {
  47. unsigned char regmap[0x14]; /* map of first 1 + 13 registers */
  48. unsigned int rate;
  49. unsigned int reset_timeout;
  50. struct cs8427_stream playback;
  51. struct cs8427_stream capture;
  52. };
  53. int snd_cs8427_reg_write(struct snd_i2c_device *device, unsigned char reg,
  54. unsigned char val)
  55. {
  56. int err;
  57. unsigned char buf[2];
  58. buf[0] = reg & 0x7f;
  59. buf[1] = val;
  60. if ((err = snd_i2c_sendbytes(device, buf, 2)) != 2) {
  61. snd_printk(KERN_ERR "unable to send bytes 0x%02x:0x%02x "
  62. "to CS8427 (%i)\n", buf[0], buf[1], err);
  63. return err < 0 ? err : -EIO;
  64. }
  65. return 0;
  66. }
  67. EXPORT_SYMBOL(snd_cs8427_reg_write);
  68. static int snd_cs8427_reg_read(struct snd_i2c_device *device, unsigned char reg)
  69. {
  70. int err;
  71. unsigned char buf;
  72. if ((err = snd_i2c_sendbytes(device, &reg, 1)) != 1) {
  73. snd_printk(KERN_ERR "unable to send register 0x%x byte "
  74. "to CS8427\n", reg);
  75. return err < 0 ? err : -EIO;
  76. }
  77. if ((err = snd_i2c_readbytes(device, &buf, 1)) != 1) {
  78. snd_printk(KERN_ERR "unable to read register 0x%x byte "
  79. "from CS8427\n", reg);
  80. return err < 0 ? err : -EIO;
  81. }
  82. return buf;
  83. }
  84. static int snd_cs8427_select_corudata(struct snd_i2c_device *device, int udata)
  85. {
  86. struct cs8427 *chip = device->private_data;
  87. int err;
  88. udata = udata ? CS8427_BSEL : 0;
  89. if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) {
  90. chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL;
  91. chip->regmap[CS8427_REG_CSDATABUF] |= udata;
  92. err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF,
  93. chip->regmap[CS8427_REG_CSDATABUF]);
  94. if (err < 0)
  95. return err;
  96. }
  97. return 0;
  98. }
  99. static int snd_cs8427_send_corudata(struct snd_i2c_device *device,
  100. int udata,
  101. unsigned char *ndata,
  102. int count)
  103. {
  104. struct cs8427 *chip = device->private_data;
  105. char *hw_data = udata ?
  106. chip->playback.hw_udata : chip->playback.hw_status;
  107. char data[32];
  108. int err, idx;
  109. if (!memcmp(hw_data, ndata, count))
  110. return 0;
  111. if ((err = snd_cs8427_select_corudata(device, udata)) < 0)
  112. return err;
  113. memcpy(hw_data, ndata, count);
  114. if (udata) {
  115. memset(data, 0, sizeof(data));
  116. if (memcmp(hw_data, data, count) == 0) {
  117. chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK;
  118. chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS |
  119. CS8427_EFTUI;
  120. err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF,
  121. chip->regmap[CS8427_REG_UDATABUF]);
  122. return err < 0 ? err : 0;
  123. }
  124. }
  125. data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF;
  126. for (idx = 0; idx < count; idx++)
  127. data[idx + 1] = bitrev8(ndata[idx]);
  128. if (snd_i2c_sendbytes(device, data, count + 1) != count + 1)
  129. return -EIO;
  130. return 1;
  131. }
  132. static void snd_cs8427_free(struct snd_i2c_device *device)
  133. {
  134. kfree(device->private_data);
  135. }
  136. int snd_cs8427_create(struct snd_i2c_bus *bus,
  137. unsigned char addr,
  138. unsigned int reset_timeout,
  139. struct snd_i2c_device **r_cs8427)
  140. {
  141. static unsigned char initvals1[] = {
  142. CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
  143. /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes,
  144. TCBL=output */
  145. CS8427_SWCLK | CS8427_TCBLDIR,
  146. /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs,
  147. normal stereo operation */
  148. 0x00,
  149. /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial,
  150. Rx=>serial */
  151. CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER,
  152. /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs,
  153. output time base = OMCK, input time base = recovered input clock,
  154. recovered input clock source is ILRCK changed to AES3INPUT
  155. (workaround, see snd_cs8427_reset) */
  156. CS8427_RXDILRCK,
  157. /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S,
  158. 24-bit, 64*Fsi */
  159. CS8427_SIDEL | CS8427_SILRPOL,
  160. /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format
  161. = I2S, 24-bit, 64*Fsi */
  162. CS8427_SODEL | CS8427_SOLRPOL,
  163. };
  164. static unsigned char initvals2[] = {
  165. CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
  166. /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence,
  167. biphase, parity status bits */
  168. /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,*/
  169. 0xff, /* set everything */
  170. /* CS8427_REG_CSDATABUF:
  171. Registers 32-55 window to CS buffer
  172. Inhibit D->E transfers from overwriting first 5 bytes of CS data.
  173. Inhibit D->E transfers (all) of CS data.
  174. Allow E->F transfer of CS data.
  175. One byte mode; both A/B channels get same written CB data.
  176. A channel info is output to chip's EMPH* pin. */
  177. CS8427_CBMR | CS8427_DETCI,
  178. /* CS8427_REG_UDATABUF:
  179. Use internal buffer to transmit User (U) data.
  180. Chip's U pin is an output.
  181. Transmit all O's for user data.
  182. Inhibit D->E transfers.
  183. Inhibit E->F transfers. */
  184. CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
  185. };
  186. int err;
  187. struct cs8427 *chip;
  188. struct snd_i2c_device *device;
  189. unsigned char buf[24];
  190. if ((err = snd_i2c_device_create(bus, "CS8427",
  191. CS8427_ADDR | (addr & 7),
  192. &device)) < 0)
  193. return err;
  194. chip = device->private_data = kzalloc(sizeof(*chip), GFP_KERNEL);
  195. if (chip == NULL) {
  196. snd_i2c_device_free(device);
  197. return -ENOMEM;
  198. }
  199. device->private_free = snd_cs8427_free;
  200. snd_i2c_lock(bus);
  201. err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
  202. if (err != CS8427_VER8427A) {
  203. /* give second chance */
  204. snd_printk(KERN_WARNING "invalid CS8427 signature 0x%x: "
  205. "let me try again...\n", err);
  206. err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
  207. }
  208. if (err != CS8427_VER8427A) {
  209. snd_i2c_unlock(bus);
  210. snd_printk(KERN_ERR "unable to find CS8427 signature "
  211. "(expected 0x%x, read 0x%x),\n",
  212. CS8427_VER8427A, err);
  213. snd_printk(KERN_ERR " initialization is not completed\n");
  214. return -EFAULT;
  215. }
  216. /* turn off run bit while making changes to configuration */
  217. err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00);
  218. if (err < 0)
  219. goto __fail;
  220. /* send initial values */
  221. memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
  222. if ((err = snd_i2c_sendbytes(device, initvals1, 7)) != 7) {
  223. err = err < 0 ? err : -EIO;
  224. goto __fail;
  225. }
  226. /* Turn off CS8427 interrupt stuff that is not used in hardware */
  227. memset(buf, 0, 7);
  228. /* from address 9 to 15 */
  229. buf[0] = 9; /* register */
  230. if ((err = snd_i2c_sendbytes(device, buf, 7)) != 7)
  231. goto __fail;
  232. /* send transfer initialization sequence */
  233. memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3);
  234. if ((err = snd_i2c_sendbytes(device, initvals2, 4)) != 4) {
  235. err = err < 0 ? err : -EIO;
  236. goto __fail;
  237. }
  238. /* write default channel status bytes */
  239. put_unaligned_le32(SNDRV_PCM_DEFAULT_CON_SPDIF, buf);
  240. memset(buf + 4, 0, 24 - 4);
  241. if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0)
  242. goto __fail;
  243. memcpy(chip->playback.def_status, buf, 24);
  244. memcpy(chip->playback.pcm_status, buf, 24);
  245. snd_i2c_unlock(bus);
  246. /* turn on run bit and rock'n'roll */
  247. if (reset_timeout < 1)
  248. reset_timeout = 1;
  249. chip->reset_timeout = reset_timeout;
  250. snd_cs8427_reset(device);
  251. #if 0 // it's nice for read tests
  252. {
  253. char buf[128];
  254. int xx;
  255. buf[0] = 0x81;
  256. snd_i2c_sendbytes(device, buf, 1);
  257. snd_i2c_readbytes(device, buf, 127);
  258. for (xx = 0; xx < 127; xx++)
  259. printk(KERN_DEBUG "reg[0x%x] = 0x%x\n", xx+1, buf[xx]);
  260. }
  261. #endif
  262. if (r_cs8427)
  263. *r_cs8427 = device;
  264. return 0;
  265. __fail:
  266. snd_i2c_unlock(bus);
  267. snd_i2c_device_free(device);
  268. return err < 0 ? err : -EIO;
  269. }
  270. EXPORT_SYMBOL(snd_cs8427_create);
  271. /*
  272. * Reset the chip using run bit, also lock PLL using ILRCK and
  273. * put back AES3INPUT. This workaround is described in latest
  274. * CS8427 datasheet, otherwise TXDSERIAL will not work.
  275. */
  276. static void snd_cs8427_reset(struct snd_i2c_device *cs8427)
  277. {
  278. struct cs8427 *chip;
  279. unsigned long end_time;
  280. int data, aes3input = 0;
  281. if (snd_BUG_ON(!cs8427))
  282. return;
  283. chip = cs8427->private_data;
  284. snd_i2c_lock(cs8427->bus);
  285. if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) ==
  286. CS8427_RXDAES3INPUT) /* AES3 bit is set */
  287. aes3input = 1;
  288. chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK);
  289. snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
  290. chip->regmap[CS8427_REG_CLOCKSOURCE]);
  291. udelay(200);
  292. chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK;
  293. snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
  294. chip->regmap[CS8427_REG_CLOCKSOURCE]);
  295. udelay(200);
  296. snd_i2c_unlock(cs8427->bus);
  297. end_time = jiffies + chip->reset_timeout;
  298. while (time_after_eq(end_time, jiffies)) {
  299. snd_i2c_lock(cs8427->bus);
  300. data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS);
  301. snd_i2c_unlock(cs8427->bus);
  302. if (!(data & CS8427_UNLOCK))
  303. break;
  304. schedule_timeout_uninterruptible(1);
  305. }
  306. snd_i2c_lock(cs8427->bus);
  307. chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK;
  308. if (aes3input)
  309. chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT;
  310. snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
  311. chip->regmap[CS8427_REG_CLOCKSOURCE]);
  312. snd_i2c_unlock(cs8427->bus);
  313. }
  314. static int snd_cs8427_in_status_info(struct snd_kcontrol *kcontrol,
  315. struct snd_ctl_elem_info *uinfo)
  316. {
  317. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  318. uinfo->count = 1;
  319. uinfo->value.integer.min = 0;
  320. uinfo->value.integer.max = 255;
  321. return 0;
  322. }
  323. static int snd_cs8427_in_status_get(struct snd_kcontrol *kcontrol,
  324. struct snd_ctl_elem_value *ucontrol)
  325. {
  326. struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
  327. int data;
  328. snd_i2c_lock(device->bus);
  329. data = snd_cs8427_reg_read(device, kcontrol->private_value);
  330. snd_i2c_unlock(device->bus);
  331. if (data < 0)
  332. return data;
  333. ucontrol->value.integer.value[0] = data;
  334. return 0;
  335. }
  336. static int snd_cs8427_qsubcode_info(struct snd_kcontrol *kcontrol,
  337. struct snd_ctl_elem_info *uinfo)
  338. {
  339. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  340. uinfo->count = 10;
  341. return 0;
  342. }
  343. static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol,
  344. struct snd_ctl_elem_value *ucontrol)
  345. {
  346. struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
  347. unsigned char reg = CS8427_REG_QSUBCODE;
  348. int err;
  349. snd_i2c_lock(device->bus);
  350. if ((err = snd_i2c_sendbytes(device, &reg, 1)) != 1) {
  351. snd_printk(KERN_ERR "unable to send register 0x%x byte "
  352. "to CS8427\n", reg);
  353. snd_i2c_unlock(device->bus);
  354. return err < 0 ? err : -EIO;
  355. }
  356. err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10);
  357. if (err != 10) {
  358. snd_printk(KERN_ERR "unable to read Q-subcode bytes "
  359. "from CS8427\n");
  360. snd_i2c_unlock(device->bus);
  361. return err < 0 ? err : -EIO;
  362. }
  363. snd_i2c_unlock(device->bus);
  364. return 0;
  365. }
  366. static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol,
  367. struct snd_ctl_elem_info *uinfo)
  368. {
  369. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  370. uinfo->count = 1;
  371. return 0;
  372. }
  373. static int snd_cs8427_spdif_get(struct snd_kcontrol *kcontrol,
  374. struct snd_ctl_elem_value *ucontrol)
  375. {
  376. struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
  377. struct cs8427 *chip = device->private_data;
  378. snd_i2c_lock(device->bus);
  379. memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24);
  380. snd_i2c_unlock(device->bus);
  381. return 0;
  382. }
  383. static int snd_cs8427_spdif_put(struct snd_kcontrol *kcontrol,
  384. struct snd_ctl_elem_value *ucontrol)
  385. {
  386. struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
  387. struct cs8427 *chip = device->private_data;
  388. unsigned char *status = kcontrol->private_value ?
  389. chip->playback.pcm_status : chip->playback.def_status;
  390. struct snd_pcm_runtime *runtime = chip->playback.substream ?
  391. chip->playback.substream->runtime : NULL;
  392. int err, change;
  393. snd_i2c_lock(device->bus);
  394. change = memcmp(ucontrol->value.iec958.status, status, 24) != 0;
  395. memcpy(status, ucontrol->value.iec958.status, 24);
  396. if (change && (kcontrol->private_value ?
  397. runtime != NULL : runtime == NULL)) {
  398. err = snd_cs8427_send_corudata(device, 0, status, 24);
  399. if (err < 0)
  400. change = err;
  401. }
  402. snd_i2c_unlock(device->bus);
  403. return change;
  404. }
  405. static int snd_cs8427_spdif_mask_info(struct snd_kcontrol *kcontrol,
  406. struct snd_ctl_elem_info *uinfo)
  407. {
  408. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  409. uinfo->count = 1;
  410. return 0;
  411. }
  412. static int snd_cs8427_spdif_mask_get(struct snd_kcontrol *kcontrol,
  413. struct snd_ctl_elem_value *ucontrol)
  414. {
  415. memset(ucontrol->value.iec958.status, 0xff, 24);
  416. return 0;
  417. }
  418. static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = {
  419. {
  420. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  421. .info = snd_cs8427_in_status_info,
  422. .name = "IEC958 CS8427 Input Status",
  423. .access = (SNDRV_CTL_ELEM_ACCESS_READ |
  424. SNDRV_CTL_ELEM_ACCESS_VOLATILE),
  425. .get = snd_cs8427_in_status_get,
  426. .private_value = 15,
  427. },
  428. {
  429. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  430. .info = snd_cs8427_in_status_info,
  431. .name = "IEC958 CS8427 Error Status",
  432. .access = (SNDRV_CTL_ELEM_ACCESS_READ |
  433. SNDRV_CTL_ELEM_ACCESS_VOLATILE),
  434. .get = snd_cs8427_in_status_get,
  435. .private_value = 16,
  436. },
  437. {
  438. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  439. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  440. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
  441. .info = snd_cs8427_spdif_mask_info,
  442. .get = snd_cs8427_spdif_mask_get,
  443. },
  444. {
  445. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  446. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  447. .info = snd_cs8427_spdif_info,
  448. .get = snd_cs8427_spdif_get,
  449. .put = snd_cs8427_spdif_put,
  450. .private_value = 0
  451. },
  452. {
  453. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  454. SNDRV_CTL_ELEM_ACCESS_INACTIVE),
  455. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  456. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
  457. .info = snd_cs8427_spdif_info,
  458. .get = snd_cs8427_spdif_get,
  459. .put = snd_cs8427_spdif_put,
  460. .private_value = 1
  461. },
  462. {
  463. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  464. .info = snd_cs8427_qsubcode_info,
  465. .name = "IEC958 Q-subcode Capture Default",
  466. .access = (SNDRV_CTL_ELEM_ACCESS_READ |
  467. SNDRV_CTL_ELEM_ACCESS_VOLATILE),
  468. .get = snd_cs8427_qsubcode_get
  469. }};
  470. int snd_cs8427_iec958_build(struct snd_i2c_device *cs8427,
  471. struct snd_pcm_substream *play_substream,
  472. struct snd_pcm_substream *cap_substream)
  473. {
  474. struct cs8427 *chip = cs8427->private_data;
  475. struct snd_kcontrol *kctl;
  476. unsigned int idx;
  477. int err;
  478. if (snd_BUG_ON(!play_substream || !cap_substream))
  479. return -EINVAL;
  480. for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) {
  481. kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427);
  482. if (kctl == NULL)
  483. return -ENOMEM;
  484. kctl->id.device = play_substream->pcm->device;
  485. kctl->id.subdevice = play_substream->number;
  486. err = snd_ctl_add(cs8427->bus->card, kctl);
  487. if (err < 0)
  488. return err;
  489. if (! strcmp(kctl->id.name,
  490. SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM)))
  491. chip->playback.pcm_ctl = kctl;
  492. }
  493. chip->playback.substream = play_substream;
  494. chip->capture.substream = cap_substream;
  495. if (snd_BUG_ON(!chip->playback.pcm_ctl))
  496. return -EIO;
  497. return 0;
  498. }
  499. EXPORT_SYMBOL(snd_cs8427_iec958_build);
  500. int snd_cs8427_iec958_active(struct snd_i2c_device *cs8427, int active)
  501. {
  502. struct cs8427 *chip;
  503. if (snd_BUG_ON(!cs8427))
  504. return -ENXIO;
  505. chip = cs8427->private_data;
  506. if (active)
  507. memcpy(chip->playback.pcm_status,
  508. chip->playback.def_status, 24);
  509. chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  510. snd_ctl_notify(cs8427->bus->card,
  511. SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
  512. &chip->playback.pcm_ctl->id);
  513. return 0;
  514. }
  515. EXPORT_SYMBOL(snd_cs8427_iec958_active);
  516. int snd_cs8427_iec958_pcm(struct snd_i2c_device *cs8427, unsigned int rate)
  517. {
  518. struct cs8427 *chip;
  519. char *status;
  520. int err, reset;
  521. if (snd_BUG_ON(!cs8427))
  522. return -ENXIO;
  523. chip = cs8427->private_data;
  524. status = chip->playback.pcm_status;
  525. snd_i2c_lock(cs8427->bus);
  526. if (status[0] & IEC958_AES0_PROFESSIONAL) {
  527. status[0] &= ~IEC958_AES0_PRO_FS;
  528. switch (rate) {
  529. case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break;
  530. case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break;
  531. case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break;
  532. default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break;
  533. }
  534. } else {
  535. status[3] &= ~IEC958_AES3_CON_FS;
  536. switch (rate) {
  537. case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break;
  538. case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break;
  539. case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break;
  540. }
  541. }
  542. err = snd_cs8427_send_corudata(cs8427, 0, status, 24);
  543. if (err > 0)
  544. snd_ctl_notify(cs8427->bus->card,
  545. SNDRV_CTL_EVENT_MASK_VALUE,
  546. &chip->playback.pcm_ctl->id);
  547. reset = chip->rate != rate;
  548. chip->rate = rate;
  549. snd_i2c_unlock(cs8427->bus);
  550. if (reset)
  551. snd_cs8427_reset(cs8427);
  552. return err < 0 ? err : 0;
  553. }
  554. EXPORT_SYMBOL(snd_cs8427_iec958_pcm);
  555. static int __init alsa_cs8427_module_init(void)
  556. {
  557. return 0;
  558. }
  559. static void __exit alsa_cs8427_module_exit(void)
  560. {
  561. }
  562. module_init(alsa_cs8427_module_init)
  563. module_exit(alsa_cs8427_module_exit)