board-sh7785lcr.c 8.3 KB

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  1. /*
  2. * Renesas Technology Corp. R0P7785LC0011RL Support.
  3. *
  4. * Copyright (C) 2008 Yoshihiro Shimoda
  5. * Copyright (C) 2009 Paul Mundt
  6. *
  7. * This file is subject to the terms and conditions of the GNU General Public
  8. * License. See the file "COPYING" in the main directory of this archive
  9. * for more details.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/sm501.h>
  14. #include <linux/sm501-regs.h>
  15. #include <linux/fb.h>
  16. #include <linux/mtd/physmap.h>
  17. #include <linux/delay.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/i2c.h>
  20. #include <linux/i2c-pca-platform.h>
  21. #include <linux/i2c-algo-pca.h>
  22. #include <linux/usb/r8a66597.h>
  23. #include <linux/irq.h>
  24. #include <linux/io.h>
  25. #include <linux/clk.h>
  26. #include <linux/errno.h>
  27. #include <mach/sh7785lcr.h>
  28. #include <cpu/sh7785.h>
  29. #include <asm/heartbeat.h>
  30. #include <asm/clock.h>
  31. #include <asm/bl_bit.h>
  32. /*
  33. * NOTE: This board has 2 physical memory maps.
  34. * Please look at include/asm-sh/sh7785lcr.h or hardware manual.
  35. */
  36. static struct resource heartbeat_resource = {
  37. .start = PLD_LEDCR,
  38. .end = PLD_LEDCR,
  39. .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  40. };
  41. static struct platform_device heartbeat_device = {
  42. .name = "heartbeat",
  43. .id = -1,
  44. .num_resources = 1,
  45. .resource = &heartbeat_resource,
  46. };
  47. static struct mtd_partition nor_flash_partitions[] = {
  48. {
  49. .name = "loader",
  50. .offset = 0x00000000,
  51. .size = 512 * 1024,
  52. },
  53. {
  54. .name = "bootenv",
  55. .offset = MTDPART_OFS_APPEND,
  56. .size = 512 * 1024,
  57. },
  58. {
  59. .name = "kernel",
  60. .offset = MTDPART_OFS_APPEND,
  61. .size = 4 * 1024 * 1024,
  62. },
  63. {
  64. .name = "data",
  65. .offset = MTDPART_OFS_APPEND,
  66. .size = MTDPART_SIZ_FULL,
  67. },
  68. };
  69. static struct physmap_flash_data nor_flash_data = {
  70. .width = 4,
  71. .parts = nor_flash_partitions,
  72. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  73. };
  74. static struct resource nor_flash_resources[] = {
  75. [0] = {
  76. .start = NOR_FLASH_ADDR,
  77. .end = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
  78. .flags = IORESOURCE_MEM,
  79. }
  80. };
  81. static struct platform_device nor_flash_device = {
  82. .name = "physmap-flash",
  83. .dev = {
  84. .platform_data = &nor_flash_data,
  85. },
  86. .num_resources = ARRAY_SIZE(nor_flash_resources),
  87. .resource = nor_flash_resources,
  88. };
  89. static struct r8a66597_platdata r8a66597_data = {
  90. .xtal = R8A66597_PLATDATA_XTAL_12MHZ,
  91. .vif = 1,
  92. };
  93. static struct resource r8a66597_usb_host_resources[] = {
  94. [0] = {
  95. .start = R8A66597_ADDR,
  96. .end = R8A66597_ADDR + R8A66597_SIZE - 1,
  97. .flags = IORESOURCE_MEM,
  98. },
  99. [1] = {
  100. .start = 2,
  101. .end = 2,
  102. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  103. },
  104. };
  105. static struct platform_device r8a66597_usb_host_device = {
  106. .name = "r8a66597_hcd",
  107. .id = -1,
  108. .dev = {
  109. .dma_mask = NULL,
  110. .coherent_dma_mask = 0xffffffff,
  111. .platform_data = &r8a66597_data,
  112. },
  113. .num_resources = ARRAY_SIZE(r8a66597_usb_host_resources),
  114. .resource = r8a66597_usb_host_resources,
  115. };
  116. static struct resource sm501_resources[] = {
  117. [0] = {
  118. .start = SM107_MEM_ADDR,
  119. .end = SM107_MEM_ADDR + SM107_MEM_SIZE - 1,
  120. .flags = IORESOURCE_MEM,
  121. },
  122. [1] = {
  123. .start = SM107_REG_ADDR,
  124. .end = SM107_REG_ADDR + SM107_REG_SIZE - 1,
  125. .flags = IORESOURCE_MEM,
  126. },
  127. [2] = {
  128. .start = 10,
  129. .flags = IORESOURCE_IRQ,
  130. },
  131. };
  132. static struct fb_videomode sm501_default_mode_crt = {
  133. .pixclock = 35714, /* 28MHz */
  134. .xres = 640,
  135. .yres = 480,
  136. .left_margin = 105,
  137. .right_margin = 16,
  138. .upper_margin = 33,
  139. .lower_margin = 10,
  140. .hsync_len = 39,
  141. .vsync_len = 2,
  142. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  143. };
  144. static struct fb_videomode sm501_default_mode_pnl = {
  145. .pixclock = 40000, /* 25MHz */
  146. .xres = 640,
  147. .yres = 480,
  148. .left_margin = 2,
  149. .right_margin = 16,
  150. .upper_margin = 33,
  151. .lower_margin = 10,
  152. .hsync_len = 39,
  153. .vsync_len = 2,
  154. .sync = 0,
  155. };
  156. static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
  157. .def_bpp = 16,
  158. .def_mode = &sm501_default_mode_pnl,
  159. .flags = SM501FB_FLAG_USE_INIT_MODE |
  160. SM501FB_FLAG_USE_HWCURSOR |
  161. SM501FB_FLAG_USE_HWACCEL |
  162. SM501FB_FLAG_DISABLE_AT_EXIT |
  163. SM501FB_FLAG_PANEL_NO_VBIASEN,
  164. };
  165. static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
  166. .def_bpp = 16,
  167. .def_mode = &sm501_default_mode_crt,
  168. .flags = SM501FB_FLAG_USE_INIT_MODE |
  169. SM501FB_FLAG_USE_HWCURSOR |
  170. SM501FB_FLAG_USE_HWACCEL |
  171. SM501FB_FLAG_DISABLE_AT_EXIT,
  172. };
  173. static struct sm501_platdata_fb sm501_fb_pdata = {
  174. .fb_route = SM501_FB_OWN,
  175. .fb_crt = &sm501_pdata_fbsub_crt,
  176. .fb_pnl = &sm501_pdata_fbsub_pnl,
  177. };
  178. static struct sm501_initdata sm501_initdata = {
  179. .gpio_high = {
  180. .set = 0x00001fe0,
  181. .mask = 0x0,
  182. },
  183. .devices = 0,
  184. .mclk = 84 * 1000000,
  185. .m1xclk = 112 * 1000000,
  186. };
  187. static struct sm501_platdata sm501_platform_data = {
  188. .init = &sm501_initdata,
  189. .fb = &sm501_fb_pdata,
  190. };
  191. static struct platform_device sm501_device = {
  192. .name = "sm501",
  193. .id = -1,
  194. .dev = {
  195. .platform_data = &sm501_platform_data,
  196. },
  197. .num_resources = ARRAY_SIZE(sm501_resources),
  198. .resource = sm501_resources,
  199. };
  200. static struct resource i2c_proto_resources[] = {
  201. [0] = {
  202. .start = PCA9564_PROTO_32BIT_ADDR,
  203. .end = PCA9564_PROTO_32BIT_ADDR + PCA9564_SIZE - 1,
  204. .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  205. },
  206. [1] = {
  207. .start = 12,
  208. .end = 12,
  209. .flags = IORESOURCE_IRQ,
  210. },
  211. };
  212. static struct resource i2c_resources[] = {
  213. [0] = {
  214. .start = PCA9564_ADDR,
  215. .end = PCA9564_ADDR + PCA9564_SIZE - 1,
  216. .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
  217. },
  218. [1] = {
  219. .start = 12,
  220. .end = 12,
  221. .flags = IORESOURCE_IRQ,
  222. },
  223. };
  224. static struct i2c_pca9564_pf_platform_data i2c_platform_data = {
  225. .gpio = 0,
  226. .i2c_clock_speed = I2C_PCA_CON_330kHz,
  227. .timeout = HZ,
  228. };
  229. static struct platform_device i2c_device = {
  230. .name = "i2c-pca-platform",
  231. .id = -1,
  232. .dev = {
  233. .platform_data = &i2c_platform_data,
  234. },
  235. .num_resources = ARRAY_SIZE(i2c_resources),
  236. .resource = i2c_resources,
  237. };
  238. static struct platform_device *sh7785lcr_devices[] __initdata = {
  239. &heartbeat_device,
  240. &nor_flash_device,
  241. &r8a66597_usb_host_device,
  242. &sm501_device,
  243. &i2c_device,
  244. };
  245. static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = {
  246. {
  247. I2C_BOARD_INFO("r2025sd", 0x32),
  248. },
  249. };
  250. static int __init sh7785lcr_devices_setup(void)
  251. {
  252. i2c_register_board_info(0, sh7785lcr_i2c_devices,
  253. ARRAY_SIZE(sh7785lcr_i2c_devices));
  254. if (mach_is_sh7785lcr_pt()) {
  255. i2c_device.resource = i2c_proto_resources;
  256. i2c_device.num_resources = ARRAY_SIZE(i2c_proto_resources);
  257. }
  258. return platform_add_devices(sh7785lcr_devices,
  259. ARRAY_SIZE(sh7785lcr_devices));
  260. }
  261. device_initcall(sh7785lcr_devices_setup);
  262. /* Initialize IRQ setting */
  263. void __init init_sh7785lcr_IRQ(void)
  264. {
  265. plat_irq_setup_pins(IRQ_MODE_IRQ7654);
  266. plat_irq_setup_pins(IRQ_MODE_IRQ3210);
  267. }
  268. static int sh7785lcr_clk_init(void)
  269. {
  270. struct clk *clk;
  271. int ret;
  272. clk = clk_get(NULL, "extal");
  273. if (IS_ERR(clk))
  274. return PTR_ERR(clk);
  275. ret = clk_set_rate(clk, 33333333);
  276. clk_put(clk);
  277. return ret;
  278. }
  279. static void sh7785lcr_power_off(void)
  280. {
  281. unsigned char *p;
  282. p = ioremap(PLD_POFCR, PLD_POFCR + 1);
  283. if (!p) {
  284. printk(KERN_ERR "%s: ioremap error.\n", __func__);
  285. return;
  286. }
  287. *p = 0x01;
  288. iounmap(p);
  289. set_bl_bit();
  290. while (1)
  291. cpu_relax();
  292. }
  293. /* Initialize the board */
  294. static void __init sh7785lcr_setup(char **cmdline_p)
  295. {
  296. void __iomem *sm501_reg;
  297. printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n");
  298. pm_power_off = sh7785lcr_power_off;
  299. /* sm501 DRAM configuration */
  300. sm501_reg = ioremap_nocache(SM107_REG_ADDR, SM501_DRAM_CONTROL);
  301. if (!sm501_reg) {
  302. printk(KERN_ERR "%s: ioremap error.\n", __func__);
  303. return;
  304. }
  305. writel(0x000307c2, sm501_reg + SM501_DRAM_CONTROL);
  306. iounmap(sm501_reg);
  307. }
  308. /* Return the board specific boot mode pin configuration */
  309. static int sh7785lcr_mode_pins(void)
  310. {
  311. int value = 0;
  312. /* These are the factory default settings of S1 and S2.
  313. * If you change these dip switches then you will need to
  314. * adjust the values below as well.
  315. */
  316. value |= MODE_PIN4; /* Clock Mode 16 */
  317. value |= MODE_PIN5; /* 32-bit Area0 bus width */
  318. value |= MODE_PIN6; /* 32-bit Area0 bus width */
  319. value |= MODE_PIN7; /* Area 0 SRAM interface [fixed] */
  320. value |= MODE_PIN8; /* Little Endian */
  321. value |= MODE_PIN9; /* Master Mode */
  322. value |= MODE_PIN14; /* No PLL step-up */
  323. return value;
  324. }
  325. /*
  326. * The Machine Vector
  327. */
  328. static struct sh_machine_vector mv_sh7785lcr __initmv = {
  329. .mv_name = "SH7785LCR",
  330. .mv_setup = sh7785lcr_setup,
  331. .mv_clk_init = sh7785lcr_clk_init,
  332. .mv_init_irq = init_sh7785lcr_IRQ,
  333. .mv_mode_pins = sh7785lcr_mode_pins,
  334. };