irq.c 3.1 KB

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  1. /*
  2. * linux/arch/h8300/platform/h8s/ints_h8s.c
  3. * Interrupt handling CPU variants
  4. *
  5. * Yoshinori Sato <ysato@users.sourceforge.jp>
  6. *
  7. */
  8. #include <linux/init.h>
  9. #include <linux/errno.h>
  10. #include <linux/kernel.h>
  11. #include <asm/ptrace.h>
  12. #include <asm/traps.h>
  13. #include <asm/irq.h>
  14. #include <asm/io.h>
  15. #include <asm/gpio-internal.h>
  16. #include <asm/regs267x.h>
  17. /* saved vector list */
  18. const int __initdata h8300_saved_vectors[]={
  19. #if defined(CONFIG_GDB_DEBUG)
  20. TRACE_VEC,
  21. TRAP3_VEC,
  22. #endif
  23. -1
  24. };
  25. /* trap entry table */
  26. const H8300_VECTOR __initdata h8300_trap_table[] = {
  27. 0,0,0,0,0,
  28. trace_break, /* TRACE */
  29. 0,0,
  30. system_call, /* TRAPA #0 */
  31. 0,0,0,0,0,0,0
  32. };
  33. /* IRQ pin assignment */
  34. struct irq_pins {
  35. unsigned char port_no;
  36. unsigned char bit_no;
  37. } __attribute__((aligned(1),packed));
  38. /* ISTR = 0 */
  39. static const struct irq_pins irq_assign_table0[16]={
  40. {H8300_GPIO_P5,H8300_GPIO_B0},{H8300_GPIO_P5,H8300_GPIO_B1},
  41. {H8300_GPIO_P5,H8300_GPIO_B2},{H8300_GPIO_P5,H8300_GPIO_B3},
  42. {H8300_GPIO_P5,H8300_GPIO_B4},{H8300_GPIO_P5,H8300_GPIO_B5},
  43. {H8300_GPIO_P5,H8300_GPIO_B6},{H8300_GPIO_P5,H8300_GPIO_B7},
  44. {H8300_GPIO_P6,H8300_GPIO_B0},{H8300_GPIO_P6,H8300_GPIO_B1},
  45. {H8300_GPIO_P6,H8300_GPIO_B2},{H8300_GPIO_P6,H8300_GPIO_B3},
  46. {H8300_GPIO_P6,H8300_GPIO_B4},{H8300_GPIO_P6,H8300_GPIO_B5},
  47. {H8300_GPIO_PF,H8300_GPIO_B1},{H8300_GPIO_PF,H8300_GPIO_B2},
  48. };
  49. /* ISTR = 1 */
  50. static const struct irq_pins irq_assign_table1[16]={
  51. {H8300_GPIO_P8,H8300_GPIO_B0},{H8300_GPIO_P8,H8300_GPIO_B1},
  52. {H8300_GPIO_P8,H8300_GPIO_B2},{H8300_GPIO_P8,H8300_GPIO_B3},
  53. {H8300_GPIO_P8,H8300_GPIO_B4},{H8300_GPIO_P8,H8300_GPIO_B5},
  54. {H8300_GPIO_PH,H8300_GPIO_B2},{H8300_GPIO_PH,H8300_GPIO_B3},
  55. {H8300_GPIO_P2,H8300_GPIO_B0},{H8300_GPIO_P2,H8300_GPIO_B1},
  56. {H8300_GPIO_P2,H8300_GPIO_B2},{H8300_GPIO_P2,H8300_GPIO_B3},
  57. {H8300_GPIO_P2,H8300_GPIO_B4},{H8300_GPIO_P2,H8300_GPIO_B5},
  58. {H8300_GPIO_P2,H8300_GPIO_B6},{H8300_GPIO_P2,H8300_GPIO_B7},
  59. };
  60. /* IRQ to GPIO pin translation */
  61. #define IRQ_GPIO_MAP(irqbit,irq,port,bit) \
  62. do { \
  63. if (*(volatile unsigned short *)ITSR & irqbit) { \
  64. port = irq_assign_table1[irq - EXT_IRQ0].port_no; \
  65. bit = irq_assign_table1[irq - EXT_IRQ0].bit_no; \
  66. } else { \
  67. port = irq_assign_table0[irq - EXT_IRQ0].port_no; \
  68. bit = irq_assign_table0[irq - EXT_IRQ0].bit_no; \
  69. } \
  70. } while(0)
  71. int h8300_enable_irq_pin(unsigned int irq)
  72. {
  73. if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15) {
  74. unsigned short ptn = 1 << (irq - EXT_IRQ0);
  75. unsigned int port_no,bit_no;
  76. IRQ_GPIO_MAP(ptn, irq, port_no, bit_no);
  77. if (H8300_GPIO_RESERVE(port_no, bit_no) == 0)
  78. return -EBUSY; /* pin already use */
  79. H8300_GPIO_DDR(port_no, bit_no, H8300_GPIO_INPUT);
  80. *(volatile unsigned short *)ISR &= ~ptn; /* ISR clear */
  81. }
  82. return 0;
  83. }
  84. void h8300_disable_irq_pin(unsigned int irq)
  85. {
  86. if (irq >= EXT_IRQ0 && irq <= EXT_IRQ15) {
  87. /* disable interrupt & release IRQ pin */
  88. unsigned short ptn = 1 << (irq - EXT_IRQ0);
  89. unsigned short port_no,bit_no;
  90. *(volatile unsigned short *)ISR &= ~ptn;
  91. *(volatile unsigned short *)IER &= ~ptn;
  92. IRQ_GPIO_MAP(ptn, irq, port_no, bit_no);
  93. H8300_GPIO_FREE(port_no, bit_no);
  94. }
  95. }