rtc-twl.c 16 KB

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  1. /*
  2. * rtc-twl.c -- TWL Real Time Clock interface
  3. *
  4. * Copyright (C) 2007 MontaVista Software, Inc
  5. * Author: Alexandre Rusev <source@mvista.com>
  6. *
  7. * Based on original TI driver twl4030-rtc.c
  8. * Copyright (C) 2006 Texas Instruments, Inc.
  9. *
  10. * Based on rtc-omap.c
  11. * Copyright (C) 2003 MontaVista Software, Inc.
  12. * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  13. * Copyright (C) 2006 David Brownell
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License
  17. * as published by the Free Software Foundation; either version
  18. * 2 of the License, or (at your option) any later version.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/types.h>
  25. #include <linux/rtc.h>
  26. #include <linux/bcd.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/i2c/twl.h>
  30. /*
  31. * RTC block register offsets (use TWL_MODULE_RTC)
  32. */
  33. enum {
  34. REG_SECONDS_REG = 0,
  35. REG_MINUTES_REG,
  36. REG_HOURS_REG,
  37. REG_DAYS_REG,
  38. REG_MONTHS_REG,
  39. REG_YEARS_REG,
  40. REG_WEEKS_REG,
  41. REG_ALARM_SECONDS_REG,
  42. REG_ALARM_MINUTES_REG,
  43. REG_ALARM_HOURS_REG,
  44. REG_ALARM_DAYS_REG,
  45. REG_ALARM_MONTHS_REG,
  46. REG_ALARM_YEARS_REG,
  47. REG_RTC_CTRL_REG,
  48. REG_RTC_STATUS_REG,
  49. REG_RTC_INTERRUPTS_REG,
  50. REG_RTC_COMP_LSB_REG,
  51. REG_RTC_COMP_MSB_REG,
  52. };
  53. static const u8 twl4030_rtc_reg_map[] = {
  54. [REG_SECONDS_REG] = 0x00,
  55. [REG_MINUTES_REG] = 0x01,
  56. [REG_HOURS_REG] = 0x02,
  57. [REG_DAYS_REG] = 0x03,
  58. [REG_MONTHS_REG] = 0x04,
  59. [REG_YEARS_REG] = 0x05,
  60. [REG_WEEKS_REG] = 0x06,
  61. [REG_ALARM_SECONDS_REG] = 0x07,
  62. [REG_ALARM_MINUTES_REG] = 0x08,
  63. [REG_ALARM_HOURS_REG] = 0x09,
  64. [REG_ALARM_DAYS_REG] = 0x0A,
  65. [REG_ALARM_MONTHS_REG] = 0x0B,
  66. [REG_ALARM_YEARS_REG] = 0x0C,
  67. [REG_RTC_CTRL_REG] = 0x0D,
  68. [REG_RTC_STATUS_REG] = 0x0E,
  69. [REG_RTC_INTERRUPTS_REG] = 0x0F,
  70. [REG_RTC_COMP_LSB_REG] = 0x10,
  71. [REG_RTC_COMP_MSB_REG] = 0x11,
  72. };
  73. static const u8 twl6030_rtc_reg_map[] = {
  74. [REG_SECONDS_REG] = 0x00,
  75. [REG_MINUTES_REG] = 0x01,
  76. [REG_HOURS_REG] = 0x02,
  77. [REG_DAYS_REG] = 0x03,
  78. [REG_MONTHS_REG] = 0x04,
  79. [REG_YEARS_REG] = 0x05,
  80. [REG_WEEKS_REG] = 0x06,
  81. [REG_ALARM_SECONDS_REG] = 0x08,
  82. [REG_ALARM_MINUTES_REG] = 0x09,
  83. [REG_ALARM_HOURS_REG] = 0x0A,
  84. [REG_ALARM_DAYS_REG] = 0x0B,
  85. [REG_ALARM_MONTHS_REG] = 0x0C,
  86. [REG_ALARM_YEARS_REG] = 0x0D,
  87. [REG_RTC_CTRL_REG] = 0x10,
  88. [REG_RTC_STATUS_REG] = 0x11,
  89. [REG_RTC_INTERRUPTS_REG] = 0x12,
  90. [REG_RTC_COMP_LSB_REG] = 0x13,
  91. [REG_RTC_COMP_MSB_REG] = 0x14,
  92. };
  93. /* RTC_CTRL_REG bitfields */
  94. #define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01
  95. #define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02
  96. #define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04
  97. #define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08
  98. #define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10
  99. #define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20
  100. #define BIT_RTC_CTRL_REG_GET_TIME_M 0x40
  101. #define BIT_RTC_CTRL_REG_RTC_V_OPT 0x80
  102. /* RTC_STATUS_REG bitfields */
  103. #define BIT_RTC_STATUS_REG_RUN_M 0x02
  104. #define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04
  105. #define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08
  106. #define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10
  107. #define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20
  108. #define BIT_RTC_STATUS_REG_ALARM_M 0x40
  109. #define BIT_RTC_STATUS_REG_POWER_UP_M 0x80
  110. /* RTC_INTERRUPTS_REG bitfields */
  111. #define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03
  112. #define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04
  113. #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08
  114. /* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
  115. #define ALL_TIME_REGS 6
  116. /*----------------------------------------------------------------------*/
  117. static u8 *rtc_reg_map;
  118. /*
  119. * Supports 1 byte read from TWL RTC register.
  120. */
  121. static int twl_rtc_read_u8(u8 *data, u8 reg)
  122. {
  123. int ret;
  124. ret = twl_i2c_read_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
  125. if (ret < 0)
  126. pr_err("twl_rtc: Could not read TWL"
  127. "register %X - error %d\n", reg, ret);
  128. return ret;
  129. }
  130. /*
  131. * Supports 1 byte write to TWL RTC registers.
  132. */
  133. static int twl_rtc_write_u8(u8 data, u8 reg)
  134. {
  135. int ret;
  136. ret = twl_i2c_write_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
  137. if (ret < 0)
  138. pr_err("twl_rtc: Could not write TWL"
  139. "register %X - error %d\n", reg, ret);
  140. return ret;
  141. }
  142. /*
  143. * Cache the value for timer/alarm interrupts register; this is
  144. * only changed by callers holding rtc ops lock (or resume).
  145. */
  146. static unsigned char rtc_irq_bits;
  147. /*
  148. * Enable 1/second update and/or alarm interrupts.
  149. */
  150. static int set_rtc_irq_bit(unsigned char bit)
  151. {
  152. unsigned char val;
  153. int ret;
  154. /* if the bit is set, return from here */
  155. if (rtc_irq_bits & bit)
  156. return 0;
  157. val = rtc_irq_bits | bit;
  158. val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M;
  159. ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
  160. if (ret == 0)
  161. rtc_irq_bits = val;
  162. return ret;
  163. }
  164. /*
  165. * Disable update and/or alarm interrupts.
  166. */
  167. static int mask_rtc_irq_bit(unsigned char bit)
  168. {
  169. unsigned char val;
  170. int ret;
  171. /* if the bit is clear, return from here */
  172. if (!(rtc_irq_bits & bit))
  173. return 0;
  174. val = rtc_irq_bits & ~bit;
  175. ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
  176. if (ret == 0)
  177. rtc_irq_bits = val;
  178. return ret;
  179. }
  180. static int twl_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
  181. {
  182. int ret;
  183. if (enabled)
  184. ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  185. else
  186. ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  187. return ret;
  188. }
  189. /*
  190. * Gets current TWL RTC time and date parameters.
  191. *
  192. * The RTC's time/alarm representation is not what gmtime(3) requires
  193. * Linux to use:
  194. *
  195. * - Months are 1..12 vs Linux 0-11
  196. * - Years are 0..99 vs Linux 1900..N (we assume 21st century)
  197. */
  198. static int twl_rtc_read_time(struct device *dev, struct rtc_time *tm)
  199. {
  200. unsigned char rtc_data[ALL_TIME_REGS + 1];
  201. int ret;
  202. u8 save_control;
  203. u8 rtc_control;
  204. ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
  205. if (ret < 0) {
  206. dev_err(dev, "%s: reading CTRL_REG, error %d\n", __func__, ret);
  207. return ret;
  208. }
  209. /* for twl6030/32 make sure BIT_RTC_CTRL_REG_GET_TIME_M is clear */
  210. if (twl_class_is_6030()) {
  211. if (save_control & BIT_RTC_CTRL_REG_GET_TIME_M) {
  212. save_control &= ~BIT_RTC_CTRL_REG_GET_TIME_M;
  213. ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  214. if (ret < 0) {
  215. dev_err(dev, "%s clr GET_TIME, error %d\n",
  216. __func__, ret);
  217. return ret;
  218. }
  219. }
  220. }
  221. /* Copy RTC counting registers to static registers or latches */
  222. rtc_control = save_control | BIT_RTC_CTRL_REG_GET_TIME_M;
  223. /* for twl6030/32 enable read access to static shadowed registers */
  224. if (twl_class_is_6030())
  225. rtc_control |= BIT_RTC_CTRL_REG_RTC_V_OPT;
  226. ret = twl_rtc_write_u8(rtc_control, REG_RTC_CTRL_REG);
  227. if (ret < 0) {
  228. dev_err(dev, "%s: writing CTRL_REG, error %d\n", __func__, ret);
  229. return ret;
  230. }
  231. ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
  232. (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
  233. if (ret < 0) {
  234. dev_err(dev, "%s: reading data, error %d\n", __func__, ret);
  235. return ret;
  236. }
  237. /* for twl6030 restore original state of rtc control register */
  238. if (twl_class_is_6030()) {
  239. ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  240. if (ret < 0) {
  241. dev_err(dev, "%s: restore CTRL_REG, error %d\n",
  242. __func__, ret);
  243. return ret;
  244. }
  245. }
  246. tm->tm_sec = bcd2bin(rtc_data[0]);
  247. tm->tm_min = bcd2bin(rtc_data[1]);
  248. tm->tm_hour = bcd2bin(rtc_data[2]);
  249. tm->tm_mday = bcd2bin(rtc_data[3]);
  250. tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
  251. tm->tm_year = bcd2bin(rtc_data[5]) + 100;
  252. return ret;
  253. }
  254. static int twl_rtc_set_time(struct device *dev, struct rtc_time *tm)
  255. {
  256. unsigned char save_control;
  257. unsigned char rtc_data[ALL_TIME_REGS + 1];
  258. int ret;
  259. rtc_data[1] = bin2bcd(tm->tm_sec);
  260. rtc_data[2] = bin2bcd(tm->tm_min);
  261. rtc_data[3] = bin2bcd(tm->tm_hour);
  262. rtc_data[4] = bin2bcd(tm->tm_mday);
  263. rtc_data[5] = bin2bcd(tm->tm_mon + 1);
  264. rtc_data[6] = bin2bcd(tm->tm_year - 100);
  265. /* Stop RTC while updating the TC registers */
  266. ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
  267. if (ret < 0)
  268. goto out;
  269. save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
  270. ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  271. if (ret < 0)
  272. goto out;
  273. /* update all the time registers in one shot */
  274. ret = twl_i2c_write(TWL_MODULE_RTC, rtc_data,
  275. (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
  276. if (ret < 0) {
  277. dev_err(dev, "rtc_set_time error %d\n", ret);
  278. goto out;
  279. }
  280. /* Start back RTC */
  281. save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M;
  282. ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  283. out:
  284. return ret;
  285. }
  286. /*
  287. * Gets current TWL RTC alarm time.
  288. */
  289. static int twl_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  290. {
  291. unsigned char rtc_data[ALL_TIME_REGS + 1];
  292. int ret;
  293. ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
  294. (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS);
  295. if (ret < 0) {
  296. dev_err(dev, "rtc_read_alarm error %d\n", ret);
  297. return ret;
  298. }
  299. /* some of these fields may be wildcard/"match all" */
  300. alm->time.tm_sec = bcd2bin(rtc_data[0]);
  301. alm->time.tm_min = bcd2bin(rtc_data[1]);
  302. alm->time.tm_hour = bcd2bin(rtc_data[2]);
  303. alm->time.tm_mday = bcd2bin(rtc_data[3]);
  304. alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
  305. alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;
  306. /* report cached alarm enable state */
  307. if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
  308. alm->enabled = 1;
  309. return ret;
  310. }
  311. static int twl_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  312. {
  313. unsigned char alarm_data[ALL_TIME_REGS + 1];
  314. int ret;
  315. ret = twl_rtc_alarm_irq_enable(dev, 0);
  316. if (ret)
  317. goto out;
  318. alarm_data[1] = bin2bcd(alm->time.tm_sec);
  319. alarm_data[2] = bin2bcd(alm->time.tm_min);
  320. alarm_data[3] = bin2bcd(alm->time.tm_hour);
  321. alarm_data[4] = bin2bcd(alm->time.tm_mday);
  322. alarm_data[5] = bin2bcd(alm->time.tm_mon + 1);
  323. alarm_data[6] = bin2bcd(alm->time.tm_year - 100);
  324. /* update all the alarm registers in one shot */
  325. ret = twl_i2c_write(TWL_MODULE_RTC, alarm_data,
  326. (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS);
  327. if (ret) {
  328. dev_err(dev, "rtc_set_alarm error %d\n", ret);
  329. goto out;
  330. }
  331. if (alm->enabled)
  332. ret = twl_rtc_alarm_irq_enable(dev, 1);
  333. out:
  334. return ret;
  335. }
  336. static irqreturn_t twl_rtc_interrupt(int irq, void *rtc)
  337. {
  338. unsigned long events;
  339. int ret = IRQ_NONE;
  340. int res;
  341. u8 rd_reg;
  342. res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
  343. if (res)
  344. goto out;
  345. /*
  346. * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
  347. * only one (ALARM or RTC) interrupt source may be enabled
  348. * at time, we also could check our results
  349. * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
  350. */
  351. if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
  352. events = RTC_IRQF | RTC_AF;
  353. else
  354. events = RTC_IRQF | RTC_PF;
  355. res = twl_rtc_write_u8(BIT_RTC_STATUS_REG_ALARM_M,
  356. REG_RTC_STATUS_REG);
  357. if (res)
  358. goto out;
  359. if (twl_class_is_4030()) {
  360. /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
  361. * needs 2 reads to clear the interrupt. One read is done in
  362. * do_twl_pwrirq(). Doing the second read, to clear
  363. * the bit.
  364. *
  365. * FIXME the reason PWR_ISR1 needs an extra read is that
  366. * RTC_IF retriggered until we cleared REG_ALARM_M above.
  367. * But re-reading like this is a bad hack; by doing so we
  368. * risk wrongly clearing status for some other IRQ (losing
  369. * the interrupt). Be smarter about handling RTC_UF ...
  370. */
  371. res = twl_i2c_read_u8(TWL4030_MODULE_INT,
  372. &rd_reg, TWL4030_INT_PWR_ISR1);
  373. if (res)
  374. goto out;
  375. }
  376. /* Notify RTC core on event */
  377. rtc_update_irq(rtc, 1, events);
  378. ret = IRQ_HANDLED;
  379. out:
  380. return ret;
  381. }
  382. static struct rtc_class_ops twl_rtc_ops = {
  383. .read_time = twl_rtc_read_time,
  384. .set_time = twl_rtc_set_time,
  385. .read_alarm = twl_rtc_read_alarm,
  386. .set_alarm = twl_rtc_set_alarm,
  387. .alarm_irq_enable = twl_rtc_alarm_irq_enable,
  388. };
  389. /*----------------------------------------------------------------------*/
  390. static int __devinit twl_rtc_probe(struct platform_device *pdev)
  391. {
  392. struct rtc_device *rtc;
  393. int ret = -EINVAL;
  394. int irq = platform_get_irq(pdev, 0);
  395. u8 rd_reg;
  396. if (irq <= 0)
  397. goto out1;
  398. ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
  399. if (ret < 0)
  400. goto out1;
  401. if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
  402. dev_warn(&pdev->dev, "Power up reset detected.\n");
  403. if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
  404. dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
  405. /* Clear RTC Power up reset and pending alarm interrupts */
  406. ret = twl_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
  407. if (ret < 0)
  408. goto out1;
  409. if (twl_class_is_6030()) {
  410. twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
  411. REG_INT_MSK_LINE_A);
  412. twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
  413. REG_INT_MSK_STS_A);
  414. }
  415. dev_info(&pdev->dev, "Enabling TWL-RTC\n");
  416. ret = twl_rtc_write_u8(BIT_RTC_CTRL_REG_STOP_RTC_M, REG_RTC_CTRL_REG);
  417. if (ret < 0)
  418. goto out1;
  419. /* ensure interrupts are disabled, bootloaders can be strange */
  420. ret = twl_rtc_write_u8(0, REG_RTC_INTERRUPTS_REG);
  421. if (ret < 0)
  422. dev_warn(&pdev->dev, "unable to disable interrupt\n");
  423. /* init cached IRQ enable bits */
  424. ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
  425. if (ret < 0)
  426. goto out1;
  427. rtc = rtc_device_register(pdev->name,
  428. &pdev->dev, &twl_rtc_ops, THIS_MODULE);
  429. if (IS_ERR(rtc)) {
  430. ret = PTR_ERR(rtc);
  431. dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
  432. PTR_ERR(rtc));
  433. goto out1;
  434. }
  435. ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt,
  436. IRQF_TRIGGER_RISING,
  437. dev_name(&rtc->dev), rtc);
  438. if (ret < 0) {
  439. dev_err(&pdev->dev, "IRQ is not free.\n");
  440. goto out2;
  441. }
  442. platform_set_drvdata(pdev, rtc);
  443. device_init_wakeup(&pdev->dev, 1);
  444. return 0;
  445. out2:
  446. rtc_device_unregister(rtc);
  447. out1:
  448. return ret;
  449. }
  450. /*
  451. * Disable all TWL RTC module interrupts.
  452. * Sets status flag to free.
  453. */
  454. static int __devexit twl_rtc_remove(struct platform_device *pdev)
  455. {
  456. /* leave rtc running, but disable irqs */
  457. struct rtc_device *rtc = platform_get_drvdata(pdev);
  458. int irq = platform_get_irq(pdev, 0);
  459. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  460. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  461. if (twl_class_is_6030()) {
  462. twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
  463. REG_INT_MSK_LINE_A);
  464. twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
  465. REG_INT_MSK_STS_A);
  466. }
  467. free_irq(irq, rtc);
  468. rtc_device_unregister(rtc);
  469. platform_set_drvdata(pdev, NULL);
  470. return 0;
  471. }
  472. static void twl_rtc_shutdown(struct platform_device *pdev)
  473. {
  474. /* mask timer interrupts, but leave alarm interrupts on to enable
  475. power-on when alarm is triggered */
  476. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  477. }
  478. #ifdef CONFIG_PM
  479. static unsigned char irqstat;
  480. static int twl_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  481. {
  482. irqstat = rtc_irq_bits;
  483. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  484. return 0;
  485. }
  486. static int twl_rtc_resume(struct platform_device *pdev)
  487. {
  488. set_rtc_irq_bit(irqstat);
  489. return 0;
  490. }
  491. #else
  492. #define twl_rtc_suspend NULL
  493. #define twl_rtc_resume NULL
  494. #endif
  495. static const struct of_device_id twl_rtc_of_match[] = {
  496. {.compatible = "ti,twl4030-rtc", },
  497. { },
  498. };
  499. MODULE_DEVICE_TABLE(of, twl_rtc_of_match);
  500. MODULE_ALIAS("platform:twl_rtc");
  501. static struct platform_driver twl4030rtc_driver = {
  502. .probe = twl_rtc_probe,
  503. .remove = __devexit_p(twl_rtc_remove),
  504. .shutdown = twl_rtc_shutdown,
  505. .suspend = twl_rtc_suspend,
  506. .resume = twl_rtc_resume,
  507. .driver = {
  508. .owner = THIS_MODULE,
  509. .name = "twl_rtc",
  510. .of_match_table = twl_rtc_of_match,
  511. },
  512. };
  513. static int __init twl_rtc_init(void)
  514. {
  515. if (twl_class_is_4030())
  516. rtc_reg_map = (u8 *) twl4030_rtc_reg_map;
  517. else
  518. rtc_reg_map = (u8 *) twl6030_rtc_reg_map;
  519. return platform_driver_register(&twl4030rtc_driver);
  520. }
  521. module_init(twl_rtc_init);
  522. static void __exit twl_rtc_exit(void)
  523. {
  524. platform_driver_unregister(&twl4030rtc_driver);
  525. }
  526. module_exit(twl_rtc_exit);
  527. MODULE_AUTHOR("Texas Instruments, MontaVista Software");
  528. MODULE_LICENSE("GPL");