rtc-sa1100.c 9.3 KB

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  1. /*
  2. * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
  3. *
  4. * Copyright (c) 2000 Nils Faerber
  5. *
  6. * Based on rtc.c by Paul Gortmaker
  7. *
  8. * Original Driver by Nils Faerber <nils@kernelconcepts.de>
  9. *
  10. * Modifications from:
  11. * CIH <cih@coventive.com>
  12. * Nicolas Pitre <nico@fluxnic.net>
  13. * Andrew Christian <andrew.christian@hp.com>
  14. *
  15. * Converted to the RTC subsystem and Driver Model
  16. * by Richard Purdie <rpurdie@rpsys.net>
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License
  20. * as published by the Free Software Foundation; either version
  21. * 2 of the License, or (at your option) any later version.
  22. */
  23. #include <linux/platform_device.h>
  24. #include <linux/module.h>
  25. #include <linux/clk.h>
  26. #include <linux/rtc.h>
  27. #include <linux/init.h>
  28. #include <linux/fs.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/slab.h>
  31. #include <linux/string.h>
  32. #include <linux/of.h>
  33. #include <linux/pm.h>
  34. #include <linux/bitops.h>
  35. #include <linux/io.h>
  36. #include <mach/hardware.h>
  37. #include <mach/irqs.h>
  38. #if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
  39. #include <mach/regs-rtc.h>
  40. #endif
  41. #define RTC_DEF_DIVIDER (32768 - 1)
  42. #define RTC_DEF_TRIM 0
  43. #define RTC_FREQ 1024
  44. struct sa1100_rtc {
  45. spinlock_t lock;
  46. int irq_1hz;
  47. int irq_alarm;
  48. struct rtc_device *rtc;
  49. struct clk *clk;
  50. };
  51. static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
  52. {
  53. struct sa1100_rtc *info = dev_get_drvdata(dev_id);
  54. struct rtc_device *rtc = info->rtc;
  55. unsigned int rtsr;
  56. unsigned long events = 0;
  57. spin_lock(&info->lock);
  58. rtsr = RTSR;
  59. /* clear interrupt sources */
  60. RTSR = 0;
  61. /* Fix for a nasty initialization problem the in SA11xx RTSR register.
  62. * See also the comments in sa1100_rtc_probe(). */
  63. if (rtsr & (RTSR_ALE | RTSR_HZE)) {
  64. /* This is the original code, before there was the if test
  65. * above. This code does not clear interrupts that were not
  66. * enabled. */
  67. RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
  68. } else {
  69. /* For some reason, it is possible to enter this routine
  70. * without interruptions enabled, it has been tested with
  71. * several units (Bug in SA11xx chip?).
  72. *
  73. * This situation leads to an infinite "loop" of interrupt
  74. * routine calling and as a result the processor seems to
  75. * lock on its first call to open(). */
  76. RTSR = RTSR_AL | RTSR_HZ;
  77. }
  78. /* clear alarm interrupt if it has occurred */
  79. if (rtsr & RTSR_AL)
  80. rtsr &= ~RTSR_ALE;
  81. RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
  82. /* update irq data & counter */
  83. if (rtsr & RTSR_AL)
  84. events |= RTC_AF | RTC_IRQF;
  85. if (rtsr & RTSR_HZ)
  86. events |= RTC_UF | RTC_IRQF;
  87. rtc_update_irq(rtc, 1, events);
  88. spin_unlock(&info->lock);
  89. return IRQ_HANDLED;
  90. }
  91. static int sa1100_rtc_open(struct device *dev)
  92. {
  93. struct sa1100_rtc *info = dev_get_drvdata(dev);
  94. struct rtc_device *rtc = info->rtc;
  95. int ret;
  96. ret = clk_prepare_enable(info->clk);
  97. if (ret)
  98. goto fail_clk;
  99. ret = request_irq(info->irq_1hz, sa1100_rtc_interrupt, 0, "rtc 1Hz", dev);
  100. if (ret) {
  101. dev_err(dev, "IRQ %d already in use.\n", info->irq_1hz);
  102. goto fail_ui;
  103. }
  104. ret = request_irq(info->irq_alarm, sa1100_rtc_interrupt, 0, "rtc Alrm", dev);
  105. if (ret) {
  106. dev_err(dev, "IRQ %d already in use.\n", info->irq_alarm);
  107. goto fail_ai;
  108. }
  109. rtc->max_user_freq = RTC_FREQ;
  110. rtc_irq_set_freq(rtc, NULL, RTC_FREQ);
  111. return 0;
  112. fail_ai:
  113. free_irq(info->irq_1hz, dev);
  114. fail_ui:
  115. clk_disable_unprepare(info->clk);
  116. fail_clk:
  117. return ret;
  118. }
  119. static void sa1100_rtc_release(struct device *dev)
  120. {
  121. struct sa1100_rtc *info = dev_get_drvdata(dev);
  122. spin_lock_irq(&info->lock);
  123. RTSR = 0;
  124. spin_unlock_irq(&info->lock);
  125. free_irq(info->irq_alarm, dev);
  126. free_irq(info->irq_1hz, dev);
  127. clk_disable_unprepare(info->clk);
  128. }
  129. static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  130. {
  131. struct sa1100_rtc *info = dev_get_drvdata(dev);
  132. spin_lock_irq(&info->lock);
  133. if (enabled)
  134. RTSR |= RTSR_ALE;
  135. else
  136. RTSR &= ~RTSR_ALE;
  137. spin_unlock_irq(&info->lock);
  138. return 0;
  139. }
  140. static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
  141. {
  142. rtc_time_to_tm(RCNR, tm);
  143. return 0;
  144. }
  145. static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
  146. {
  147. unsigned long time;
  148. int ret;
  149. ret = rtc_tm_to_time(tm, &time);
  150. if (ret == 0)
  151. RCNR = time;
  152. return ret;
  153. }
  154. static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  155. {
  156. u32 rtsr;
  157. rtsr = RTSR;
  158. alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
  159. alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
  160. return 0;
  161. }
  162. static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  163. {
  164. struct sa1100_rtc *info = dev_get_drvdata(dev);
  165. unsigned long time;
  166. int ret;
  167. spin_lock_irq(&info->lock);
  168. ret = rtc_tm_to_time(&alrm->time, &time);
  169. if (ret != 0)
  170. goto out;
  171. RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
  172. RTAR = time;
  173. if (alrm->enabled)
  174. RTSR |= RTSR_ALE;
  175. else
  176. RTSR &= ~RTSR_ALE;
  177. out:
  178. spin_unlock_irq(&info->lock);
  179. return ret;
  180. }
  181. static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
  182. {
  183. seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR);
  184. seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);
  185. return 0;
  186. }
  187. static const struct rtc_class_ops sa1100_rtc_ops = {
  188. .open = sa1100_rtc_open,
  189. .release = sa1100_rtc_release,
  190. .read_time = sa1100_rtc_read_time,
  191. .set_time = sa1100_rtc_set_time,
  192. .read_alarm = sa1100_rtc_read_alarm,
  193. .set_alarm = sa1100_rtc_set_alarm,
  194. .proc = sa1100_rtc_proc,
  195. .alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
  196. };
  197. static int sa1100_rtc_probe(struct platform_device *pdev)
  198. {
  199. struct rtc_device *rtc;
  200. struct sa1100_rtc *info;
  201. int irq_1hz, irq_alarm, ret = 0;
  202. irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz");
  203. irq_alarm = platform_get_irq_byname(pdev, "rtc alarm");
  204. if (irq_1hz < 0 || irq_alarm < 0)
  205. return -ENODEV;
  206. info = kzalloc(sizeof(struct sa1100_rtc), GFP_KERNEL);
  207. if (!info)
  208. return -ENOMEM;
  209. info->clk = clk_get(&pdev->dev, NULL);
  210. if (IS_ERR(info->clk)) {
  211. dev_err(&pdev->dev, "failed to find rtc clock source\n");
  212. ret = PTR_ERR(info->clk);
  213. goto err_clk;
  214. }
  215. info->irq_1hz = irq_1hz;
  216. info->irq_alarm = irq_alarm;
  217. spin_lock_init(&info->lock);
  218. platform_set_drvdata(pdev, info);
  219. /*
  220. * According to the manual we should be able to let RTTR be zero
  221. * and then a default diviser for a 32.768KHz clock is used.
  222. * Apparently this doesn't work, at least for my SA1110 rev 5.
  223. * If the clock divider is uninitialized then reset it to the
  224. * default value to get the 1Hz clock.
  225. */
  226. if (RTTR == 0) {
  227. RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
  228. dev_warn(&pdev->dev, "warning: "
  229. "initializing default clock divider/trim value\n");
  230. /* The current RTC value probably doesn't make sense either */
  231. RCNR = 0;
  232. }
  233. device_init_wakeup(&pdev->dev, 1);
  234. rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
  235. THIS_MODULE);
  236. if (IS_ERR(rtc)) {
  237. ret = PTR_ERR(rtc);
  238. goto err_dev;
  239. }
  240. info->rtc = rtc;
  241. /* Fix for a nasty initialization problem the in SA11xx RTSR register.
  242. * See also the comments in sa1100_rtc_interrupt().
  243. *
  244. * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
  245. * interrupt pending, even though interrupts were never enabled.
  246. * In this case, this bit it must be reset before enabling
  247. * interruptions to avoid a nonexistent interrupt to occur.
  248. *
  249. * In principle, the same problem would apply to bit 0, although it has
  250. * never been observed to happen.
  251. *
  252. * This issue is addressed both here and in sa1100_rtc_interrupt().
  253. * If the issue is not addressed here, in the times when the processor
  254. * wakes up with the bit set there will be one spurious interrupt.
  255. *
  256. * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
  257. * safe side, once the condition that lead to this strange
  258. * initialization is unknown and could in principle happen during
  259. * normal processing.
  260. *
  261. * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
  262. * the corresponding bits in RTSR. */
  263. RTSR = RTSR_AL | RTSR_HZ;
  264. return 0;
  265. err_dev:
  266. platform_set_drvdata(pdev, NULL);
  267. clk_put(info->clk);
  268. err_clk:
  269. kfree(info);
  270. return ret;
  271. }
  272. static int sa1100_rtc_remove(struct platform_device *pdev)
  273. {
  274. struct sa1100_rtc *info = platform_get_drvdata(pdev);
  275. if (info) {
  276. rtc_device_unregister(info->rtc);
  277. clk_put(info->clk);
  278. platform_set_drvdata(pdev, NULL);
  279. kfree(info);
  280. }
  281. return 0;
  282. }
  283. #ifdef CONFIG_PM
  284. static int sa1100_rtc_suspend(struct device *dev)
  285. {
  286. struct sa1100_rtc *info = dev_get_drvdata(dev);
  287. if (device_may_wakeup(dev))
  288. enable_irq_wake(info->irq_alarm);
  289. return 0;
  290. }
  291. static int sa1100_rtc_resume(struct device *dev)
  292. {
  293. struct sa1100_rtc *info = dev_get_drvdata(dev);
  294. if (device_may_wakeup(dev))
  295. disable_irq_wake(info->irq_alarm);
  296. return 0;
  297. }
  298. static const struct dev_pm_ops sa1100_rtc_pm_ops = {
  299. .suspend = sa1100_rtc_suspend,
  300. .resume = sa1100_rtc_resume,
  301. };
  302. #endif
  303. static struct of_device_id sa1100_rtc_dt_ids[] = {
  304. { .compatible = "mrvl,sa1100-rtc", },
  305. { .compatible = "mrvl,mmp-rtc", },
  306. {}
  307. };
  308. MODULE_DEVICE_TABLE(of, sa1100_rtc_dt_ids);
  309. static struct platform_driver sa1100_rtc_driver = {
  310. .probe = sa1100_rtc_probe,
  311. .remove = sa1100_rtc_remove,
  312. .driver = {
  313. .name = "sa1100-rtc",
  314. #ifdef CONFIG_PM
  315. .pm = &sa1100_rtc_pm_ops,
  316. #endif
  317. .of_match_table = sa1100_rtc_dt_ids,
  318. },
  319. };
  320. module_platform_driver(sa1100_rtc_driver);
  321. MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
  322. MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
  323. MODULE_LICENSE("GPL");
  324. MODULE_ALIAS("platform:sa1100-rtc");