rtc-omap.c 13 KB

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  1. /*
  2. * TI OMAP1 Real Time Clock interface for Linux
  3. *
  4. * Copyright (C) 2003 MontaVista Software, Inc.
  5. * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  6. *
  7. * Copyright (C) 2006 David Brownell (new RTC framework)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <linux/ioport.h>
  18. #include <linux/delay.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/platform_device.h>
  22. #include <asm/io.h>
  23. /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
  24. * with century-range alarm matching, driven by the 32kHz clock.
  25. *
  26. * The main user-visible ways it differs from PC RTCs are by omitting
  27. * "don't care" alarm fields and sub-second periodic IRQs, and having
  28. * an autoadjust mechanism to calibrate to the true oscillator rate.
  29. *
  30. * Board-specific wiring options include using split power mode with
  31. * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
  32. * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
  33. * low power modes) for OMAP1 boards (OMAP-L138 has this built into
  34. * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
  35. */
  36. #define OMAP_RTC_BASE 0xfffb4800
  37. /* RTC registers */
  38. #define OMAP_RTC_SECONDS_REG 0x00
  39. #define OMAP_RTC_MINUTES_REG 0x04
  40. #define OMAP_RTC_HOURS_REG 0x08
  41. #define OMAP_RTC_DAYS_REG 0x0C
  42. #define OMAP_RTC_MONTHS_REG 0x10
  43. #define OMAP_RTC_YEARS_REG 0x14
  44. #define OMAP_RTC_WEEKS_REG 0x18
  45. #define OMAP_RTC_ALARM_SECONDS_REG 0x20
  46. #define OMAP_RTC_ALARM_MINUTES_REG 0x24
  47. #define OMAP_RTC_ALARM_HOURS_REG 0x28
  48. #define OMAP_RTC_ALARM_DAYS_REG 0x2c
  49. #define OMAP_RTC_ALARM_MONTHS_REG 0x30
  50. #define OMAP_RTC_ALARM_YEARS_REG 0x34
  51. #define OMAP_RTC_CTRL_REG 0x40
  52. #define OMAP_RTC_STATUS_REG 0x44
  53. #define OMAP_RTC_INTERRUPTS_REG 0x48
  54. #define OMAP_RTC_COMP_LSB_REG 0x4c
  55. #define OMAP_RTC_COMP_MSB_REG 0x50
  56. #define OMAP_RTC_OSC_REG 0x54
  57. /* OMAP_RTC_CTRL_REG bit fields: */
  58. #define OMAP_RTC_CTRL_SPLIT (1<<7)
  59. #define OMAP_RTC_CTRL_DISABLE (1<<6)
  60. #define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5)
  61. #define OMAP_RTC_CTRL_TEST (1<<4)
  62. #define OMAP_RTC_CTRL_MODE_12_24 (1<<3)
  63. #define OMAP_RTC_CTRL_AUTO_COMP (1<<2)
  64. #define OMAP_RTC_CTRL_ROUND_30S (1<<1)
  65. #define OMAP_RTC_CTRL_STOP (1<<0)
  66. /* OMAP_RTC_STATUS_REG bit fields: */
  67. #define OMAP_RTC_STATUS_POWER_UP (1<<7)
  68. #define OMAP_RTC_STATUS_ALARM (1<<6)
  69. #define OMAP_RTC_STATUS_1D_EVENT (1<<5)
  70. #define OMAP_RTC_STATUS_1H_EVENT (1<<4)
  71. #define OMAP_RTC_STATUS_1M_EVENT (1<<3)
  72. #define OMAP_RTC_STATUS_1S_EVENT (1<<2)
  73. #define OMAP_RTC_STATUS_RUN (1<<1)
  74. #define OMAP_RTC_STATUS_BUSY (1<<0)
  75. /* OMAP_RTC_INTERRUPTS_REG bit fields: */
  76. #define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3)
  77. #define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2)
  78. static void __iomem *rtc_base;
  79. #define rtc_read(addr) __raw_readb(rtc_base + (addr))
  80. #define rtc_write(val, addr) __raw_writeb(val, rtc_base + (addr))
  81. /* we rely on the rtc framework to handle locking (rtc->ops_lock),
  82. * so the only other requirement is that register accesses which
  83. * require BUSY to be clear are made with IRQs locally disabled
  84. */
  85. static void rtc_wait_not_busy(void)
  86. {
  87. int count = 0;
  88. u8 status;
  89. /* BUSY may stay active for 1/32768 second (~30 usec) */
  90. for (count = 0; count < 50; count++) {
  91. status = rtc_read(OMAP_RTC_STATUS_REG);
  92. if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
  93. break;
  94. udelay(1);
  95. }
  96. /* now we have ~15 usec to read/write various registers */
  97. }
  98. static irqreturn_t rtc_irq(int irq, void *rtc)
  99. {
  100. unsigned long events = 0;
  101. u8 irq_data;
  102. irq_data = rtc_read(OMAP_RTC_STATUS_REG);
  103. /* alarm irq? */
  104. if (irq_data & OMAP_RTC_STATUS_ALARM) {
  105. rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
  106. events |= RTC_IRQF | RTC_AF;
  107. }
  108. /* 1/sec periodic/update irq? */
  109. if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
  110. events |= RTC_IRQF | RTC_UF;
  111. rtc_update_irq(rtc, 1, events);
  112. return IRQ_HANDLED;
  113. }
  114. static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  115. {
  116. u8 reg;
  117. local_irq_disable();
  118. rtc_wait_not_busy();
  119. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  120. if (enabled)
  121. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  122. else
  123. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  124. rtc_wait_not_busy();
  125. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  126. local_irq_enable();
  127. return 0;
  128. }
  129. /* this hardware doesn't support "don't care" alarm fields */
  130. static int tm2bcd(struct rtc_time *tm)
  131. {
  132. if (rtc_valid_tm(tm) != 0)
  133. return -EINVAL;
  134. tm->tm_sec = bin2bcd(tm->tm_sec);
  135. tm->tm_min = bin2bcd(tm->tm_min);
  136. tm->tm_hour = bin2bcd(tm->tm_hour);
  137. tm->tm_mday = bin2bcd(tm->tm_mday);
  138. tm->tm_mon = bin2bcd(tm->tm_mon + 1);
  139. /* epoch == 1900 */
  140. if (tm->tm_year < 100 || tm->tm_year > 199)
  141. return -EINVAL;
  142. tm->tm_year = bin2bcd(tm->tm_year - 100);
  143. return 0;
  144. }
  145. static void bcd2tm(struct rtc_time *tm)
  146. {
  147. tm->tm_sec = bcd2bin(tm->tm_sec);
  148. tm->tm_min = bcd2bin(tm->tm_min);
  149. tm->tm_hour = bcd2bin(tm->tm_hour);
  150. tm->tm_mday = bcd2bin(tm->tm_mday);
  151. tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
  152. /* epoch == 1900 */
  153. tm->tm_year = bcd2bin(tm->tm_year) + 100;
  154. }
  155. static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
  156. {
  157. /* we don't report wday/yday/isdst ... */
  158. local_irq_disable();
  159. rtc_wait_not_busy();
  160. tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
  161. tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
  162. tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
  163. tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
  164. tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
  165. tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);
  166. local_irq_enable();
  167. bcd2tm(tm);
  168. return 0;
  169. }
  170. static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
  171. {
  172. if (tm2bcd(tm) < 0)
  173. return -EINVAL;
  174. local_irq_disable();
  175. rtc_wait_not_busy();
  176. rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
  177. rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
  178. rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
  179. rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
  180. rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
  181. rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);
  182. local_irq_enable();
  183. return 0;
  184. }
  185. static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  186. {
  187. local_irq_disable();
  188. rtc_wait_not_busy();
  189. alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
  190. alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
  191. alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
  192. alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
  193. alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
  194. alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);
  195. local_irq_enable();
  196. bcd2tm(&alm->time);
  197. alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
  198. & OMAP_RTC_INTERRUPTS_IT_ALARM);
  199. return 0;
  200. }
  201. static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  202. {
  203. u8 reg;
  204. if (tm2bcd(&alm->time) < 0)
  205. return -EINVAL;
  206. local_irq_disable();
  207. rtc_wait_not_busy();
  208. rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
  209. rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
  210. rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
  211. rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
  212. rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
  213. rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);
  214. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  215. if (alm->enabled)
  216. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  217. else
  218. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  219. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  220. local_irq_enable();
  221. return 0;
  222. }
  223. static struct rtc_class_ops omap_rtc_ops = {
  224. .read_time = omap_rtc_read_time,
  225. .set_time = omap_rtc_set_time,
  226. .read_alarm = omap_rtc_read_alarm,
  227. .set_alarm = omap_rtc_set_alarm,
  228. .alarm_irq_enable = omap_rtc_alarm_irq_enable,
  229. };
  230. static int omap_rtc_alarm;
  231. static int omap_rtc_timer;
  232. static int __init omap_rtc_probe(struct platform_device *pdev)
  233. {
  234. struct resource *res, *mem;
  235. struct rtc_device *rtc;
  236. u8 reg, new_ctrl;
  237. omap_rtc_timer = platform_get_irq(pdev, 0);
  238. if (omap_rtc_timer <= 0) {
  239. pr_debug("%s: no update irq?\n", pdev->name);
  240. return -ENOENT;
  241. }
  242. omap_rtc_alarm = platform_get_irq(pdev, 1);
  243. if (omap_rtc_alarm <= 0) {
  244. pr_debug("%s: no alarm irq?\n", pdev->name);
  245. return -ENOENT;
  246. }
  247. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  248. if (!res) {
  249. pr_debug("%s: RTC resource data missing\n", pdev->name);
  250. return -ENOENT;
  251. }
  252. mem = request_mem_region(res->start, resource_size(res), pdev->name);
  253. if (!mem) {
  254. pr_debug("%s: RTC registers at %08x are not free\n",
  255. pdev->name, res->start);
  256. return -EBUSY;
  257. }
  258. rtc_base = ioremap(res->start, resource_size(res));
  259. if (!rtc_base) {
  260. pr_debug("%s: RTC registers can't be mapped\n", pdev->name);
  261. goto fail;
  262. }
  263. rtc = rtc_device_register(pdev->name, &pdev->dev,
  264. &omap_rtc_ops, THIS_MODULE);
  265. if (IS_ERR(rtc)) {
  266. pr_debug("%s: can't register RTC device, err %ld\n",
  267. pdev->name, PTR_ERR(rtc));
  268. goto fail0;
  269. }
  270. platform_set_drvdata(pdev, rtc);
  271. dev_set_drvdata(&rtc->dev, mem);
  272. /* clear pending irqs, and set 1/second periodic,
  273. * which we'll use instead of update irqs
  274. */
  275. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  276. /* clear old status */
  277. reg = rtc_read(OMAP_RTC_STATUS_REG);
  278. if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
  279. pr_info("%s: RTC power up reset detected\n",
  280. pdev->name);
  281. rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
  282. }
  283. if (reg & (u8) OMAP_RTC_STATUS_ALARM)
  284. rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
  285. /* handle periodic and alarm irqs */
  286. if (request_irq(omap_rtc_timer, rtc_irq, 0,
  287. dev_name(&rtc->dev), rtc)) {
  288. pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
  289. pdev->name, omap_rtc_timer);
  290. goto fail1;
  291. }
  292. if ((omap_rtc_timer != omap_rtc_alarm) &&
  293. (request_irq(omap_rtc_alarm, rtc_irq, 0,
  294. dev_name(&rtc->dev), rtc))) {
  295. pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
  296. pdev->name, omap_rtc_alarm);
  297. goto fail2;
  298. }
  299. /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
  300. reg = rtc_read(OMAP_RTC_CTRL_REG);
  301. if (reg & (u8) OMAP_RTC_CTRL_STOP)
  302. pr_info("%s: already running\n", pdev->name);
  303. /* force to 24 hour mode */
  304. new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
  305. new_ctrl |= OMAP_RTC_CTRL_STOP;
  306. /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
  307. *
  308. * - Device wake-up capability setting should come through chip
  309. * init logic. OMAP1 boards should initialize the "wakeup capable"
  310. * flag in the platform device if the board is wired right for
  311. * being woken up by RTC alarm. For OMAP-L138, this capability
  312. * is built into the SoC by the "Deep Sleep" capability.
  313. *
  314. * - Boards wired so RTC_ON_nOFF is used as the reset signal,
  315. * rather than nPWRON_RESET, should forcibly enable split
  316. * power mode. (Some chip errata report that RTC_CTRL_SPLIT
  317. * is write-only, and always reads as zero...)
  318. */
  319. if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
  320. pr_info("%s: split power mode\n", pdev->name);
  321. if (reg != new_ctrl)
  322. rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
  323. return 0;
  324. fail2:
  325. free_irq(omap_rtc_timer, rtc);
  326. fail1:
  327. rtc_device_unregister(rtc);
  328. fail0:
  329. iounmap(rtc_base);
  330. fail:
  331. release_mem_region(mem->start, resource_size(mem));
  332. return -EIO;
  333. }
  334. static int __exit omap_rtc_remove(struct platform_device *pdev)
  335. {
  336. struct rtc_device *rtc = platform_get_drvdata(pdev);
  337. struct resource *mem = dev_get_drvdata(&rtc->dev);
  338. device_init_wakeup(&pdev->dev, 0);
  339. /* leave rtc running, but disable irqs */
  340. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  341. free_irq(omap_rtc_timer, rtc);
  342. if (omap_rtc_timer != omap_rtc_alarm)
  343. free_irq(omap_rtc_alarm, rtc);
  344. rtc_device_unregister(rtc);
  345. iounmap(rtc_base);
  346. release_mem_region(mem->start, resource_size(mem));
  347. return 0;
  348. }
  349. #ifdef CONFIG_PM
  350. static u8 irqstat;
  351. static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  352. {
  353. irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  354. /* FIXME the RTC alarm is not currently acting as a wakeup event
  355. * source, and in fact this enable() call is just saving a flag
  356. * that's never used...
  357. */
  358. if (device_may_wakeup(&pdev->dev))
  359. enable_irq_wake(omap_rtc_alarm);
  360. else
  361. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  362. return 0;
  363. }
  364. static int omap_rtc_resume(struct platform_device *pdev)
  365. {
  366. if (device_may_wakeup(&pdev->dev))
  367. disable_irq_wake(omap_rtc_alarm);
  368. else
  369. rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
  370. return 0;
  371. }
  372. #else
  373. #define omap_rtc_suspend NULL
  374. #define omap_rtc_resume NULL
  375. #endif
  376. static void omap_rtc_shutdown(struct platform_device *pdev)
  377. {
  378. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  379. }
  380. MODULE_ALIAS("platform:omap_rtc");
  381. static struct platform_driver omap_rtc_driver = {
  382. .remove = __exit_p(omap_rtc_remove),
  383. .suspend = omap_rtc_suspend,
  384. .resume = omap_rtc_resume,
  385. .shutdown = omap_rtc_shutdown,
  386. .driver = {
  387. .name = "omap_rtc",
  388. .owner = THIS_MODULE,
  389. },
  390. };
  391. static int __init rtc_init(void)
  392. {
  393. return platform_driver_probe(&omap_rtc_driver, omap_rtc_probe);
  394. }
  395. module_init(rtc_init);
  396. static void __exit rtc_exit(void)
  397. {
  398. platform_driver_unregister(&omap_rtc_driver);
  399. }
  400. module_exit(rtc_exit);
  401. MODULE_AUTHOR("George G. Davis (and others)");
  402. MODULE_LICENSE("GPL");