tps65910-regulator.c 31 KB

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  1. /*
  2. * tps65910.c -- TI tps65910
  3. *
  4. * Copyright 2010 Texas Instruments Inc.
  5. *
  6. * Author: Graeme Gregory <gg@slimlogic.co.uk>
  7. * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/err.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/delay.h>
  23. #include <linux/slab.h>
  24. #include <linux/gpio.h>
  25. #include <linux/mfd/tps65910.h>
  26. #define TPS65910_SUPPLY_STATE_ENABLED 0x1
  27. #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
  28. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
  29. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
  30. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  31. /* supported VIO voltages in milivolts */
  32. static const u16 VIO_VSEL_table[] = {
  33. 1500, 1800, 2500, 3300,
  34. };
  35. /* VSEL tables for TPS65910 specific LDOs and dcdc's */
  36. /* supported VDD3 voltages in milivolts */
  37. static const u16 VDD3_VSEL_table[] = {
  38. 5000,
  39. };
  40. /* supported VDIG1 voltages in milivolts */
  41. static const u16 VDIG1_VSEL_table[] = {
  42. 1200, 1500, 1800, 2700,
  43. };
  44. /* supported VDIG2 voltages in milivolts */
  45. static const u16 VDIG2_VSEL_table[] = {
  46. 1000, 1100, 1200, 1800,
  47. };
  48. /* supported VPLL voltages in milivolts */
  49. static const u16 VPLL_VSEL_table[] = {
  50. 1000, 1100, 1800, 2500,
  51. };
  52. /* supported VDAC voltages in milivolts */
  53. static const u16 VDAC_VSEL_table[] = {
  54. 1800, 2600, 2800, 2850,
  55. };
  56. /* supported VAUX1 voltages in milivolts */
  57. static const u16 VAUX1_VSEL_table[] = {
  58. 1800, 2500, 2800, 2850,
  59. };
  60. /* supported VAUX2 voltages in milivolts */
  61. static const u16 VAUX2_VSEL_table[] = {
  62. 1800, 2800, 2900, 3300,
  63. };
  64. /* supported VAUX33 voltages in milivolts */
  65. static const u16 VAUX33_VSEL_table[] = {
  66. 1800, 2000, 2800, 3300,
  67. };
  68. /* supported VMMC voltages in milivolts */
  69. static const u16 VMMC_VSEL_table[] = {
  70. 1800, 2800, 3000, 3300,
  71. };
  72. struct tps_info {
  73. const char *name;
  74. unsigned min_uV;
  75. unsigned max_uV;
  76. u8 n_voltages;
  77. const u16 *voltage_table;
  78. int enable_time_us;
  79. };
  80. static struct tps_info tps65910_regs[] = {
  81. {
  82. .name = "VRTC",
  83. .enable_time_us = 2200,
  84. },
  85. {
  86. .name = "VIO",
  87. .min_uV = 1500000,
  88. .max_uV = 3300000,
  89. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  90. .voltage_table = VIO_VSEL_table,
  91. .enable_time_us = 350,
  92. },
  93. {
  94. .name = "VDD1",
  95. .min_uV = 600000,
  96. .max_uV = 4500000,
  97. .enable_time_us = 350,
  98. },
  99. {
  100. .name = "VDD2",
  101. .min_uV = 600000,
  102. .max_uV = 4500000,
  103. .enable_time_us = 350,
  104. },
  105. {
  106. .name = "VDD3",
  107. .min_uV = 5000000,
  108. .max_uV = 5000000,
  109. .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
  110. .voltage_table = VDD3_VSEL_table,
  111. .enable_time_us = 200,
  112. },
  113. {
  114. .name = "VDIG1",
  115. .min_uV = 1200000,
  116. .max_uV = 2700000,
  117. .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
  118. .voltage_table = VDIG1_VSEL_table,
  119. .enable_time_us = 100,
  120. },
  121. {
  122. .name = "VDIG2",
  123. .min_uV = 1000000,
  124. .max_uV = 1800000,
  125. .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
  126. .voltage_table = VDIG2_VSEL_table,
  127. .enable_time_us = 100,
  128. },
  129. {
  130. .name = "VPLL",
  131. .min_uV = 1000000,
  132. .max_uV = 2500000,
  133. .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
  134. .voltage_table = VPLL_VSEL_table,
  135. .enable_time_us = 100,
  136. },
  137. {
  138. .name = "VDAC",
  139. .min_uV = 1800000,
  140. .max_uV = 2850000,
  141. .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
  142. .voltage_table = VDAC_VSEL_table,
  143. .enable_time_us = 100,
  144. },
  145. {
  146. .name = "VAUX1",
  147. .min_uV = 1800000,
  148. .max_uV = 2850000,
  149. .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
  150. .voltage_table = VAUX1_VSEL_table,
  151. .enable_time_us = 100,
  152. },
  153. {
  154. .name = "VAUX2",
  155. .min_uV = 1800000,
  156. .max_uV = 3300000,
  157. .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
  158. .voltage_table = VAUX2_VSEL_table,
  159. .enable_time_us = 100,
  160. },
  161. {
  162. .name = "VAUX33",
  163. .min_uV = 1800000,
  164. .max_uV = 3300000,
  165. .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
  166. .voltage_table = VAUX33_VSEL_table,
  167. .enable_time_us = 100,
  168. },
  169. {
  170. .name = "VMMC",
  171. .min_uV = 1800000,
  172. .max_uV = 3300000,
  173. .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
  174. .voltage_table = VMMC_VSEL_table,
  175. .enable_time_us = 100,
  176. },
  177. };
  178. static struct tps_info tps65911_regs[] = {
  179. {
  180. .name = "VRTC",
  181. .enable_time_us = 2200,
  182. },
  183. {
  184. .name = "VIO",
  185. .min_uV = 1500000,
  186. .max_uV = 3300000,
  187. .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
  188. .voltage_table = VIO_VSEL_table,
  189. .enable_time_us = 350,
  190. },
  191. {
  192. .name = "VDD1",
  193. .min_uV = 600000,
  194. .max_uV = 4500000,
  195. .n_voltages = 73,
  196. .enable_time_us = 350,
  197. },
  198. {
  199. .name = "VDD2",
  200. .min_uV = 600000,
  201. .max_uV = 4500000,
  202. .n_voltages = 73,
  203. .enable_time_us = 350,
  204. },
  205. {
  206. .name = "VDDCTRL",
  207. .min_uV = 600000,
  208. .max_uV = 1400000,
  209. .n_voltages = 65,
  210. .enable_time_us = 900,
  211. },
  212. {
  213. .name = "LDO1",
  214. .min_uV = 1000000,
  215. .max_uV = 3300000,
  216. .n_voltages = 47,
  217. .enable_time_us = 420,
  218. },
  219. {
  220. .name = "LDO2",
  221. .min_uV = 1000000,
  222. .max_uV = 3300000,
  223. .n_voltages = 47,
  224. .enable_time_us = 420,
  225. },
  226. {
  227. .name = "LDO3",
  228. .min_uV = 1000000,
  229. .max_uV = 3300000,
  230. .n_voltages = 24,
  231. .enable_time_us = 230,
  232. },
  233. {
  234. .name = "LDO4",
  235. .min_uV = 1000000,
  236. .max_uV = 3300000,
  237. .n_voltages = 47,
  238. .enable_time_us = 230,
  239. },
  240. {
  241. .name = "LDO5",
  242. .min_uV = 1000000,
  243. .max_uV = 3300000,
  244. .n_voltages = 24,
  245. .enable_time_us = 230,
  246. },
  247. {
  248. .name = "LDO6",
  249. .min_uV = 1000000,
  250. .max_uV = 3300000,
  251. .n_voltages = 24,
  252. .enable_time_us = 230,
  253. },
  254. {
  255. .name = "LDO7",
  256. .min_uV = 1000000,
  257. .max_uV = 3300000,
  258. .n_voltages = 24,
  259. .enable_time_us = 230,
  260. },
  261. {
  262. .name = "LDO8",
  263. .min_uV = 1000000,
  264. .max_uV = 3300000,
  265. .n_voltages = 24,
  266. .enable_time_us = 230,
  267. },
  268. };
  269. #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
  270. static unsigned int tps65910_ext_sleep_control[] = {
  271. 0,
  272. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  273. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  274. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  275. EXT_CONTROL_REG_BITS(VDD3, 1, 3),
  276. EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
  277. EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
  278. EXT_CONTROL_REG_BITS(VPLL, 0, 6),
  279. EXT_CONTROL_REG_BITS(VDAC, 0, 7),
  280. EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
  281. EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
  282. EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
  283. EXT_CONTROL_REG_BITS(VMMC, 0, 0),
  284. };
  285. static unsigned int tps65911_ext_sleep_control[] = {
  286. 0,
  287. EXT_CONTROL_REG_BITS(VIO, 1, 0),
  288. EXT_CONTROL_REG_BITS(VDD1, 1, 1),
  289. EXT_CONTROL_REG_BITS(VDD2, 1, 2),
  290. EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
  291. EXT_CONTROL_REG_BITS(LDO1, 0, 1),
  292. EXT_CONTROL_REG_BITS(LDO2, 0, 2),
  293. EXT_CONTROL_REG_BITS(LDO3, 0, 7),
  294. EXT_CONTROL_REG_BITS(LDO4, 0, 6),
  295. EXT_CONTROL_REG_BITS(LDO5, 0, 3),
  296. EXT_CONTROL_REG_BITS(LDO6, 0, 0),
  297. EXT_CONTROL_REG_BITS(LDO7, 0, 5),
  298. EXT_CONTROL_REG_BITS(LDO8, 0, 4),
  299. };
  300. struct tps65910_reg {
  301. struct regulator_desc *desc;
  302. struct tps65910 *mfd;
  303. struct regulator_dev **rdev;
  304. struct tps_info **info;
  305. struct mutex mutex;
  306. int num_regulators;
  307. int mode;
  308. int (*get_ctrl_reg)(int);
  309. unsigned int *ext_sleep_control;
  310. unsigned int board_ext_control[TPS65910_NUM_REGS];
  311. };
  312. static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
  313. {
  314. u8 val;
  315. int err;
  316. err = pmic->mfd->read(pmic->mfd, reg, 1, &val);
  317. if (err)
  318. return err;
  319. return val;
  320. }
  321. static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val)
  322. {
  323. return pmic->mfd->write(pmic->mfd, reg, 1, &val);
  324. }
  325. static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
  326. u8 set_mask, u8 clear_mask)
  327. {
  328. int err, data;
  329. mutex_lock(&pmic->mutex);
  330. data = tps65910_read(pmic, reg);
  331. if (data < 0) {
  332. dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
  333. err = data;
  334. goto out;
  335. }
  336. data &= ~clear_mask;
  337. data |= set_mask;
  338. err = tps65910_write(pmic, reg, data);
  339. if (err)
  340. dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
  341. out:
  342. mutex_unlock(&pmic->mutex);
  343. return err;
  344. }
  345. static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg)
  346. {
  347. int data;
  348. mutex_lock(&pmic->mutex);
  349. data = tps65910_read(pmic, reg);
  350. if (data < 0)
  351. dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
  352. mutex_unlock(&pmic->mutex);
  353. return data;
  354. }
  355. static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val)
  356. {
  357. int err;
  358. mutex_lock(&pmic->mutex);
  359. err = tps65910_write(pmic, reg, val);
  360. if (err < 0)
  361. dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
  362. mutex_unlock(&pmic->mutex);
  363. return err;
  364. }
  365. static int tps65910_get_ctrl_register(int id)
  366. {
  367. switch (id) {
  368. case TPS65910_REG_VRTC:
  369. return TPS65910_VRTC;
  370. case TPS65910_REG_VIO:
  371. return TPS65910_VIO;
  372. case TPS65910_REG_VDD1:
  373. return TPS65910_VDD1;
  374. case TPS65910_REG_VDD2:
  375. return TPS65910_VDD2;
  376. case TPS65910_REG_VDD3:
  377. return TPS65910_VDD3;
  378. case TPS65910_REG_VDIG1:
  379. return TPS65910_VDIG1;
  380. case TPS65910_REG_VDIG2:
  381. return TPS65910_VDIG2;
  382. case TPS65910_REG_VPLL:
  383. return TPS65910_VPLL;
  384. case TPS65910_REG_VDAC:
  385. return TPS65910_VDAC;
  386. case TPS65910_REG_VAUX1:
  387. return TPS65910_VAUX1;
  388. case TPS65910_REG_VAUX2:
  389. return TPS65910_VAUX2;
  390. case TPS65910_REG_VAUX33:
  391. return TPS65910_VAUX33;
  392. case TPS65910_REG_VMMC:
  393. return TPS65910_VMMC;
  394. default:
  395. return -EINVAL;
  396. }
  397. }
  398. static int tps65911_get_ctrl_register(int id)
  399. {
  400. switch (id) {
  401. case TPS65910_REG_VRTC:
  402. return TPS65910_VRTC;
  403. case TPS65910_REG_VIO:
  404. return TPS65910_VIO;
  405. case TPS65910_REG_VDD1:
  406. return TPS65910_VDD1;
  407. case TPS65910_REG_VDD2:
  408. return TPS65910_VDD2;
  409. case TPS65911_REG_VDDCTRL:
  410. return TPS65911_VDDCTRL;
  411. case TPS65911_REG_LDO1:
  412. return TPS65911_LDO1;
  413. case TPS65911_REG_LDO2:
  414. return TPS65911_LDO2;
  415. case TPS65911_REG_LDO3:
  416. return TPS65911_LDO3;
  417. case TPS65911_REG_LDO4:
  418. return TPS65911_LDO4;
  419. case TPS65911_REG_LDO5:
  420. return TPS65911_LDO5;
  421. case TPS65911_REG_LDO6:
  422. return TPS65911_LDO6;
  423. case TPS65911_REG_LDO7:
  424. return TPS65911_LDO7;
  425. case TPS65911_REG_LDO8:
  426. return TPS65911_LDO8;
  427. default:
  428. return -EINVAL;
  429. }
  430. }
  431. static int tps65910_is_enabled(struct regulator_dev *dev)
  432. {
  433. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  434. int reg, value, id = rdev_get_id(dev);
  435. reg = pmic->get_ctrl_reg(id);
  436. if (reg < 0)
  437. return reg;
  438. value = tps65910_reg_read(pmic, reg);
  439. if (value < 0)
  440. return value;
  441. return value & TPS65910_SUPPLY_STATE_ENABLED;
  442. }
  443. static int tps65910_enable(struct regulator_dev *dev)
  444. {
  445. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  446. struct tps65910 *mfd = pmic->mfd;
  447. int reg, id = rdev_get_id(dev);
  448. reg = pmic->get_ctrl_reg(id);
  449. if (reg < 0)
  450. return reg;
  451. return tps65910_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
  452. }
  453. static int tps65910_disable(struct regulator_dev *dev)
  454. {
  455. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  456. struct tps65910 *mfd = pmic->mfd;
  457. int reg, id = rdev_get_id(dev);
  458. reg = pmic->get_ctrl_reg(id);
  459. if (reg < 0)
  460. return reg;
  461. return tps65910_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
  462. }
  463. static int tps65910_enable_time(struct regulator_dev *dev)
  464. {
  465. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  466. int id = rdev_get_id(dev);
  467. return pmic->info[id]->enable_time_us;
  468. }
  469. static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
  470. {
  471. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  472. struct tps65910 *mfd = pmic->mfd;
  473. int reg, value, id = rdev_get_id(dev);
  474. reg = pmic->get_ctrl_reg(id);
  475. if (reg < 0)
  476. return reg;
  477. switch (mode) {
  478. case REGULATOR_MODE_NORMAL:
  479. return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT,
  480. LDO_ST_MODE_BIT);
  481. case REGULATOR_MODE_IDLE:
  482. value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
  483. return tps65910_set_bits(mfd, reg, value);
  484. case REGULATOR_MODE_STANDBY:
  485. return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT);
  486. }
  487. return -EINVAL;
  488. }
  489. static unsigned int tps65910_get_mode(struct regulator_dev *dev)
  490. {
  491. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  492. int reg, value, id = rdev_get_id(dev);
  493. reg = pmic->get_ctrl_reg(id);
  494. if (reg < 0)
  495. return reg;
  496. value = tps65910_reg_read(pmic, reg);
  497. if (value < 0)
  498. return value;
  499. if (!(value & LDO_ST_ON_BIT))
  500. return REGULATOR_MODE_STANDBY;
  501. else if (value & LDO_ST_MODE_BIT)
  502. return REGULATOR_MODE_IDLE;
  503. else
  504. return REGULATOR_MODE_NORMAL;
  505. }
  506. static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
  507. {
  508. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  509. int id = rdev_get_id(dev);
  510. int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
  511. switch (id) {
  512. case TPS65910_REG_VDD1:
  513. opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP);
  514. mult = tps65910_reg_read(pmic, TPS65910_VDD1);
  515. mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
  516. srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR);
  517. sr = opvsel & VDD1_OP_CMD_MASK;
  518. opvsel &= VDD1_OP_SEL_MASK;
  519. srvsel &= VDD1_SR_SEL_MASK;
  520. vselmax = 75;
  521. break;
  522. case TPS65910_REG_VDD2:
  523. opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP);
  524. mult = tps65910_reg_read(pmic, TPS65910_VDD2);
  525. mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
  526. srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR);
  527. sr = opvsel & VDD2_OP_CMD_MASK;
  528. opvsel &= VDD2_OP_SEL_MASK;
  529. srvsel &= VDD2_SR_SEL_MASK;
  530. vselmax = 75;
  531. break;
  532. case TPS65911_REG_VDDCTRL:
  533. opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP);
  534. srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR);
  535. sr = opvsel & VDDCTRL_OP_CMD_MASK;
  536. opvsel &= VDDCTRL_OP_SEL_MASK;
  537. srvsel &= VDDCTRL_SR_SEL_MASK;
  538. vselmax = 64;
  539. break;
  540. }
  541. /* multiplier 0 == 1 but 2,3 normal */
  542. if (!mult)
  543. mult=1;
  544. if (sr) {
  545. /* normalise to valid range */
  546. if (srvsel < 3)
  547. srvsel = 3;
  548. if (srvsel > vselmax)
  549. srvsel = vselmax;
  550. return srvsel - 3;
  551. } else {
  552. /* normalise to valid range*/
  553. if (opvsel < 3)
  554. opvsel = 3;
  555. if (opvsel > vselmax)
  556. opvsel = vselmax;
  557. return opvsel - 3;
  558. }
  559. return -EINVAL;
  560. }
  561. static int tps65910_get_voltage(struct regulator_dev *dev)
  562. {
  563. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  564. int reg, value, id = rdev_get_id(dev), voltage = 0;
  565. reg = pmic->get_ctrl_reg(id);
  566. if (reg < 0)
  567. return reg;
  568. value = tps65910_reg_read(pmic, reg);
  569. if (value < 0)
  570. return value;
  571. switch (id) {
  572. case TPS65910_REG_VIO:
  573. case TPS65910_REG_VDIG1:
  574. case TPS65910_REG_VDIG2:
  575. case TPS65910_REG_VPLL:
  576. case TPS65910_REG_VDAC:
  577. case TPS65910_REG_VAUX1:
  578. case TPS65910_REG_VAUX2:
  579. case TPS65910_REG_VAUX33:
  580. case TPS65910_REG_VMMC:
  581. value &= LDO_SEL_MASK;
  582. value >>= LDO_SEL_SHIFT;
  583. break;
  584. default:
  585. return -EINVAL;
  586. }
  587. voltage = pmic->info[id]->voltage_table[value] * 1000;
  588. return voltage;
  589. }
  590. static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
  591. {
  592. return 5 * 1000 * 1000;
  593. }
  594. static int tps65911_get_voltage(struct regulator_dev *dev)
  595. {
  596. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  597. int step_mv, id = rdev_get_id(dev);
  598. u8 value, reg;
  599. reg = pmic->get_ctrl_reg(id);
  600. value = tps65910_reg_read(pmic, reg);
  601. switch (id) {
  602. case TPS65911_REG_LDO1:
  603. case TPS65911_REG_LDO2:
  604. case TPS65911_REG_LDO4:
  605. value &= LDO1_SEL_MASK;
  606. value >>= LDO_SEL_SHIFT;
  607. /* The first 5 values of the selector correspond to 1V */
  608. if (value < 5)
  609. value = 0;
  610. else
  611. value -= 4;
  612. step_mv = 50;
  613. break;
  614. case TPS65911_REG_LDO3:
  615. case TPS65911_REG_LDO5:
  616. case TPS65911_REG_LDO6:
  617. case TPS65911_REG_LDO7:
  618. case TPS65911_REG_LDO8:
  619. value &= LDO3_SEL_MASK;
  620. value >>= LDO_SEL_SHIFT;
  621. /* The first 3 values of the selector correspond to 1V */
  622. if (value < 3)
  623. value = 0;
  624. else
  625. value -= 2;
  626. step_mv = 100;
  627. break;
  628. case TPS65910_REG_VIO:
  629. value &= LDO_SEL_MASK;
  630. value >>= LDO_SEL_SHIFT;
  631. return pmic->info[id]->voltage_table[value] * 1000;
  632. default:
  633. return -EINVAL;
  634. }
  635. return (LDO_MIN_VOLT + value * step_mv) * 1000;
  636. }
  637. static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
  638. unsigned selector)
  639. {
  640. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  641. int id = rdev_get_id(dev), vsel;
  642. int dcdc_mult = 0;
  643. switch (id) {
  644. case TPS65910_REG_VDD1:
  645. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  646. if (dcdc_mult == 1)
  647. dcdc_mult--;
  648. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  649. tps65910_modify_bits(pmic, TPS65910_VDD1,
  650. (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
  651. VDD1_VGAIN_SEL_MASK);
  652. tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel);
  653. break;
  654. case TPS65910_REG_VDD2:
  655. dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  656. if (dcdc_mult == 1)
  657. dcdc_mult--;
  658. vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
  659. tps65910_modify_bits(pmic, TPS65910_VDD2,
  660. (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
  661. VDD1_VGAIN_SEL_MASK);
  662. tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel);
  663. break;
  664. case TPS65911_REG_VDDCTRL:
  665. vsel = selector + 3;
  666. tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel);
  667. }
  668. return 0;
  669. }
  670. static int tps65910_set_voltage_sel(struct regulator_dev *dev,
  671. unsigned selector)
  672. {
  673. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  674. int reg, id = rdev_get_id(dev);
  675. reg = pmic->get_ctrl_reg(id);
  676. if (reg < 0)
  677. return reg;
  678. switch (id) {
  679. case TPS65910_REG_VIO:
  680. case TPS65910_REG_VDIG1:
  681. case TPS65910_REG_VDIG2:
  682. case TPS65910_REG_VPLL:
  683. case TPS65910_REG_VDAC:
  684. case TPS65910_REG_VAUX1:
  685. case TPS65910_REG_VAUX2:
  686. case TPS65910_REG_VAUX33:
  687. case TPS65910_REG_VMMC:
  688. return tps65910_modify_bits(pmic, reg,
  689. (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
  690. }
  691. return -EINVAL;
  692. }
  693. static int tps65911_set_voltage_sel(struct regulator_dev *dev,
  694. unsigned selector)
  695. {
  696. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  697. int reg, id = rdev_get_id(dev);
  698. reg = pmic->get_ctrl_reg(id);
  699. if (reg < 0)
  700. return reg;
  701. switch (id) {
  702. case TPS65911_REG_LDO1:
  703. case TPS65911_REG_LDO2:
  704. case TPS65911_REG_LDO4:
  705. return tps65910_modify_bits(pmic, reg,
  706. (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK);
  707. case TPS65911_REG_LDO3:
  708. case TPS65911_REG_LDO5:
  709. case TPS65911_REG_LDO6:
  710. case TPS65911_REG_LDO7:
  711. case TPS65911_REG_LDO8:
  712. return tps65910_modify_bits(pmic, reg,
  713. (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK);
  714. case TPS65910_REG_VIO:
  715. return tps65910_modify_bits(pmic, reg,
  716. (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
  717. }
  718. return -EINVAL;
  719. }
  720. static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
  721. unsigned selector)
  722. {
  723. int volt, mult = 1, id = rdev_get_id(dev);
  724. switch (id) {
  725. case TPS65910_REG_VDD1:
  726. case TPS65910_REG_VDD2:
  727. mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
  728. volt = VDD1_2_MIN_VOLT +
  729. (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
  730. break;
  731. case TPS65911_REG_VDDCTRL:
  732. volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
  733. break;
  734. default:
  735. BUG();
  736. return -EINVAL;
  737. }
  738. return volt * 100 * mult;
  739. }
  740. static int tps65910_list_voltage(struct regulator_dev *dev,
  741. unsigned selector)
  742. {
  743. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  744. int id = rdev_get_id(dev), voltage;
  745. if (id < TPS65910_REG_VIO || id > TPS65910_REG_VMMC)
  746. return -EINVAL;
  747. if (selector >= pmic->info[id]->n_voltages)
  748. return -EINVAL;
  749. else
  750. voltage = pmic->info[id]->voltage_table[selector] * 1000;
  751. return voltage;
  752. }
  753. static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
  754. {
  755. struct tps65910_reg *pmic = rdev_get_drvdata(dev);
  756. int step_mv = 0, id = rdev_get_id(dev);
  757. switch(id) {
  758. case TPS65911_REG_LDO1:
  759. case TPS65911_REG_LDO2:
  760. case TPS65911_REG_LDO4:
  761. /* The first 5 values of the selector correspond to 1V */
  762. if (selector < 5)
  763. selector = 0;
  764. else
  765. selector -= 4;
  766. step_mv = 50;
  767. break;
  768. case TPS65911_REG_LDO3:
  769. case TPS65911_REG_LDO5:
  770. case TPS65911_REG_LDO6:
  771. case TPS65911_REG_LDO7:
  772. case TPS65911_REG_LDO8:
  773. /* The first 3 values of the selector correspond to 1V */
  774. if (selector < 3)
  775. selector = 0;
  776. else
  777. selector -= 2;
  778. step_mv = 100;
  779. break;
  780. case TPS65910_REG_VIO:
  781. return pmic->info[id]->voltage_table[selector] * 1000;
  782. default:
  783. return -EINVAL;
  784. }
  785. return (LDO_MIN_VOLT + selector * step_mv) * 1000;
  786. }
  787. static int tps65910_set_voltage_dcdc_time_sel(struct regulator_dev *dev,
  788. unsigned int old_selector, unsigned int new_selector)
  789. {
  790. int id = rdev_get_id(dev);
  791. int old_volt, new_volt;
  792. old_volt = tps65910_list_voltage_dcdc(dev, old_selector);
  793. if (old_volt < 0)
  794. return old_volt;
  795. new_volt = tps65910_list_voltage_dcdc(dev, new_selector);
  796. if (new_volt < 0)
  797. return new_volt;
  798. /* VDD1 and VDD2 are 12.5mV/us, VDDCTRL is 100mV/20us */
  799. switch (id) {
  800. case TPS65910_REG_VDD1:
  801. case TPS65910_REG_VDD2:
  802. return DIV_ROUND_UP(abs(old_volt - new_volt), 12500);
  803. case TPS65911_REG_VDDCTRL:
  804. return DIV_ROUND_UP(abs(old_volt - new_volt), 5000);
  805. }
  806. return -EINVAL;
  807. }
  808. /* Regulator ops (except VRTC) */
  809. static struct regulator_ops tps65910_ops_dcdc = {
  810. .is_enabled = tps65910_is_enabled,
  811. .enable = tps65910_enable,
  812. .disable = tps65910_disable,
  813. .enable_time = tps65910_enable_time,
  814. .set_mode = tps65910_set_mode,
  815. .get_mode = tps65910_get_mode,
  816. .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
  817. .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
  818. .set_voltage_time_sel = tps65910_set_voltage_dcdc_time_sel,
  819. .list_voltage = tps65910_list_voltage_dcdc,
  820. };
  821. static struct regulator_ops tps65910_ops_vdd3 = {
  822. .is_enabled = tps65910_is_enabled,
  823. .enable = tps65910_enable,
  824. .disable = tps65910_disable,
  825. .enable_time = tps65910_enable_time,
  826. .set_mode = tps65910_set_mode,
  827. .get_mode = tps65910_get_mode,
  828. .get_voltage = tps65910_get_voltage_vdd3,
  829. .list_voltage = tps65910_list_voltage,
  830. };
  831. static struct regulator_ops tps65910_ops = {
  832. .is_enabled = tps65910_is_enabled,
  833. .enable = tps65910_enable,
  834. .disable = tps65910_disable,
  835. .enable_time = tps65910_enable_time,
  836. .set_mode = tps65910_set_mode,
  837. .get_mode = tps65910_get_mode,
  838. .get_voltage = tps65910_get_voltage,
  839. .set_voltage_sel = tps65910_set_voltage_sel,
  840. .list_voltage = tps65910_list_voltage,
  841. };
  842. static struct regulator_ops tps65911_ops = {
  843. .is_enabled = tps65910_is_enabled,
  844. .enable = tps65910_enable,
  845. .disable = tps65910_disable,
  846. .enable_time = tps65910_enable_time,
  847. .set_mode = tps65910_set_mode,
  848. .get_mode = tps65910_get_mode,
  849. .get_voltage = tps65911_get_voltage,
  850. .set_voltage_sel = tps65911_set_voltage_sel,
  851. .list_voltage = tps65911_list_voltage,
  852. };
  853. static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
  854. int id, int ext_sleep_config)
  855. {
  856. struct tps65910 *mfd = pmic->mfd;
  857. u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
  858. u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
  859. int ret;
  860. /*
  861. * Regulator can not be control from multiple external input EN1, EN2
  862. * and EN3 together.
  863. */
  864. if (ext_sleep_config & EXT_SLEEP_CONTROL) {
  865. int en_count;
  866. en_count = ((ext_sleep_config &
  867. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
  868. en_count += ((ext_sleep_config &
  869. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
  870. en_count += ((ext_sleep_config &
  871. TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
  872. en_count += ((ext_sleep_config &
  873. TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
  874. if (en_count > 1) {
  875. dev_err(mfd->dev,
  876. "External sleep control flag is not proper\n");
  877. return -EINVAL;
  878. }
  879. }
  880. pmic->board_ext_control[id] = ext_sleep_config;
  881. /* External EN1 control */
  882. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
  883. ret = tps65910_set_bits(mfd,
  884. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  885. else
  886. ret = tps65910_clear_bits(mfd,
  887. TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
  888. if (ret < 0) {
  889. dev_err(mfd->dev,
  890. "Error in configuring external control EN1\n");
  891. return ret;
  892. }
  893. /* External EN2 control */
  894. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
  895. ret = tps65910_set_bits(mfd,
  896. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  897. else
  898. ret = tps65910_clear_bits(mfd,
  899. TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
  900. if (ret < 0) {
  901. dev_err(mfd->dev,
  902. "Error in configuring external control EN2\n");
  903. return ret;
  904. }
  905. /* External EN3 control for TPS65910 LDO only */
  906. if ((tps65910_chip_id(mfd) == TPS65910) &&
  907. (id >= TPS65910_REG_VDIG1)) {
  908. if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
  909. ret = tps65910_set_bits(mfd,
  910. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  911. else
  912. ret = tps65910_clear_bits(mfd,
  913. TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
  914. if (ret < 0) {
  915. dev_err(mfd->dev,
  916. "Error in configuring external control EN3\n");
  917. return ret;
  918. }
  919. }
  920. /* Return if no external control is selected */
  921. if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
  922. /* Clear all sleep controls */
  923. ret = tps65910_clear_bits(mfd,
  924. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  925. if (!ret)
  926. ret = tps65910_clear_bits(mfd,
  927. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  928. if (ret < 0)
  929. dev_err(mfd->dev,
  930. "Error in configuring SLEEP register\n");
  931. return ret;
  932. }
  933. /*
  934. * For regulator that has separate operational and sleep register make
  935. * sure that operational is used and clear sleep register to turn
  936. * regulator off when external control is inactive
  937. */
  938. if ((id == TPS65910_REG_VDD1) ||
  939. (id == TPS65910_REG_VDD2) ||
  940. ((id == TPS65911_REG_VDDCTRL) &&
  941. (tps65910_chip_id(mfd) == TPS65911))) {
  942. int op_reg_add = pmic->get_ctrl_reg(id) + 1;
  943. int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
  944. int opvsel = tps65910_reg_read(pmic, op_reg_add);
  945. int srvsel = tps65910_reg_read(pmic, sr_reg_add);
  946. if (opvsel & VDD1_OP_CMD_MASK) {
  947. u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
  948. ret = tps65910_reg_write(pmic, op_reg_add, reg_val);
  949. if (ret < 0) {
  950. dev_err(mfd->dev,
  951. "Error in configuring op register\n");
  952. return ret;
  953. }
  954. }
  955. ret = tps65910_reg_write(pmic, sr_reg_add, 0);
  956. if (ret < 0) {
  957. dev_err(mfd->dev, "Error in settting sr register\n");
  958. return ret;
  959. }
  960. }
  961. ret = tps65910_clear_bits(mfd,
  962. TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
  963. if (!ret) {
  964. if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
  965. ret = tps65910_set_bits(mfd,
  966. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  967. else
  968. ret = tps65910_clear_bits(mfd,
  969. TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
  970. }
  971. if (ret < 0)
  972. dev_err(mfd->dev,
  973. "Error in configuring SLEEP register\n");
  974. return ret;
  975. }
  976. static __devinit int tps65910_probe(struct platform_device *pdev)
  977. {
  978. struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
  979. struct tps_info *info;
  980. struct regulator_init_data *reg_data;
  981. struct regulator_dev *rdev;
  982. struct tps65910_reg *pmic;
  983. struct tps65910_board *pmic_plat_data;
  984. int i, err;
  985. pmic_plat_data = dev_get_platdata(tps65910->dev);
  986. if (!pmic_plat_data)
  987. return -EINVAL;
  988. pmic = kzalloc(sizeof(*pmic), GFP_KERNEL);
  989. if (!pmic)
  990. return -ENOMEM;
  991. mutex_init(&pmic->mutex);
  992. pmic->mfd = tps65910;
  993. platform_set_drvdata(pdev, pmic);
  994. /* Give control of all register to control port */
  995. tps65910_set_bits(pmic->mfd, TPS65910_DEVCTRL,
  996. DEVCTRL_SR_CTL_I2C_SEL_MASK);
  997. switch(tps65910_chip_id(tps65910)) {
  998. case TPS65910:
  999. pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
  1000. pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
  1001. pmic->ext_sleep_control = tps65910_ext_sleep_control;
  1002. info = tps65910_regs;
  1003. break;
  1004. case TPS65911:
  1005. pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
  1006. pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
  1007. pmic->ext_sleep_control = tps65911_ext_sleep_control;
  1008. info = tps65911_regs;
  1009. break;
  1010. default:
  1011. pr_err("Invalid tps chip version\n");
  1012. kfree(pmic);
  1013. return -ENODEV;
  1014. }
  1015. pmic->desc = kcalloc(pmic->num_regulators,
  1016. sizeof(struct regulator_desc), GFP_KERNEL);
  1017. if (!pmic->desc) {
  1018. err = -ENOMEM;
  1019. goto err_free_pmic;
  1020. }
  1021. pmic->info = kcalloc(pmic->num_regulators,
  1022. sizeof(struct tps_info *), GFP_KERNEL);
  1023. if (!pmic->info) {
  1024. err = -ENOMEM;
  1025. goto err_free_desc;
  1026. }
  1027. pmic->rdev = kcalloc(pmic->num_regulators,
  1028. sizeof(struct regulator_dev *), GFP_KERNEL);
  1029. if (!pmic->rdev) {
  1030. err = -ENOMEM;
  1031. goto err_free_info;
  1032. }
  1033. for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
  1034. i++, info++) {
  1035. reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
  1036. /* Regulator API handles empty constraints but not NULL
  1037. * constraints */
  1038. if (!reg_data)
  1039. continue;
  1040. /* Register the regulators */
  1041. pmic->info[i] = info;
  1042. pmic->desc[i].name = info->name;
  1043. pmic->desc[i].id = i;
  1044. pmic->desc[i].n_voltages = info->n_voltages;
  1045. if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
  1046. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1047. pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
  1048. VDD1_2_NUM_VOLT_COARSE;
  1049. } else if (i == TPS65910_REG_VDD3) {
  1050. if (tps65910_chip_id(tps65910) == TPS65910)
  1051. pmic->desc[i].ops = &tps65910_ops_vdd3;
  1052. else
  1053. pmic->desc[i].ops = &tps65910_ops_dcdc;
  1054. } else {
  1055. if (tps65910_chip_id(tps65910) == TPS65910)
  1056. pmic->desc[i].ops = &tps65910_ops;
  1057. else
  1058. pmic->desc[i].ops = &tps65911_ops;
  1059. }
  1060. err = tps65910_set_ext_sleep_config(pmic, i,
  1061. pmic_plat_data->regulator_ext_sleep_control[i]);
  1062. /*
  1063. * Failing on regulator for configuring externally control
  1064. * is not a serious issue, just throw warning.
  1065. */
  1066. if (err < 0)
  1067. dev_warn(tps65910->dev,
  1068. "Failed to initialise ext control config\n");
  1069. pmic->desc[i].type = REGULATOR_VOLTAGE;
  1070. pmic->desc[i].owner = THIS_MODULE;
  1071. rdev = regulator_register(&pmic->desc[i],
  1072. tps65910->dev, reg_data, pmic, NULL);
  1073. if (IS_ERR(rdev)) {
  1074. dev_err(tps65910->dev,
  1075. "failed to register %s regulator\n",
  1076. pdev->name);
  1077. err = PTR_ERR(rdev);
  1078. goto err_unregister_regulator;
  1079. }
  1080. /* Save regulator for cleanup */
  1081. pmic->rdev[i] = rdev;
  1082. }
  1083. return 0;
  1084. err_unregister_regulator:
  1085. while (--i >= 0)
  1086. regulator_unregister(pmic->rdev[i]);
  1087. kfree(pmic->rdev);
  1088. err_free_info:
  1089. kfree(pmic->info);
  1090. err_free_desc:
  1091. kfree(pmic->desc);
  1092. err_free_pmic:
  1093. kfree(pmic);
  1094. return err;
  1095. }
  1096. static int __devexit tps65910_remove(struct platform_device *pdev)
  1097. {
  1098. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1099. int i;
  1100. for (i = 0; i < pmic->num_regulators; i++)
  1101. regulator_unregister(pmic->rdev[i]);
  1102. kfree(pmic->rdev);
  1103. kfree(pmic->info);
  1104. kfree(pmic->desc);
  1105. kfree(pmic);
  1106. return 0;
  1107. }
  1108. static void tps65910_shutdown(struct platform_device *pdev)
  1109. {
  1110. struct tps65910_reg *pmic = platform_get_drvdata(pdev);
  1111. int i;
  1112. /*
  1113. * Before bootloader jumps to kernel, it makes sure that required
  1114. * external control signals are in desired state so that given rails
  1115. * can be configure accordingly.
  1116. * If rails are configured to be controlled from external control
  1117. * then before shutting down/rebooting the system, the external
  1118. * control configuration need to be remove from the rails so that
  1119. * its output will be available as per register programming even
  1120. * if external controls are removed. This is require when the POR
  1121. * value of the control signals are not in active state and before
  1122. * bootloader initializes it, the system requires the rail output
  1123. * to be active for booting.
  1124. */
  1125. for (i = 0; i < pmic->num_regulators; i++) {
  1126. int err;
  1127. if (!pmic->rdev[i])
  1128. continue;
  1129. err = tps65910_set_ext_sleep_config(pmic, i, 0);
  1130. if (err < 0)
  1131. dev_err(&pdev->dev,
  1132. "Error in clearing external control\n");
  1133. }
  1134. }
  1135. static struct platform_driver tps65910_driver = {
  1136. .driver = {
  1137. .name = "tps65910-pmic",
  1138. .owner = THIS_MODULE,
  1139. },
  1140. .probe = tps65910_probe,
  1141. .remove = __devexit_p(tps65910_remove),
  1142. .shutdown = tps65910_shutdown,
  1143. };
  1144. static int __init tps65910_init(void)
  1145. {
  1146. return platform_driver_register(&tps65910_driver);
  1147. }
  1148. subsys_initcall(tps65910_init);
  1149. static void __exit tps65910_cleanup(void)
  1150. {
  1151. platform_driver_unregister(&tps65910_driver);
  1152. }
  1153. module_exit(tps65910_cleanup);
  1154. MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
  1155. MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
  1156. MODULE_LICENSE("GPL v2");
  1157. MODULE_ALIAS("platform:tps65910-pmic");