lp3972.c 16 KB

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  1. /*
  2. * Regulator driver for National Semiconductors LP3972 PMIC chip
  3. *
  4. * Based on lp3971.c
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. */
  11. #include <linux/bug.h>
  12. #include <linux/err.h>
  13. #include <linux/i2c.h>
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/regulator/driver.h>
  17. #include <linux/regulator/lp3972.h>
  18. #include <linux/slab.h>
  19. struct lp3972 {
  20. struct device *dev;
  21. struct mutex io_lock;
  22. struct i2c_client *i2c;
  23. int num_regulators;
  24. struct regulator_dev **rdev;
  25. };
  26. /* LP3972 Control Registers */
  27. #define LP3972_SCR_REG 0x07
  28. #define LP3972_OVER1_REG 0x10
  29. #define LP3972_OVSR1_REG 0x11
  30. #define LP3972_OVER2_REG 0x12
  31. #define LP3972_OVSR2_REG 0x13
  32. #define LP3972_VCC1_REG 0x20
  33. #define LP3972_ADTV1_REG 0x23
  34. #define LP3972_ADTV2_REG 0x24
  35. #define LP3972_AVRC_REG 0x25
  36. #define LP3972_CDTC1_REG 0x26
  37. #define LP3972_CDTC2_REG 0x27
  38. #define LP3972_SDTV1_REG 0x29
  39. #define LP3972_SDTV2_REG 0x2A
  40. #define LP3972_MDTV1_REG 0x32
  41. #define LP3972_MDTV2_REG 0x33
  42. #define LP3972_L2VCR_REG 0x39
  43. #define LP3972_L34VCR_REG 0x3A
  44. #define LP3972_SCR1_REG 0x80
  45. #define LP3972_SCR2_REG 0x81
  46. #define LP3972_OEN3_REG 0x82
  47. #define LP3972_OSR3_REG 0x83
  48. #define LP3972_LOER4_REG 0x84
  49. #define LP3972_B2TV_REG 0x85
  50. #define LP3972_B3TV_REG 0x86
  51. #define LP3972_B32RC_REG 0x87
  52. #define LP3972_ISRA_REG 0x88
  53. #define LP3972_BCCR_REG 0x89
  54. #define LP3972_II1RR_REG 0x8E
  55. #define LP3972_II2RR_REG 0x8F
  56. #define LP3972_SYS_CONTROL1_REG LP3972_SCR1_REG
  57. /* System control register 1 initial value,
  58. * bits 5, 6 and 7 are EPROM programmable */
  59. #define SYS_CONTROL1_INIT_VAL 0x02
  60. #define SYS_CONTROL1_INIT_MASK 0x1F
  61. #define LP3972_VOL_CHANGE_REG LP3972_VCC1_REG
  62. #define LP3972_VOL_CHANGE_FLAG_GO 0x01
  63. #define LP3972_VOL_CHANGE_FLAG_MASK 0x03
  64. /* LDO output enable mask */
  65. #define LP3972_OEN3_L1EN BIT(0)
  66. #define LP3972_OVER2_LDO2_EN BIT(2)
  67. #define LP3972_OVER2_LDO3_EN BIT(3)
  68. #define LP3972_OVER2_LDO4_EN BIT(4)
  69. #define LP3972_OVER1_S_EN BIT(2)
  70. static const int ldo1_voltage_map[] = {
  71. 1700, 1725, 1750, 1775, 1800, 1825, 1850, 1875,
  72. 1900, 1925, 1950, 1975, 2000,
  73. };
  74. static const int ldo23_voltage_map[] = {
  75. 1800, 1900, 2000, 2100, 2200, 2300, 2400, 2500,
  76. 2600, 2700, 2800, 2900, 3000, 3100, 3200, 3300,
  77. };
  78. static const int ldo4_voltage_map[] = {
  79. 1000, 1050, 1100, 1150, 1200, 1250, 1300, 1350,
  80. 1400, 1500, 1800, 1900, 2500, 2800, 3000, 3300,
  81. };
  82. static const int ldo5_voltage_map[] = {
  83. 0, 0, 0, 0, 0, 850, 875, 900,
  84. 925, 950, 975, 1000, 1025, 1050, 1075, 1100,
  85. 1125, 1150, 1175, 1200, 1225, 1250, 1275, 1300,
  86. 1325, 1350, 1375, 1400, 1425, 1450, 1475, 1500,
  87. };
  88. static const int buck1_voltage_map[] = {
  89. 725, 750, 775, 800, 825, 850, 875, 900,
  90. 925, 950, 975, 1000, 1025, 1050, 1075, 1100,
  91. 1125, 1150, 1175, 1200, 1225, 1250, 1275, 1300,
  92. 1325, 1350, 1375, 1400, 1425, 1450, 1475, 1500,
  93. };
  94. static const int buck23_voltage_map[] = {
  95. 0, 800, 850, 900, 950, 1000, 1050, 1100,
  96. 1150, 1200, 1250, 1300, 1350, 1400, 1450, 1500,
  97. 1550, 1600, 1650, 1700, 1800, 1900, 2500, 2800,
  98. 3000, 3300,
  99. };
  100. static const int *ldo_voltage_map[] = {
  101. ldo1_voltage_map,
  102. ldo23_voltage_map,
  103. ldo23_voltage_map,
  104. ldo4_voltage_map,
  105. ldo5_voltage_map,
  106. };
  107. static const int *buck_voltage_map[] = {
  108. buck1_voltage_map,
  109. buck23_voltage_map,
  110. buck23_voltage_map,
  111. };
  112. static const int ldo_output_enable_mask[] = {
  113. LP3972_OEN3_L1EN,
  114. LP3972_OVER2_LDO2_EN,
  115. LP3972_OVER2_LDO3_EN,
  116. LP3972_OVER2_LDO4_EN,
  117. LP3972_OVER1_S_EN,
  118. };
  119. static const int ldo_output_enable_addr[] = {
  120. LP3972_OEN3_REG,
  121. LP3972_OVER2_REG,
  122. LP3972_OVER2_REG,
  123. LP3972_OVER2_REG,
  124. LP3972_OVER1_REG,
  125. };
  126. static const int ldo_vol_ctl_addr[] = {
  127. LP3972_MDTV1_REG,
  128. LP3972_L2VCR_REG,
  129. LP3972_L34VCR_REG,
  130. LP3972_L34VCR_REG,
  131. LP3972_SDTV1_REG,
  132. };
  133. static const int buck_vol_enable_addr[] = {
  134. LP3972_OVER1_REG,
  135. LP3972_OEN3_REG,
  136. LP3972_OEN3_REG,
  137. };
  138. static const int buck_base_addr[] = {
  139. LP3972_ADTV1_REG,
  140. LP3972_B2TV_REG,
  141. LP3972_B3TV_REG,
  142. };
  143. #define LP3972_LDO_VOL_VALUE_MAP(x) (ldo_voltage_map[x])
  144. #define LP3972_LDO_OUTPUT_ENABLE_MASK(x) (ldo_output_enable_mask[x])
  145. #define LP3972_LDO_OUTPUT_ENABLE_REG(x) (ldo_output_enable_addr[x])
  146. /* LDO voltage control registers shift:
  147. LP3972_LDO1 -> 0, LP3972_LDO2 -> 4
  148. LP3972_LDO3 -> 0, LP3972_LDO4 -> 4
  149. LP3972_LDO5 -> 0
  150. */
  151. #define LP3972_LDO_VOL_CONTR_SHIFT(x) (((x) & 1) << 2)
  152. #define LP3972_LDO_VOL_CONTR_REG(x) (ldo_vol_ctl_addr[x])
  153. #define LP3972_LDO_VOL_CHANGE_SHIFT(x) ((x) ? 4 : 6)
  154. #define LP3972_LDO_VOL_MASK(x) (((x) % 4) ? 0x0f : 0x1f)
  155. #define LP3972_LDO_VOL_MIN_IDX(x) (((x) == 4) ? 0x05 : 0x00)
  156. #define LP3972_LDO_VOL_MAX_IDX(x) ((x) ? (((x) == 4) ? 0x1f : 0x0f) : 0x0c)
  157. #define LP3972_BUCK_VOL_VALUE_MAP(x) (buck_voltage_map[x])
  158. #define LP3972_BUCK_VOL_ENABLE_REG(x) (buck_vol_enable_addr[x])
  159. #define LP3972_BUCK_VOL1_REG(x) (buck_base_addr[x])
  160. #define LP3972_BUCK_VOL_MASK 0x1f
  161. #define LP3972_BUCK_VOL_MIN_IDX(x) ((x) ? 0x01 : 0x00)
  162. #define LP3972_BUCK_VOL_MAX_IDX(x) ((x) ? 0x19 : 0x1f)
  163. static int lp3972_i2c_read(struct i2c_client *i2c, char reg, int count,
  164. u16 *dest)
  165. {
  166. int ret;
  167. if (count != 1)
  168. return -EIO;
  169. ret = i2c_smbus_read_byte_data(i2c, reg);
  170. if (ret < 0)
  171. return ret;
  172. *dest = ret;
  173. return 0;
  174. }
  175. static int lp3972_i2c_write(struct i2c_client *i2c, char reg, int count,
  176. const u16 *src)
  177. {
  178. if (count != 1)
  179. return -EIO;
  180. return i2c_smbus_write_byte_data(i2c, reg, *src);
  181. }
  182. static u8 lp3972_reg_read(struct lp3972 *lp3972, u8 reg)
  183. {
  184. u16 val = 0;
  185. mutex_lock(&lp3972->io_lock);
  186. lp3972_i2c_read(lp3972->i2c, reg, 1, &val);
  187. dev_dbg(lp3972->dev, "reg read 0x%02x -> 0x%02x\n", (int)reg,
  188. (unsigned)val & 0xff);
  189. mutex_unlock(&lp3972->io_lock);
  190. return val & 0xff;
  191. }
  192. static int lp3972_set_bits(struct lp3972 *lp3972, u8 reg, u16 mask, u16 val)
  193. {
  194. u16 tmp;
  195. int ret;
  196. mutex_lock(&lp3972->io_lock);
  197. ret = lp3972_i2c_read(lp3972->i2c, reg, 1, &tmp);
  198. tmp = (tmp & ~mask) | val;
  199. if (ret == 0) {
  200. ret = lp3972_i2c_write(lp3972->i2c, reg, 1, &tmp);
  201. dev_dbg(lp3972->dev, "reg write 0x%02x -> 0x%02x\n", (int)reg,
  202. (unsigned)val & 0xff);
  203. }
  204. mutex_unlock(&lp3972->io_lock);
  205. return ret;
  206. }
  207. static int lp3972_ldo_list_voltage(struct regulator_dev *dev, unsigned index)
  208. {
  209. int ldo = rdev_get_id(dev) - LP3972_LDO1;
  210. return 1000 * LP3972_LDO_VOL_VALUE_MAP(ldo)[index];
  211. }
  212. static int lp3972_ldo_is_enabled(struct regulator_dev *dev)
  213. {
  214. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  215. int ldo = rdev_get_id(dev) - LP3972_LDO1;
  216. u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
  217. u16 val;
  218. val = lp3972_reg_read(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo));
  219. return !!(val & mask);
  220. }
  221. static int lp3972_ldo_enable(struct regulator_dev *dev)
  222. {
  223. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  224. int ldo = rdev_get_id(dev) - LP3972_LDO1;
  225. u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
  226. return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
  227. mask, mask);
  228. }
  229. static int lp3972_ldo_disable(struct regulator_dev *dev)
  230. {
  231. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  232. int ldo = rdev_get_id(dev) - LP3972_LDO1;
  233. u16 mask = LP3972_LDO_OUTPUT_ENABLE_MASK(ldo);
  234. return lp3972_set_bits(lp3972, LP3972_LDO_OUTPUT_ENABLE_REG(ldo),
  235. mask, 0);
  236. }
  237. static int lp3972_ldo_get_voltage(struct regulator_dev *dev)
  238. {
  239. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  240. int ldo = rdev_get_id(dev) - LP3972_LDO1;
  241. u16 mask = LP3972_LDO_VOL_MASK(ldo);
  242. u16 val, reg;
  243. reg = lp3972_reg_read(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo));
  244. val = (reg >> LP3972_LDO_VOL_CONTR_SHIFT(ldo)) & mask;
  245. return 1000 * LP3972_LDO_VOL_VALUE_MAP(ldo)[val];
  246. }
  247. static int lp3972_ldo_set_voltage(struct regulator_dev *dev,
  248. int min_uV, int max_uV,
  249. unsigned int *selector)
  250. {
  251. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  252. int ldo = rdev_get_id(dev) - LP3972_LDO1;
  253. int min_vol = min_uV / 1000, max_vol = max_uV / 1000;
  254. const int *vol_map = LP3972_LDO_VOL_VALUE_MAP(ldo);
  255. u16 val;
  256. int shift, ret;
  257. if (min_vol < vol_map[LP3972_LDO_VOL_MIN_IDX(ldo)] ||
  258. min_vol > vol_map[LP3972_LDO_VOL_MAX_IDX(ldo)])
  259. return -EINVAL;
  260. for (val = LP3972_LDO_VOL_MIN_IDX(ldo);
  261. val <= LP3972_LDO_VOL_MAX_IDX(ldo); val++)
  262. if (vol_map[val] >= min_vol)
  263. break;
  264. if (val > LP3972_LDO_VOL_MAX_IDX(ldo) || vol_map[val] > max_vol)
  265. return -EINVAL;
  266. *selector = val;
  267. shift = LP3972_LDO_VOL_CONTR_SHIFT(ldo);
  268. ret = lp3972_set_bits(lp3972, LP3972_LDO_VOL_CONTR_REG(ldo),
  269. LP3972_LDO_VOL_MASK(ldo) << shift, val << shift);
  270. if (ret)
  271. return ret;
  272. /*
  273. * LDO1 and LDO5 support voltage control by either target voltage1
  274. * or target voltage2 register.
  275. * We use target voltage1 register for LDO1 and LDO5 in this driver.
  276. * We need to update voltage change control register(0x20) to enable
  277. * LDO1 and LDO5 to change to their programmed target values.
  278. */
  279. switch (ldo) {
  280. case LP3972_LDO1:
  281. case LP3972_LDO5:
  282. shift = LP3972_LDO_VOL_CHANGE_SHIFT(ldo);
  283. ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
  284. LP3972_VOL_CHANGE_FLAG_MASK << shift,
  285. LP3972_VOL_CHANGE_FLAG_GO << shift);
  286. if (ret)
  287. return ret;
  288. ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
  289. LP3972_VOL_CHANGE_FLAG_MASK << shift, 0);
  290. break;
  291. }
  292. return ret;
  293. }
  294. static struct regulator_ops lp3972_ldo_ops = {
  295. .list_voltage = lp3972_ldo_list_voltage,
  296. .is_enabled = lp3972_ldo_is_enabled,
  297. .enable = lp3972_ldo_enable,
  298. .disable = lp3972_ldo_disable,
  299. .get_voltage = lp3972_ldo_get_voltage,
  300. .set_voltage = lp3972_ldo_set_voltage,
  301. };
  302. static int lp3972_dcdc_list_voltage(struct regulator_dev *dev, unsigned index)
  303. {
  304. int buck = rdev_get_id(dev) - LP3972_DCDC1;
  305. return 1000 * buck_voltage_map[buck][index];
  306. }
  307. static int lp3972_dcdc_is_enabled(struct regulator_dev *dev)
  308. {
  309. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  310. int buck = rdev_get_id(dev) - LP3972_DCDC1;
  311. u16 mask = 1 << (buck * 2);
  312. u16 val;
  313. val = lp3972_reg_read(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck));
  314. return !!(val & mask);
  315. }
  316. static int lp3972_dcdc_enable(struct regulator_dev *dev)
  317. {
  318. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  319. int buck = rdev_get_id(dev) - LP3972_DCDC1;
  320. u16 mask = 1 << (buck * 2);
  321. u16 val;
  322. val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
  323. mask, mask);
  324. return val;
  325. }
  326. static int lp3972_dcdc_disable(struct regulator_dev *dev)
  327. {
  328. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  329. int buck = rdev_get_id(dev) - LP3972_DCDC1;
  330. u16 mask = 1 << (buck * 2);
  331. u16 val;
  332. val = lp3972_set_bits(lp3972, LP3972_BUCK_VOL_ENABLE_REG(buck),
  333. mask, 0);
  334. return val;
  335. }
  336. static int lp3972_dcdc_get_voltage(struct regulator_dev *dev)
  337. {
  338. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  339. int buck = rdev_get_id(dev) - LP3972_DCDC1;
  340. u16 reg;
  341. int val;
  342. reg = lp3972_reg_read(lp3972, LP3972_BUCK_VOL1_REG(buck));
  343. reg &= LP3972_BUCK_VOL_MASK;
  344. if (reg <= LP3972_BUCK_VOL_MAX_IDX(buck))
  345. val = 1000 * buck_voltage_map[buck][reg];
  346. else {
  347. val = 0;
  348. dev_warn(&dev->dev, "chip reported incorrect voltage value."
  349. " reg = %d\n", reg);
  350. }
  351. return val;
  352. }
  353. static int lp3972_dcdc_set_voltage(struct regulator_dev *dev,
  354. int min_uV, int max_uV,
  355. unsigned int *selector)
  356. {
  357. struct lp3972 *lp3972 = rdev_get_drvdata(dev);
  358. int buck = rdev_get_id(dev) - LP3972_DCDC1;
  359. int min_vol = min_uV / 1000, max_vol = max_uV / 1000;
  360. const int *vol_map = buck_voltage_map[buck];
  361. u16 val;
  362. int ret;
  363. if (min_vol < vol_map[LP3972_BUCK_VOL_MIN_IDX(buck)] ||
  364. min_vol > vol_map[LP3972_BUCK_VOL_MAX_IDX(buck)])
  365. return -EINVAL;
  366. for (val = LP3972_BUCK_VOL_MIN_IDX(buck);
  367. val <= LP3972_BUCK_VOL_MAX_IDX(buck); val++)
  368. if (vol_map[val] >= min_vol)
  369. break;
  370. if (val > LP3972_BUCK_VOL_MAX_IDX(buck) ||
  371. vol_map[val] > max_vol)
  372. return -EINVAL;
  373. *selector = val;
  374. ret = lp3972_set_bits(lp3972, LP3972_BUCK_VOL1_REG(buck),
  375. LP3972_BUCK_VOL_MASK, val);
  376. if (ret)
  377. return ret;
  378. if (buck != 0)
  379. return ret;
  380. ret = lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
  381. LP3972_VOL_CHANGE_FLAG_MASK, LP3972_VOL_CHANGE_FLAG_GO);
  382. if (ret)
  383. return ret;
  384. return lp3972_set_bits(lp3972, LP3972_VOL_CHANGE_REG,
  385. LP3972_VOL_CHANGE_FLAG_MASK, 0);
  386. }
  387. static struct regulator_ops lp3972_dcdc_ops = {
  388. .list_voltage = lp3972_dcdc_list_voltage,
  389. .is_enabled = lp3972_dcdc_is_enabled,
  390. .enable = lp3972_dcdc_enable,
  391. .disable = lp3972_dcdc_disable,
  392. .get_voltage = lp3972_dcdc_get_voltage,
  393. .set_voltage = lp3972_dcdc_set_voltage,
  394. };
  395. static struct regulator_desc regulators[] = {
  396. {
  397. .name = "LDO1",
  398. .id = LP3972_LDO1,
  399. .ops = &lp3972_ldo_ops,
  400. .n_voltages = ARRAY_SIZE(ldo1_voltage_map),
  401. .type = REGULATOR_VOLTAGE,
  402. .owner = THIS_MODULE,
  403. },
  404. {
  405. .name = "LDO2",
  406. .id = LP3972_LDO2,
  407. .ops = &lp3972_ldo_ops,
  408. .n_voltages = ARRAY_SIZE(ldo23_voltage_map),
  409. .type = REGULATOR_VOLTAGE,
  410. .owner = THIS_MODULE,
  411. },
  412. {
  413. .name = "LDO3",
  414. .id = LP3972_LDO3,
  415. .ops = &lp3972_ldo_ops,
  416. .n_voltages = ARRAY_SIZE(ldo23_voltage_map),
  417. .type = REGULATOR_VOLTAGE,
  418. .owner = THIS_MODULE,
  419. },
  420. {
  421. .name = "LDO4",
  422. .id = LP3972_LDO4,
  423. .ops = &lp3972_ldo_ops,
  424. .n_voltages = ARRAY_SIZE(ldo4_voltage_map),
  425. .type = REGULATOR_VOLTAGE,
  426. .owner = THIS_MODULE,
  427. },
  428. {
  429. .name = "LDO5",
  430. .id = LP3972_LDO5,
  431. .ops = &lp3972_ldo_ops,
  432. .n_voltages = ARRAY_SIZE(ldo5_voltage_map),
  433. .type = REGULATOR_VOLTAGE,
  434. .owner = THIS_MODULE,
  435. },
  436. {
  437. .name = "DCDC1",
  438. .id = LP3972_DCDC1,
  439. .ops = &lp3972_dcdc_ops,
  440. .n_voltages = ARRAY_SIZE(buck1_voltage_map),
  441. .type = REGULATOR_VOLTAGE,
  442. .owner = THIS_MODULE,
  443. },
  444. {
  445. .name = "DCDC2",
  446. .id = LP3972_DCDC2,
  447. .ops = &lp3972_dcdc_ops,
  448. .n_voltages = ARRAY_SIZE(buck23_voltage_map),
  449. .type = REGULATOR_VOLTAGE,
  450. .owner = THIS_MODULE,
  451. },
  452. {
  453. .name = "DCDC3",
  454. .id = LP3972_DCDC3,
  455. .ops = &lp3972_dcdc_ops,
  456. .n_voltages = ARRAY_SIZE(buck23_voltage_map),
  457. .type = REGULATOR_VOLTAGE,
  458. .owner = THIS_MODULE,
  459. },
  460. };
  461. static int __devinit setup_regulators(struct lp3972 *lp3972,
  462. struct lp3972_platform_data *pdata)
  463. {
  464. int i, err;
  465. lp3972->num_regulators = pdata->num_regulators;
  466. lp3972->rdev = kcalloc(pdata->num_regulators,
  467. sizeof(struct regulator_dev *), GFP_KERNEL);
  468. if (!lp3972->rdev) {
  469. err = -ENOMEM;
  470. goto err_nomem;
  471. }
  472. /* Instantiate the regulators */
  473. for (i = 0; i < pdata->num_regulators; i++) {
  474. struct lp3972_regulator_subdev *reg = &pdata->regulators[i];
  475. lp3972->rdev[i] = regulator_register(&regulators[reg->id],
  476. lp3972->dev, reg->initdata, lp3972, NULL);
  477. if (IS_ERR(lp3972->rdev[i])) {
  478. err = PTR_ERR(lp3972->rdev[i]);
  479. dev_err(lp3972->dev, "regulator init failed: %d\n",
  480. err);
  481. goto error;
  482. }
  483. }
  484. return 0;
  485. error:
  486. while (--i >= 0)
  487. regulator_unregister(lp3972->rdev[i]);
  488. kfree(lp3972->rdev);
  489. lp3972->rdev = NULL;
  490. err_nomem:
  491. return err;
  492. }
  493. static int __devinit lp3972_i2c_probe(struct i2c_client *i2c,
  494. const struct i2c_device_id *id)
  495. {
  496. struct lp3972 *lp3972;
  497. struct lp3972_platform_data *pdata = i2c->dev.platform_data;
  498. int ret;
  499. u16 val;
  500. if (!pdata) {
  501. dev_dbg(&i2c->dev, "No platform init data supplied\n");
  502. return -ENODEV;
  503. }
  504. lp3972 = kzalloc(sizeof(struct lp3972), GFP_KERNEL);
  505. if (!lp3972)
  506. return -ENOMEM;
  507. lp3972->i2c = i2c;
  508. lp3972->dev = &i2c->dev;
  509. mutex_init(&lp3972->io_lock);
  510. /* Detect LP3972 */
  511. ret = lp3972_i2c_read(i2c, LP3972_SYS_CONTROL1_REG, 1, &val);
  512. if (ret == 0 &&
  513. (val & SYS_CONTROL1_INIT_MASK) != SYS_CONTROL1_INIT_VAL) {
  514. ret = -ENODEV;
  515. dev_err(&i2c->dev, "chip reported: val = 0x%x\n", val);
  516. }
  517. if (ret < 0) {
  518. dev_err(&i2c->dev, "failed to detect device. ret = %d\n", ret);
  519. goto err_detect;
  520. }
  521. ret = setup_regulators(lp3972, pdata);
  522. if (ret < 0)
  523. goto err_detect;
  524. i2c_set_clientdata(i2c, lp3972);
  525. return 0;
  526. err_detect:
  527. kfree(lp3972);
  528. return ret;
  529. }
  530. static int __devexit lp3972_i2c_remove(struct i2c_client *i2c)
  531. {
  532. struct lp3972 *lp3972 = i2c_get_clientdata(i2c);
  533. int i;
  534. for (i = 0; i < lp3972->num_regulators; i++)
  535. regulator_unregister(lp3972->rdev[i]);
  536. kfree(lp3972->rdev);
  537. kfree(lp3972);
  538. return 0;
  539. }
  540. static const struct i2c_device_id lp3972_i2c_id[] = {
  541. { "lp3972", 0 },
  542. { }
  543. };
  544. MODULE_DEVICE_TABLE(i2c, lp3972_i2c_id);
  545. static struct i2c_driver lp3972_i2c_driver = {
  546. .driver = {
  547. .name = "lp3972",
  548. .owner = THIS_MODULE,
  549. },
  550. .probe = lp3972_i2c_probe,
  551. .remove = __devexit_p(lp3972_i2c_remove),
  552. .id_table = lp3972_i2c_id,
  553. };
  554. static int __init lp3972_module_init(void)
  555. {
  556. return i2c_add_driver(&lp3972_i2c_driver);
  557. }
  558. subsys_initcall(lp3972_module_init);
  559. static void __exit lp3972_module_exit(void)
  560. {
  561. i2c_del_driver(&lp3972_i2c_driver);
  562. }
  563. module_exit(lp3972_module_exit);
  564. MODULE_LICENSE("GPL");
  565. MODULE_AUTHOR("Axel Lin <axel.lin@gmail.com>");
  566. MODULE_DESCRIPTION("LP3972 PMIC driver");