pm8921-bms.c 103 KB

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  1. /* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. */
  13. #define pr_fmt(fmt) "%s: " fmt, __func__
  14. #include <linux/module.h>
  15. #include <linux/moduleparam.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/errno.h>
  18. #include <linux/power_supply.h>
  19. #include <linux/mfd/pm8xxx/pm8921-bms.h>
  20. #include <linux/mfd/pm8xxx/core.h>
  21. #include <linux/mfd/pm8xxx/pm8xxx-adc.h>
  22. #include <linux/mfd/pm8xxx/pm8921-charger.h>
  23. #include <linux/mfd/pm8xxx/ccadc.h>
  24. #include <linux/mfd/pm8xxx/batt-alarm.h>
  25. #include <linux/batterydata-lib.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/bitops.h>
  28. #include <linux/debugfs.h>
  29. #include <linux/slab.h>
  30. #include <linux/delay.h>
  31. #include <linux/mutex.h>
  32. #include <linux/rtc.h>
  33. #define BMS_CONTROL 0x224
  34. #define BMS_S1_DELAY 0x225
  35. #define BMS_OUTPUT0 0x230
  36. #define BMS_OUTPUT1 0x231
  37. #define BMS_TOLERANCES 0x232
  38. #define BMS_TEST1 0x237
  39. #define ADC_ARB_SECP_CNTRL 0x190
  40. #define ADC_ARB_SECP_AMUX_CNTRL 0x191
  41. #define ADC_ARB_SECP_ANA_PARAM 0x192
  42. #define ADC_ARB_SECP_DIG_PARAM 0x193
  43. #define ADC_ARB_SECP_RSV 0x194
  44. #define ADC_ARB_SECP_DATA1 0x195
  45. #define ADC_ARB_SECP_DATA0 0x196
  46. #define ADC_ARB_BMS_CNTRL 0x18D
  47. #define AMUX_TRIM_2 0x322
  48. #define TEST_PROGRAM_REV 0x339
  49. #define TEMP_SOC_STORAGE 0x107
  50. #define TEMP_IAVG_STORAGE 0x105
  51. #define TEMP_IAVG_STORAGE_USE_MASK 0x0F
  52. #define PON_CNTRL_6 0x018
  53. #define WD_BIT BIT(7)
  54. #define BATT_ALARM_ACCURACY 50 /* 50mV */
  55. enum pmic_bms_interrupts {
  56. PM8921_BMS_SBI_WRITE_OK,
  57. PM8921_BMS_CC_THR,
  58. PM8921_BMS_VSENSE_THR,
  59. PM8921_BMS_VSENSE_FOR_R,
  60. PM8921_BMS_OCV_FOR_R,
  61. PM8921_BMS_GOOD_OCV,
  62. PM8921_BMS_VSENSE_AVG,
  63. PM_BMS_MAX_INTS,
  64. };
  65. struct pm8921_soc_params {
  66. uint16_t last_good_ocv_raw;
  67. int cc;
  68. int last_good_ocv_uv;
  69. };
  70. struct fcc_data {
  71. int fcc_new;
  72. int chargecycles;
  73. int batt_temp;
  74. int fcc_real;
  75. int temp_real;
  76. };
  77. /**
  78. * struct pm8921_bms_chip -
  79. * @bms_output_lock: lock to prevent concurrent bms reads
  80. *
  81. * @last_ocv_uv_mutex: mutex to protect simultaneous invocations of calculate
  82. * state of charge, note that last_ocv_uv could be
  83. * changed as soc is adjusted. This mutex protects
  84. * simultaneous updates of last_ocv_uv as well. This mutex
  85. * also protects changes to *_at_100 variables used in
  86. * faking 100% SOC.
  87. */
  88. struct pm8921_bms_chip {
  89. struct device *dev;
  90. struct dentry *dent;
  91. int r_sense_uohm;
  92. unsigned int v_cutoff;
  93. unsigned int fcc;
  94. struct single_row_lut *fcc_temp_lut;
  95. struct single_row_lut *fcc_sf_lut;
  96. struct pc_temp_ocv_lut *pc_temp_ocv_lut;
  97. struct sf_lut *pc_sf_lut;
  98. struct sf_lut *rbatt_sf_lut;
  99. int delta_rbatt_mohm;
  100. struct work_struct calib_hkadc_work;
  101. unsigned long last_calib_time;
  102. int last_calib_temp;
  103. struct mutex calib_mutex;
  104. unsigned int revision;
  105. unsigned int xoadc_v0625_usb_present;
  106. unsigned int xoadc_v0625_usb_absent;
  107. unsigned int xoadc_v0625;
  108. unsigned int xoadc_v125;
  109. unsigned int batt_temp_channel;
  110. unsigned int vbat_channel;
  111. unsigned int ref625mv_channel;
  112. unsigned int ref1p25v_channel;
  113. unsigned int batt_id_channel;
  114. unsigned int pmic_bms_irq[PM_BMS_MAX_INTS];
  115. DECLARE_BITMAP(enabled_irqs, PM_BMS_MAX_INTS);
  116. struct mutex bms_output_lock;
  117. struct single_row_lut *adjusted_fcc_temp_lut;
  118. unsigned int charging_began;
  119. unsigned int start_percent;
  120. unsigned int end_percent;
  121. unsigned int alarm_low_mv;
  122. unsigned int alarm_high_mv;
  123. int charge_time_us;
  124. int catch_up_time_us;
  125. enum battery_type batt_type;
  126. uint16_t ocv_reading_at_100;
  127. int max_voltage_uv;
  128. int chg_term_ua;
  129. int default_rbatt_mohm;
  130. int amux_2_trim_delta;
  131. uint16_t prev_last_good_ocv_raw;
  132. int rconn_mohm;
  133. int rbatt_capacitive_mohm;
  134. struct mutex last_ocv_uv_mutex;
  135. int last_ocv_uv;
  136. int last_ocv_temp_decidegc;
  137. int pon_ocv_uv;
  138. int last_cc_uah;
  139. unsigned long tm_sec;
  140. int enable_fcc_learning;
  141. int min_fcc_learning_soc;
  142. int min_fcc_ocv_pc;
  143. int min_fcc_learning_samples;
  144. struct fcc_data *fcc_table;
  145. int fcc_new;
  146. int start_real_soc;
  147. int pc_at_start_charge;
  148. int shutdown_soc;
  149. int shutdown_iavg_ua;
  150. struct delayed_work calculate_soc_delayed_work;
  151. struct timespec t_soc_queried;
  152. unsigned long last_recalc_time;
  153. int shutdown_soc_valid_limit;
  154. int ignore_shutdown_soc;
  155. int prev_iavg_ua;
  156. int prev_uuc_iavg_ma;
  157. int prev_pc_unusable;
  158. int adjust_soc_low_threshold;
  159. int ibat_at_cv_ua;
  160. int soc_at_cv;
  161. int prev_chg_soc;
  162. struct power_supply *batt_psy;
  163. struct wake_lock low_voltage_wake_lock;
  164. int soc_calc_period;
  165. int normal_voltage_calc_ms;
  166. int low_voltage_calc_ms;
  167. int imax_ua;
  168. struct wake_lock soc_wake_lock;
  169. int disable_flat_portion_ocv;
  170. int ocv_dis_high_soc;
  171. int ocv_dis_low_soc;
  172. int high_ocv_correction_limit_uv;
  173. int low_ocv_correction_limit_uv;
  174. int hold_soc_est;
  175. int prev_vbat_batt_terminal_uv;
  176. int vbatt_cutoff_count;
  177. int low_voltage_detect;
  178. int vbatt_cutoff_retries;
  179. bool first_report_after_suspend;
  180. bool soc_updated_on_resume;
  181. int last_soc_at_suspend;
  182. };
  183. /*
  184. * protects against simultaneous adjustment of ocv based on shutdown soc and
  185. * invalidating the shutdown soc
  186. */
  187. static DEFINE_MUTEX(soc_invalidation_mutex);
  188. static int shutdown_soc_invalid;
  189. static struct pm8921_bms_chip *the_chip;
  190. #define DEFAULT_RBATT_MOHMS 128
  191. #define DEFAULT_OCV_MICROVOLTS 3900000
  192. #define DEFAULT_CHARGE_CYCLES 0
  193. #define DELTA_FCC_PERCENT 5
  194. #define MIN_START_PERCENT_FOR_LEARNING 20
  195. #define MIN_START_OCV_PERCENT_FOR_LEARNING 30
  196. #define MAX_FCC_LEARNING_COUNT 5
  197. #define VALID_FCC_CHGCYL_RANGE 50
  198. static int last_usb_cal_delta_uv = 1800;
  199. module_param(last_usb_cal_delta_uv, int, 0644);
  200. static int last_chargecycles = DEFAULT_CHARGE_CYCLES;
  201. static int last_charge_increase;
  202. static int last_fcc_update_count;
  203. static int min_fcc_cycles = -EINVAL;
  204. module_param(last_chargecycles, int, 0644);
  205. module_param(last_charge_increase, int, 0644);
  206. module_param(last_fcc_update_count, int, 0644);
  207. static int calculated_soc = -EINVAL;
  208. static int last_soc = -EINVAL;
  209. static int last_real_fcc_mah = -EINVAL;
  210. static int last_real_fcc_batt_temp = -EINVAL;
  211. static int battery_removed;
  212. static int pm8921_battery_gauge_alarm_notify(struct notifier_block *nb,
  213. unsigned long status, void *unused);
  214. static struct notifier_block alarm_notifier = {
  215. .notifier_call = pm8921_battery_gauge_alarm_notify,
  216. };
  217. static int bms_ro_ops_set(const char *val, const struct kernel_param *kp)
  218. {
  219. return -EINVAL;
  220. }
  221. static struct kernel_param_ops bms_param_ops = {
  222. .set = bms_ro_ops_set,
  223. .get = param_get_int,
  224. };
  225. /* Make last_soc as read only as it is already calculated from shutdown_soc */
  226. module_param_cb(last_soc, &bms_param_ops, &last_soc, 0644);
  227. module_param_cb(battery_removed, &bms_param_ops, &battery_removed, 0644);
  228. module_param_cb(min_fcc_cycles, &bms_param_ops, &min_fcc_cycles, 0644);
  229. /*
  230. * bms_fake_battery is set in setups where a battery emulator is used instead
  231. * of a real battery. This makes the bms driver report a different/fake value
  232. * regardless of the calculated state of charge.
  233. */
  234. static int bms_fake_battery = -EINVAL;
  235. module_param(bms_fake_battery, int, 0644);
  236. /* bms_start_XXX and bms_end_XXX are read only */
  237. static int bms_start_percent;
  238. static int bms_start_ocv_uv;
  239. static int bms_start_cc_uah;
  240. static int bms_end_percent;
  241. static int bms_end_ocv_uv;
  242. static int bms_end_cc_uah;
  243. static struct kernel_param_ops bms_ro_param_ops = {
  244. .set = bms_ro_ops_set,
  245. .get = param_get_int,
  246. };
  247. module_param_cb(bms_start_percent, &bms_ro_param_ops, &bms_start_percent, 0644);
  248. module_param_cb(bms_start_ocv_uv, &bms_ro_param_ops, &bms_start_ocv_uv, 0644);
  249. module_param_cb(bms_start_cc_uah, &bms_ro_param_ops, &bms_start_cc_uah, 0644);
  250. module_param_cb(bms_end_percent, &bms_ro_param_ops, &bms_end_percent, 0644);
  251. module_param_cb(bms_end_ocv_uv, &bms_ro_param_ops, &bms_end_ocv_uv, 0644);
  252. module_param_cb(bms_end_cc_uah, &bms_ro_param_ops, &bms_end_cc_uah, 0644);
  253. static void readjust_fcc_table(void)
  254. {
  255. struct single_row_lut *temp, *old;
  256. int i, fcc, ratio;
  257. if (!the_chip->enable_fcc_learning || battery_removed)
  258. return;
  259. if (!the_chip->fcc_temp_lut) {
  260. pr_err("The static fcc lut table is NULL\n");
  261. return;
  262. }
  263. temp = kzalloc(sizeof(struct single_row_lut), GFP_KERNEL);
  264. if (!temp) {
  265. pr_err("Cannot allocate memory for adjusted fcc table\n");
  266. return;
  267. }
  268. fcc = interpolate_fcc(the_chip->fcc_temp_lut, last_real_fcc_batt_temp);
  269. temp->cols = the_chip->fcc_temp_lut->cols;
  270. for (i = 0; i < the_chip->fcc_temp_lut->cols; i++) {
  271. temp->x[i] = the_chip->fcc_temp_lut->x[i];
  272. ratio = div_u64(the_chip->fcc_temp_lut->y[i] * 1000, fcc);
  273. temp->y[i] = (ratio * last_real_fcc_mah);
  274. temp->y[i] /= 1000;
  275. pr_debug("temp=%d, staticfcc=%d, adjfcc=%d, ratio=%d\n",
  276. temp->x[i], the_chip->fcc_temp_lut->y[i],
  277. temp->y[i], ratio);
  278. }
  279. old = the_chip->adjusted_fcc_temp_lut;
  280. the_chip->adjusted_fcc_temp_lut = temp;
  281. kfree(old);
  282. }
  283. static int bms_last_real_fcc_set(const char *val,
  284. const struct kernel_param *kp)
  285. {
  286. int rc = 0;
  287. if (battery_removed)
  288. return rc;
  289. if (last_real_fcc_mah == -EINVAL)
  290. rc = param_set_int(val, kp);
  291. if (rc) {
  292. pr_err("Failed to set last_real_fcc_mah rc=%d\n", rc);
  293. return rc;
  294. }
  295. if (last_real_fcc_batt_temp != -EINVAL)
  296. readjust_fcc_table();
  297. return rc;
  298. }
  299. static struct kernel_param_ops bms_last_real_fcc_param_ops = {
  300. .set = bms_last_real_fcc_set,
  301. .get = param_get_int,
  302. };
  303. module_param_cb(last_real_fcc_mah, &bms_last_real_fcc_param_ops,
  304. &last_real_fcc_mah, 0644);
  305. static int bms_last_real_fcc_batt_temp_set(const char *val,
  306. const struct kernel_param *kp)
  307. {
  308. int rc = 0;
  309. if (battery_removed)
  310. return rc;
  311. if (last_real_fcc_batt_temp == -EINVAL)
  312. rc = param_set_int(val, kp);
  313. if (rc) {
  314. pr_err("Failed to set last_real_fcc_batt_temp rc=%d\n", rc);
  315. return rc;
  316. }
  317. if (last_real_fcc_mah != -EINVAL)
  318. readjust_fcc_table();
  319. return rc;
  320. }
  321. static struct kernel_param_ops bms_last_real_fcc_batt_temp_param_ops = {
  322. .set = bms_last_real_fcc_batt_temp_set,
  323. .get = param_get_int,
  324. };
  325. module_param_cb(last_real_fcc_batt_temp, &bms_last_real_fcc_batt_temp_param_ops,
  326. &last_real_fcc_batt_temp, 0644);
  327. static int pm_bms_get_rt_status(struct pm8921_bms_chip *chip, int irq_id)
  328. {
  329. return pm8xxx_read_irq_stat(chip->dev->parent,
  330. chip->pmic_bms_irq[irq_id]);
  331. }
  332. static void pm8921_bms_enable_irq(struct pm8921_bms_chip *chip, int interrupt)
  333. {
  334. if (!__test_and_set_bit(interrupt, chip->enabled_irqs)) {
  335. dev_dbg(chip->dev, "%s %d\n", __func__,
  336. chip->pmic_bms_irq[interrupt]);
  337. enable_irq(chip->pmic_bms_irq[interrupt]);
  338. }
  339. }
  340. static void pm8921_bms_disable_irq(struct pm8921_bms_chip *chip, int interrupt)
  341. {
  342. if (__test_and_clear_bit(interrupt, chip->enabled_irqs)) {
  343. pr_debug("%d\n", chip->pmic_bms_irq[interrupt]);
  344. disable_irq_nosync(chip->pmic_bms_irq[interrupt]);
  345. }
  346. }
  347. static int pm_bms_masked_write(struct pm8921_bms_chip *chip, u16 addr,
  348. u8 mask, u8 val)
  349. {
  350. int rc;
  351. u8 reg;
  352. rc = pm8xxx_readb(chip->dev->parent, addr, &reg);
  353. if (rc) {
  354. pr_err("read failed addr = %03X, rc = %d\n", addr, rc);
  355. return rc;
  356. }
  357. reg &= ~mask;
  358. reg |= val & mask;
  359. rc = pm8xxx_writeb(chip->dev->parent, addr, reg);
  360. if (rc) {
  361. pr_err("write failed addr = %03X, rc = %d\n", addr, rc);
  362. return rc;
  363. }
  364. return 0;
  365. }
  366. static int usb_chg_plugged_in(struct pm8921_bms_chip *chip)
  367. {
  368. int val = pm8921_is_usb_chg_plugged_in();
  369. /* if the charger driver was not initialized, use the restart reason */
  370. if (val == -EINVAL) {
  371. if (pm8xxx_restart_reason(chip->dev->parent)
  372. == PM8XXX_RESTART_CHG)
  373. val = 1;
  374. else
  375. val = 0;
  376. }
  377. return val;
  378. }
  379. static void pm8921_bms_low_voltage_config(struct pm8921_bms_chip *chip,
  380. int time_ms)
  381. {
  382. int ms = 0;
  383. /* if work was pending and was cancelled, calculate SOC immediately */
  384. if (!cancel_delayed_work_sync(&chip->calculate_soc_delayed_work))
  385. ms = time_ms;
  386. chip->soc_calc_period = time_ms;
  387. schedule_delayed_work(&chip->calculate_soc_delayed_work,
  388. msecs_to_jiffies(ms));
  389. }
  390. static int pm8921_bms_enable_batt_alarm(struct pm8921_bms_chip *chip)
  391. {
  392. int rc = 0;
  393. rc = pm8xxx_batt_alarm_enable(PM8XXX_BATT_ALARM_LOWER_COMPARATOR);
  394. if (!rc)
  395. rc = pm8xxx_batt_alarm_disable(
  396. PM8XXX_BATT_ALARM_UPPER_COMPARATOR);
  397. if (rc) {
  398. pr_err("unable to set batt alarm state rc=%d\n", rc);
  399. return rc;
  400. }
  401. return rc;
  402. }
  403. static int pm8921_bms_configure_batt_alarm(struct pm8921_bms_chip *chip)
  404. {
  405. int rc = 0;
  406. rc = pm8xxx_batt_alarm_disable(PM8XXX_BATT_ALARM_UPPER_COMPARATOR);
  407. if (!rc)
  408. rc = pm8xxx_batt_alarm_disable(
  409. PM8XXX_BATT_ALARM_LOWER_COMPARATOR);
  410. if (rc) {
  411. pr_err("unable to set batt alarm state rc=%d\n", rc);
  412. return rc;
  413. }
  414. /*
  415. * The batt-alarm driver requires sane values for both min / max,
  416. * regardless of whether they're both activated.
  417. */
  418. rc = pm8xxx_batt_alarm_threshold_set(
  419. PM8XXX_BATT_ALARM_LOWER_COMPARATOR,
  420. chip->alarm_low_mv);
  421. if (!rc)
  422. rc = pm8xxx_batt_alarm_threshold_set(
  423. PM8XXX_BATT_ALARM_UPPER_COMPARATOR,
  424. chip->alarm_high_mv);
  425. if (rc) {
  426. pr_err("unable to set batt alarm threshold rc=%d\n", rc);
  427. return rc;
  428. }
  429. rc = pm8xxx_batt_alarm_hold_time_set(
  430. PM8XXX_BATT_ALARM_HOLD_TIME_16_MS);
  431. if (rc) {
  432. pr_err("unable to set batt alarm hold time rc=%d\n", rc);
  433. return rc;
  434. }
  435. /* PWM enabled at 2Hz */
  436. rc = pm8xxx_batt_alarm_pwm_rate_set(1, 7, 4);
  437. if (rc) {
  438. pr_err("unable to set batt alarm pwm rate rc=%d\n", rc);
  439. return rc;
  440. }
  441. rc = pm8xxx_batt_alarm_register_notifier(&alarm_notifier);
  442. if (rc) {
  443. pr_err("unable to register alarm notifier rc=%d\n", rc);
  444. return rc;
  445. }
  446. return rc;
  447. }
  448. static int pm8921_battery_gauge_alarm_notify(struct notifier_block *nb,
  449. unsigned long status, void *unused)
  450. {
  451. int rc;
  452. if (!the_chip) {
  453. pr_err("not initialized\n");
  454. return -EINVAL;
  455. }
  456. switch (status) {
  457. case 0:
  458. pr_debug("spurious interrupt\n");
  459. break;
  460. case 1:
  461. pr_debug("Low voltage alarm triggered\n");
  462. /*
  463. * hold the low voltage wakelock until the soc
  464. * work finds it appropriate to release it.
  465. */
  466. if (!wake_lock_active(&the_chip->low_voltage_wake_lock)) {
  467. pr_debug("Holding low voltage wakelock\n");
  468. wake_lock(&the_chip->low_voltage_wake_lock);
  469. pm8921_bms_low_voltage_config(the_chip,
  470. the_chip->low_voltage_calc_ms);
  471. }
  472. rc = pm8xxx_batt_alarm_disable(
  473. PM8XXX_BATT_ALARM_LOWER_COMPARATOR);
  474. if (!rc)
  475. rc = pm8xxx_batt_alarm_enable(
  476. PM8XXX_BATT_ALARM_UPPER_COMPARATOR);
  477. if (rc)
  478. pr_err("unable to set alarm state rc=%d\n", rc);
  479. break;
  480. case 2:
  481. rc = pm8xxx_batt_alarm_disable(
  482. PM8XXX_BATT_ALARM_UPPER_COMPARATOR);
  483. if (!rc)
  484. rc = pm8xxx_batt_alarm_enable(
  485. PM8XXX_BATT_ALARM_LOWER_COMPARATOR);
  486. if (rc)
  487. pr_err("unable to set alarm state rc=%d\n", rc);
  488. break;
  489. default:
  490. pr_err("error received\n");
  491. break;
  492. }
  493. return 0;
  494. };
  495. #define HOLD_OREG_DATA BIT(1)
  496. static int pm_bms_lock_output_data(struct pm8921_bms_chip *chip)
  497. {
  498. int rc;
  499. rc = pm_bms_masked_write(chip, BMS_CONTROL, HOLD_OREG_DATA,
  500. HOLD_OREG_DATA);
  501. if (rc) {
  502. pr_err("couldnt lock bms output rc = %d\n", rc);
  503. return rc;
  504. }
  505. return 0;
  506. }
  507. static int pm_bms_unlock_output_data(struct pm8921_bms_chip *chip)
  508. {
  509. int rc;
  510. rc = pm_bms_masked_write(chip, BMS_CONTROL, HOLD_OREG_DATA, 0);
  511. if (rc) {
  512. pr_err("fail to unlock BMS_CONTROL rc = %d\n", rc);
  513. return rc;
  514. }
  515. return 0;
  516. }
  517. #define SELECT_OUTPUT_DATA 0x1C
  518. #define SELECT_OUTPUT_TYPE_SHIFT 2
  519. #define OCV_FOR_RBATT 0x0
  520. #define VSENSE_FOR_RBATT 0x1
  521. #define VBATT_FOR_RBATT 0x2
  522. #define CC_MSB 0x3
  523. #define CC_LSB 0x4
  524. #define LAST_GOOD_OCV_VALUE 0x5
  525. #define VSENSE_AVG 0x6
  526. #define VBATT_AVG 0x7
  527. static int pm_bms_read_output_data(struct pm8921_bms_chip *chip, int type,
  528. int16_t *result)
  529. {
  530. int rc;
  531. u8 reg;
  532. if (!result) {
  533. pr_err("result pointer null\n");
  534. return -EINVAL;
  535. }
  536. *result = 0;
  537. if (type < OCV_FOR_RBATT || type > VBATT_AVG) {
  538. pr_err("invalid type %d asked to read\n", type);
  539. return -EINVAL;
  540. }
  541. rc = pm_bms_masked_write(chip, BMS_CONTROL, SELECT_OUTPUT_DATA,
  542. type << SELECT_OUTPUT_TYPE_SHIFT);
  543. if (rc) {
  544. pr_err("fail to select %d type in BMS_CONTROL rc = %d\n",
  545. type, rc);
  546. return rc;
  547. }
  548. rc = pm8xxx_readb(chip->dev->parent, BMS_OUTPUT0, &reg);
  549. if (rc) {
  550. pr_err("fail to read BMS_OUTPUT0 for type %d rc = %d\n",
  551. type, rc);
  552. return rc;
  553. }
  554. *result = reg;
  555. rc = pm8xxx_readb(chip->dev->parent, BMS_OUTPUT1, &reg);
  556. if (rc) {
  557. pr_err("fail to read BMS_OUTPUT1 for type %d rc = %d\n",
  558. type, rc);
  559. return rc;
  560. }
  561. *result |= reg << 8;
  562. pr_debug("type %d result %x", type, *result);
  563. return 0;
  564. }
  565. #define V_PER_BIT_MUL_FACTOR 97656
  566. #define V_PER_BIT_DIV_FACTOR 1000
  567. #define XOADC_INTRINSIC_OFFSET 0x6000
  568. static int xoadc_reading_to_microvolt(unsigned int a)
  569. {
  570. if (a <= XOADC_INTRINSIC_OFFSET)
  571. return 0;
  572. return (a - XOADC_INTRINSIC_OFFSET)
  573. * V_PER_BIT_MUL_FACTOR / V_PER_BIT_DIV_FACTOR;
  574. }
  575. #define XOADC_CALIB_UV 625000
  576. #define VBATT_MUL_FACTOR 3
  577. static int adjust_xo_vbatt_reading(struct pm8921_bms_chip *chip,
  578. int usb_chg, unsigned int uv)
  579. {
  580. s64 numerator, denominator;
  581. int local_delta;
  582. if (uv == 0)
  583. return 0;
  584. /* dont adjust if not calibrated */
  585. if (chip->xoadc_v0625 == 0 || chip->xoadc_v125 == 0) {
  586. pr_debug("No cal yet return %d\n", VBATT_MUL_FACTOR * uv);
  587. return VBATT_MUL_FACTOR * uv;
  588. }
  589. if (usb_chg)
  590. local_delta = last_usb_cal_delta_uv;
  591. else
  592. local_delta = 0;
  593. pr_debug("using delta = %d\n", local_delta);
  594. numerator = ((s64)uv - chip->xoadc_v0625 - local_delta)
  595. * XOADC_CALIB_UV;
  596. denominator = (s64)chip->xoadc_v125 - chip->xoadc_v0625 - local_delta;
  597. if (denominator == 0)
  598. return uv * VBATT_MUL_FACTOR;
  599. return (XOADC_CALIB_UV + local_delta + div_s64(numerator, denominator))
  600. * VBATT_MUL_FACTOR;
  601. }
  602. #define CC_RESOLUTION_N 868056
  603. #define CC_RESOLUTION_D 10000
  604. static s64 cc_to_microvolt(struct pm8921_bms_chip *chip, s64 cc)
  605. {
  606. return div_s64(cc * CC_RESOLUTION_N, CC_RESOLUTION_D);
  607. }
  608. #define CC_READING_TICKS 56
  609. #define SLEEP_CLK_HZ 32764
  610. #define SECONDS_PER_HOUR 3600
  611. /**
  612. * ccmicrovolt_to_pvh -
  613. * @cc_uv: coulumb counter converted to uV
  614. *
  615. * RETURNS: coulumb counter based charge in pVh
  616. * (pico Volt Hour)
  617. */
  618. static s64 ccmicrovolt_to_pvh(s64 cc_uv)
  619. {
  620. return div_s64(cc_uv * CC_READING_TICKS * 1000000L,
  621. SLEEP_CLK_HZ * SECONDS_PER_HOUR);
  622. }
  623. /* returns the signed value read from the hardware */
  624. static int read_cc(struct pm8921_bms_chip *chip, int *result)
  625. {
  626. int rc;
  627. uint16_t msw, lsw;
  628. *result = 0;
  629. rc = pm_bms_read_output_data(chip, CC_LSB, &lsw);
  630. if (rc) {
  631. pr_err("fail to read CC_LSB rc = %d\n", rc);
  632. return rc;
  633. }
  634. rc = pm_bms_read_output_data(chip, CC_MSB, &msw);
  635. if (rc) {
  636. pr_err("fail to read CC_MSB rc = %d\n", rc);
  637. return rc;
  638. }
  639. *result = msw << 16 | lsw;
  640. pr_debug("msw = %04x lsw = %04x cc = %d\n", msw, lsw, *result);
  641. return 0;
  642. }
  643. static int adjust_xo_vbatt_reading_for_mbg(struct pm8921_bms_chip *chip,
  644. int result)
  645. {
  646. int64_t numerator;
  647. int64_t denominator;
  648. if (chip->amux_2_trim_delta == 0)
  649. return result;
  650. numerator = (s64)result * 1000000;
  651. denominator = (1000000 + (410 * (s64)chip->amux_2_trim_delta));
  652. return div_s64(numerator, denominator);
  653. }
  654. static int convert_vbatt_raw_to_uv(struct pm8921_bms_chip *chip,
  655. int usb_chg,
  656. uint16_t reading, int *result)
  657. {
  658. *result = xoadc_reading_to_microvolt(reading);
  659. pr_debug("raw = %04x vbatt = %u\n", reading, *result);
  660. *result = adjust_xo_vbatt_reading(chip, usb_chg, *result);
  661. pr_debug("after adj vbatt = %u\n", *result);
  662. *result = adjust_xo_vbatt_reading_for_mbg(chip, *result);
  663. return 0;
  664. }
  665. static int convert_vsense_to_uv(struct pm8921_bms_chip *chip,
  666. int16_t reading, int *result)
  667. {
  668. *result = pm8xxx_ccadc_reading_to_microvolt(chip->revision, reading);
  669. pr_debug("raw = %04x vsense = %d\n", reading, *result);
  670. *result = pm8xxx_cc_adjust_for_gain(*result);
  671. pr_debug("after adj vsense = %d\n", *result);
  672. return 0;
  673. }
  674. static int read_vsense_avg(struct pm8921_bms_chip *chip, int *result)
  675. {
  676. int rc;
  677. int16_t reading;
  678. rc = pm_bms_read_output_data(chip, VSENSE_AVG, &reading);
  679. if (rc) {
  680. pr_err("fail to read VSENSE_AVG rc = %d\n", rc);
  681. return rc;
  682. }
  683. convert_vsense_to_uv(chip, reading, result);
  684. return 0;
  685. }
  686. static int get_batt_temp(struct pm8921_bms_chip *chip, int *batt_temp)
  687. {
  688. int rc;
  689. struct pm8xxx_adc_chan_result result;
  690. rc = pm8xxx_adc_read(chip->batt_temp_channel, &result);
  691. if (rc) {
  692. pr_err("error reading batt_temp_channel = %d, rc = %d\n",
  693. chip->batt_temp_channel, rc);
  694. return rc;
  695. }
  696. *batt_temp = result.physical;
  697. pr_debug("batt_temp phy = %lld meas = 0x%llx\n", result.physical,
  698. result.measurement);
  699. return 0;
  700. }
  701. #define BMS_MODE_BIT BIT(6)
  702. #define EN_VBAT_BIT BIT(5)
  703. #define OVERRIDE_MODE_DELAY_MS 20
  704. int override_mode_simultaneous_battery_voltage_and_current(int *ibat_ua,
  705. int *vbat_uv)
  706. {
  707. int16_t vsense_raw;
  708. int16_t vbat_raw;
  709. int vsense_uv;
  710. int usb_chg;
  711. int batt_temp;
  712. mutex_lock(&the_chip->bms_output_lock);
  713. pm8xxx_writeb(the_chip->dev->parent, BMS_S1_DELAY, 0x00);
  714. pm_bms_masked_write(the_chip, BMS_CONTROL,
  715. BMS_MODE_BIT | EN_VBAT_BIT, BMS_MODE_BIT | EN_VBAT_BIT);
  716. msleep(OVERRIDE_MODE_DELAY_MS);
  717. pm_bms_lock_output_data(the_chip);
  718. pm_bms_read_output_data(the_chip, VSENSE_AVG, &vsense_raw);
  719. pm_bms_read_output_data(the_chip, VBATT_AVG, &vbat_raw);
  720. pm_bms_unlock_output_data(the_chip);
  721. pm_bms_masked_write(the_chip, BMS_CONTROL,
  722. BMS_MODE_BIT | EN_VBAT_BIT, 0);
  723. pm8xxx_writeb(the_chip->dev->parent, BMS_S1_DELAY, 0x0B);
  724. mutex_unlock(&the_chip->bms_output_lock);
  725. get_batt_temp(the_chip, &batt_temp);
  726. usb_chg = usb_chg_plugged_in(the_chip);
  727. convert_vbatt_raw_to_uv(the_chip, usb_chg, vbat_raw, vbat_uv);
  728. convert_vsense_to_uv(the_chip, vsense_raw, &vsense_uv);
  729. *ibat_ua = div_s64((s64)vsense_uv * 1000000LL, the_chip->r_sense_uohm);
  730. pr_debug("vsense_raw = 0x%x vbat_raw = 0x%x"
  731. " ibat_ua = %d vbat_uv = %d\n",
  732. (uint16_t)vsense_raw, (uint16_t)vbat_raw,
  733. *ibat_ua, *vbat_uv);
  734. return 0;
  735. }
  736. #define MBG_TRANSIENT_ERROR_UV 15000
  737. static void adjust_pon_ocv(struct pm8921_bms_chip *chip, int *uv)
  738. {
  739. /*
  740. * In 8921 parts the PON ocv is taken when the MBG is not settled.
  741. * decrease the pon ocv by 15mV raw value to account for it
  742. * Since a 1/3rd of vbatt is supplied to the adc the raw value
  743. * needs to be adjusted by 5mV worth bits
  744. */
  745. if (*uv >= MBG_TRANSIENT_ERROR_UV)
  746. *uv -= MBG_TRANSIENT_ERROR_UV;
  747. }
  748. #define SEL_ALT_OREG_BIT BIT(2)
  749. static int ocv_ir_compensation(struct pm8921_bms_chip *chip, int ocv)
  750. {
  751. int compensated_ocv;
  752. int ibatt_ua;
  753. int rbatt_mohm = chip->default_rbatt_mohm + chip->rconn_mohm;
  754. pm_bms_masked_write(chip, BMS_TEST1,
  755. SEL_ALT_OREG_BIT, SEL_ALT_OREG_BIT);
  756. /* since the SEL_ALT_OREG_BIT is set this will give us VSENSE_OCV */
  757. pm8921_bms_get_battery_current(&ibatt_ua);
  758. compensated_ocv = ocv + div_s64((s64)ibatt_ua * rbatt_mohm, 1000);
  759. pr_debug("comp ocv = %d, ocv = %d, ibatt_ua = %d, rbatt_mohm = %d\n",
  760. compensated_ocv, ocv, ibatt_ua, rbatt_mohm);
  761. pm_bms_masked_write(chip, BMS_TEST1, SEL_ALT_OREG_BIT, 0);
  762. return compensated_ocv;
  763. }
  764. #define RESET_CC_BIT BIT(3)
  765. static int reset_cc(struct pm8921_bms_chip *chip)
  766. {
  767. int rc;
  768. rc = pm_bms_masked_write(chip, BMS_TEST1, RESET_CC_BIT, RESET_CC_BIT);
  769. if (rc < 0) {
  770. pr_err("err setting cc reset rc = %d\n", rc);
  771. return rc;
  772. }
  773. /* sleep 100uS for the coulomb counter to reset */
  774. udelay(100);
  775. rc = pm_bms_masked_write(chip, BMS_TEST1, RESET_CC_BIT, 0);
  776. if (rc < 0)
  777. pr_err("err clearing cc reset rc = %d\n", rc);
  778. return rc;
  779. }
  780. static int estimate_ocv(struct pm8921_bms_chip *chip)
  781. {
  782. int ibat_ua, vbat_uv, ocv_est_uv;
  783. int rc;
  784. int rbatt_mohm = chip->default_rbatt_mohm + chip->rconn_mohm
  785. + chip->rbatt_capacitive_mohm;
  786. rc = pm8921_bms_get_simultaneous_battery_voltage_and_current(
  787. &ibat_ua,
  788. &vbat_uv);
  789. if (rc) {
  790. pr_err("simultaneous failed rc = %d\n", rc);
  791. return rc;
  792. }
  793. ocv_est_uv = vbat_uv + (ibat_ua * rbatt_mohm) / 1000;
  794. pr_debug("estimated pon ocv = %d\n", ocv_est_uv);
  795. return ocv_est_uv;
  796. }
  797. static bool is_warm_restart(struct pm8921_bms_chip *chip)
  798. {
  799. u8 reg;
  800. int rc;
  801. rc = pm8xxx_readb(chip->dev->parent, PON_CNTRL_6, &reg);
  802. if (rc) {
  803. pr_err("err reading pon 6 rc = %d\n", rc);
  804. return false;
  805. }
  806. return reg & WD_BIT;
  807. }
  808. #define IBAT_TOL_MASK 0x0F
  809. #define OCV_TOL_MASK 0xF0
  810. #define IBAT_TOL_DEFAULT 0x03
  811. #define IBAT_TOL_NOCHG 0x0F
  812. #define OCV_TOL_DEFAULT 0x20
  813. #define OCV_TOL_NO_OCV 0x00
  814. static int pm8921_bms_stop_ocv_updates(void)
  815. {
  816. if (!the_chip) {
  817. pr_err("BMS driver has not been initialized yet!\n");
  818. return -EINVAL;
  819. }
  820. pr_debug("stopping ocv updates\n");
  821. return pm_bms_masked_write(the_chip, BMS_TOLERANCES,
  822. OCV_TOL_MASK, OCV_TOL_NO_OCV);
  823. }
  824. static int pm8921_bms_start_ocv_updates(void)
  825. {
  826. if (!the_chip) {
  827. pr_err("BMS driver has not been initialized yet!\n");
  828. return -EINVAL;
  829. }
  830. pr_debug("starting ocv updates\n");
  831. return pm_bms_masked_write(the_chip, BMS_TOLERANCES,
  832. OCV_TOL_MASK, OCV_TOL_DEFAULT);
  833. }
  834. static int reset_bms_for_test(void)
  835. {
  836. int ibat_ua, vbat_uv, rc;
  837. int ocv_est_uv;
  838. if (!the_chip) {
  839. pr_err("BMS driver has not been initialized yet!\n");
  840. return -EINVAL;
  841. }
  842. rc = pm8921_bms_get_simultaneous_battery_voltage_and_current(
  843. &ibat_ua,
  844. &vbat_uv);
  845. /*
  846. * don't include rbatt and rbatt_capacitve since we expect this to
  847. * be used with a fake battery which does not have internal resistnaces
  848. */
  849. ocv_est_uv = vbat_uv + (ibat_ua * the_chip->rconn_mohm) / 1000;
  850. pr_debug("forcing ocv to be %d due to bms reset mode\n", ocv_est_uv);
  851. the_chip->last_ocv_uv = ocv_est_uv;
  852. last_soc = -EINVAL;
  853. reset_cc(the_chip);
  854. the_chip->last_cc_uah = 0;
  855. pm8921_bms_stop_ocv_updates();
  856. pr_debug("bms reset to ocv = %duv vbat_ua = %d ibat_ua = %d\n",
  857. the_chip->last_ocv_uv, vbat_uv, ibat_ua);
  858. return rc;
  859. }
  860. static int bms_reset_set(const char *val, const struct kernel_param *kp)
  861. {
  862. int rc;
  863. rc = param_set_bool(val, kp);
  864. if (rc) {
  865. pr_err("Unable to set bms_reset: %d\n", rc);
  866. return rc;
  867. }
  868. if (*val == 'Y') {
  869. rc = reset_bms_for_test();
  870. if (rc) {
  871. pr_err("Unable to modify bms_reset: %d\n", rc);
  872. return rc;
  873. }
  874. }
  875. return 0;
  876. }
  877. static struct kernel_param_ops bms_reset_ops = {
  878. .set = bms_reset_set,
  879. .get = param_get_bool,
  880. };
  881. static bool bms_reset;
  882. module_param_cb(bms_reset, &bms_reset_ops, &bms_reset, 0644);
  883. /*
  884. * This reflects what should the CC readings should be for
  885. * a 5mAh discharge. This value is dependent on
  886. * CC_RESOLUTION_N, CC_RESOLUTION_D, CC_READING_TICKS
  887. * and rsense
  888. */
  889. #define CC_RAW_5MAH 0x00110000
  890. #define MIN_OCV_UV 2000000
  891. #define OCV_RAW_UNINITIALIZED 0xFFFF
  892. static int read_soc_params_raw(struct pm8921_bms_chip *chip,
  893. struct pm8921_soc_params *raw,
  894. int batt_temp_decidegc)
  895. {
  896. int usb_chg;
  897. int est_ocv_uv;
  898. mutex_lock(&chip->bms_output_lock);
  899. pm_bms_lock_output_data(chip);
  900. pm_bms_read_output_data(chip,
  901. LAST_GOOD_OCV_VALUE, &raw->last_good_ocv_raw);
  902. read_cc(chip, &raw->cc);
  903. pm_bms_unlock_output_data(chip);
  904. mutex_unlock(&chip->bms_output_lock);
  905. usb_chg = usb_chg_plugged_in(chip);
  906. if (chip->prev_last_good_ocv_raw == OCV_RAW_UNINITIALIZED) {
  907. chip->prev_last_good_ocv_raw = raw->last_good_ocv_raw;
  908. convert_vbatt_raw_to_uv(chip, usb_chg,
  909. raw->last_good_ocv_raw, &raw->last_good_ocv_uv);
  910. adjust_pon_ocv(chip, &raw->last_good_ocv_uv);
  911. raw->last_good_ocv_uv = ocv_ir_compensation(chip,
  912. raw->last_good_ocv_uv);
  913. chip->last_ocv_uv = raw->last_good_ocv_uv;
  914. if (is_warm_restart(chip)
  915. || raw->cc > CC_RAW_5MAH
  916. || (raw->last_good_ocv_uv < MIN_OCV_UV
  917. && raw->cc > 0)) {
  918. /*
  919. * The CC value is higher than 5mAh.
  920. * The phone started without going through a pon
  921. * sequence
  922. * OR
  923. * The ocv was very small and there was no
  924. * charging in the bootloader
  925. * - reset the CC and take an ocv again
  926. */
  927. pr_debug("cc_raw = 0x%x may be > 5mAh(0x%x)\n",
  928. raw->cc, CC_RAW_5MAH);
  929. pr_debug("ocv_uv = %d ocv_raw = 0x%x may be < 2V\n",
  930. chip->last_ocv_uv,
  931. raw->last_good_ocv_raw);
  932. est_ocv_uv = estimate_ocv(chip);
  933. if (est_ocv_uv > 0) {
  934. raw->last_good_ocv_uv = est_ocv_uv;
  935. chip->last_ocv_uv = est_ocv_uv;
  936. reset_cc(chip);
  937. raw->cc = 0;
  938. }
  939. }
  940. chip->last_ocv_temp_decidegc = batt_temp_decidegc;
  941. pr_debug("PON_OCV_UV = %d\n", chip->last_ocv_uv);
  942. } else if (chip->prev_last_good_ocv_raw != raw->last_good_ocv_raw) {
  943. chip->prev_last_good_ocv_raw = raw->last_good_ocv_raw;
  944. convert_vbatt_raw_to_uv(chip, usb_chg,
  945. raw->last_good_ocv_raw, &raw->last_good_ocv_uv);
  946. chip->last_ocv_uv = raw->last_good_ocv_uv;
  947. chip->last_ocv_temp_decidegc = batt_temp_decidegc;
  948. /* forget the old cc value upon ocv */
  949. chip->last_cc_uah = 0;
  950. } else {
  951. raw->last_good_ocv_uv = chip->last_ocv_uv;
  952. }
  953. /* stop faking 100% after an OCV event */
  954. if (chip->ocv_reading_at_100 != raw->last_good_ocv_raw)
  955. chip->ocv_reading_at_100 = OCV_RAW_UNINITIALIZED;
  956. pr_debug("0p625 = %duV\n", chip->xoadc_v0625);
  957. pr_debug("1p25 = %duV\n", chip->xoadc_v125);
  958. pr_debug("last_good_ocv_raw= 0x%x, last_good_ocv_uv= %duV\n",
  959. raw->last_good_ocv_raw, raw->last_good_ocv_uv);
  960. pr_debug("cc_raw= 0x%x\n", raw->cc);
  961. return 0;
  962. }
  963. static int get_rbatt(struct pm8921_bms_chip *chip, int soc_rbatt, int batt_temp)
  964. {
  965. int rbatt, scalefactor;
  966. rbatt = chip->default_rbatt_mohm;
  967. pr_debug("rbatt before scaling = %d\n", rbatt);
  968. if (chip->rbatt_sf_lut == NULL) {
  969. pr_debug("RBATT = %d\n", rbatt);
  970. return rbatt;
  971. }
  972. /* Convert the batt_temp to DegC from deciDegC */
  973. batt_temp = batt_temp / 10;
  974. scalefactor = interpolate_scalingfactor(chip->rbatt_sf_lut,
  975. batt_temp, soc_rbatt);
  976. pr_debug("rbatt sf = %d for batt_temp = %d, soc_rbatt = %d\n",
  977. scalefactor, batt_temp, soc_rbatt);
  978. rbatt = (rbatt * scalefactor) / 100;
  979. rbatt += the_chip->rconn_mohm;
  980. pr_debug("adding rconn_mohm = %d rbatt = %d\n",
  981. the_chip->rconn_mohm, rbatt);
  982. rbatt += the_chip->rbatt_capacitive_mohm;
  983. pr_debug("adding rbatt_capacitive_mohm = %d rbatt = %d\n",
  984. the_chip->rbatt_capacitive_mohm, rbatt);
  985. if (is_between(20, 10, soc_rbatt))
  986. rbatt = rbatt
  987. + ((20 - soc_rbatt) * chip->delta_rbatt_mohm) / 10;
  988. else
  989. if (is_between(10, 0, soc_rbatt))
  990. rbatt = rbatt + chip->delta_rbatt_mohm;
  991. pr_debug("RBATT = %d\n", rbatt);
  992. return rbatt;
  993. }
  994. static int calculate_fcc_uah(struct pm8921_bms_chip *chip, int batt_temp,
  995. int chargecycles)
  996. {
  997. int initfcc, result, scalefactor = 0;
  998. if (chip->adjusted_fcc_temp_lut == NULL) {
  999. initfcc = interpolate_fcc(chip->fcc_temp_lut, batt_temp);
  1000. scalefactor = interpolate_scalingfactor_fcc(chip->fcc_sf_lut,
  1001. chargecycles);
  1002. /* Multiply the initial FCC value by the scale factor. */
  1003. result = (initfcc * scalefactor * 1000) / 100;
  1004. pr_debug("fcc = %d uAh\n", result);
  1005. return result;
  1006. } else {
  1007. return 1000 * interpolate_fcc(chip->adjusted_fcc_temp_lut,
  1008. batt_temp);
  1009. }
  1010. }
  1011. static int get_battery_uvolts(struct pm8921_bms_chip *chip, int *uvolts)
  1012. {
  1013. int rc;
  1014. struct pm8xxx_adc_chan_result result;
  1015. rc = pm8xxx_adc_read(chip->vbat_channel, &result);
  1016. if (rc) {
  1017. pr_err("error reading adc channel = %d, rc = %d\n",
  1018. chip->vbat_channel, rc);
  1019. return rc;
  1020. }
  1021. pr_debug("mvolts phy = %lld meas = 0x%llx", result.physical,
  1022. result.measurement);
  1023. *uvolts = (int)result.physical;
  1024. return 0;
  1025. }
  1026. static int adc_based_ocv(struct pm8921_bms_chip *chip, int *ocv)
  1027. {
  1028. int vbatt, rbatt, ibatt_ua, rc;
  1029. rc = get_battery_uvolts(chip, &vbatt);
  1030. if (rc) {
  1031. pr_err("failed to read vbatt from adc rc = %d\n", rc);
  1032. return rc;
  1033. }
  1034. rc = pm8921_bms_get_battery_current(&ibatt_ua);
  1035. if (rc) {
  1036. pr_err("failed to read batt current rc = %d\n", rc);
  1037. return rc;
  1038. }
  1039. rbatt = chip->default_rbatt_mohm;
  1040. *ocv = vbatt + (ibatt_ua * rbatt)/1000;
  1041. return 0;
  1042. }
  1043. static int calculate_pc(struct pm8921_bms_chip *chip, int ocv_uv,
  1044. int batt_temp_decidegc, int chargecycles)
  1045. {
  1046. int pc, scalefactor;
  1047. pc = interpolate_pc(chip->pc_temp_ocv_lut,
  1048. batt_temp_decidegc / 10, ocv_uv / 1000);
  1049. pr_debug("pc = %u for ocv = %dmicroVolts batt_temp = %d\n",
  1050. pc, ocv_uv, batt_temp_decidegc);
  1051. scalefactor = interpolate_scalingfactor(chip->pc_sf_lut,
  1052. chargecycles, pc);
  1053. pr_debug("scalefactor = %u batt_temp = %d\n",
  1054. scalefactor, batt_temp_decidegc);
  1055. /* Multiply the initial FCC value by the scale factor. */
  1056. pc = (pc * scalefactor) / 100;
  1057. return pc;
  1058. }
  1059. /**
  1060. * calculate_cc_uah -
  1061. * @chip: the bms chip pointer
  1062. * @cc: the cc reading from bms h/w
  1063. * @val: return value
  1064. * @coulumb_counter: adjusted coulumb counter for 100%
  1065. *
  1066. * RETURNS: in val pointer coulumb counter based charger in uAh
  1067. * (micro Amp hour)
  1068. */
  1069. static void calculate_cc_uah(struct pm8921_bms_chip *chip, int cc, int *val)
  1070. {
  1071. int64_t cc_voltage_uv, cc_pvh, cc_uah;
  1072. cc_voltage_uv = cc;
  1073. pr_debug("cc = %d\n", cc);
  1074. cc_voltage_uv = cc_to_microvolt(chip, cc_voltage_uv);
  1075. cc_voltage_uv = pm8xxx_cc_adjust_for_gain(cc_voltage_uv);
  1076. pr_debug("cc_voltage_uv = %lld microvolts\n", cc_voltage_uv);
  1077. cc_pvh = ccmicrovolt_to_pvh(cc_voltage_uv);
  1078. pr_debug("cc_pvh = %lld pico_volt_hour\n", cc_pvh);
  1079. cc_uah = div_s64(cc_pvh, chip->r_sense_uohm);
  1080. *val = cc_uah;
  1081. }
  1082. int pm8921_bms_cc_uah(int *cc_uah)
  1083. {
  1084. int cc;
  1085. *cc_uah = 0;
  1086. if (!the_chip)
  1087. return -EINVAL;
  1088. read_cc(the_chip, &cc);
  1089. calculate_cc_uah(the_chip, cc, cc_uah);
  1090. return 0;
  1091. }
  1092. EXPORT_SYMBOL(pm8921_bms_cc_uah);
  1093. static int calculate_termination_uuc(struct pm8921_bms_chip *chip,
  1094. int batt_temp, int chargecycles,
  1095. int fcc_uah, int i_ma,
  1096. int *ret_pc_unusable)
  1097. {
  1098. int unusable_uv, pc_unusable, uuc;
  1099. int i = 0;
  1100. int ocv_mv;
  1101. int batt_temp_degc = batt_temp / 10;
  1102. int rbatt_mohm;
  1103. int delta_uv;
  1104. int prev_delta_uv = 0;
  1105. int prev_rbatt_mohm = 0;
  1106. int prev_ocv_mv = 0;
  1107. int uuc_rbatt_uv;
  1108. for (i = 0; i <= 100; i++) {
  1109. ocv_mv = interpolate_ocv(chip->pc_temp_ocv_lut,
  1110. batt_temp_degc, i);
  1111. rbatt_mohm = get_rbatt(chip, i, batt_temp);
  1112. unusable_uv = (rbatt_mohm * i_ma) + (chip->v_cutoff * 1000);
  1113. delta_uv = ocv_mv * 1000 - unusable_uv;
  1114. pr_debug("soc = %d ocv = %d rbat = %d u_uv = %d delta_v = %d\n",
  1115. i, ocv_mv, rbatt_mohm, unusable_uv, delta_uv);
  1116. if (delta_uv > 0)
  1117. break;
  1118. prev_delta_uv = delta_uv;
  1119. prev_rbatt_mohm = rbatt_mohm;
  1120. prev_ocv_mv = ocv_mv;
  1121. }
  1122. uuc_rbatt_uv = linear_interpolate(rbatt_mohm, delta_uv,
  1123. prev_rbatt_mohm, prev_delta_uv,
  1124. 0);
  1125. unusable_uv = (uuc_rbatt_uv * i_ma) + (chip->v_cutoff * 1000);
  1126. pc_unusable = calculate_pc(chip, unusable_uv, batt_temp, chargecycles);
  1127. uuc = (fcc_uah * pc_unusable) / 100;
  1128. pr_debug("For i_ma = %d, unusable_rbatt = %d unusable_uv = %d unusable_pc = %d uuc = %d\n",
  1129. i_ma, uuc_rbatt_uv, unusable_uv,
  1130. pc_unusable, uuc);
  1131. *ret_pc_unusable = pc_unusable;
  1132. return uuc;
  1133. }
  1134. #define TIME_PER_PERCENT_UUC 60
  1135. static int adjust_uuc(struct pm8921_bms_chip *chip, int fcc_uah,
  1136. int new_pc_unusable,
  1137. int new_uuc,
  1138. int batt_temp,
  1139. int rbatt,
  1140. int *iavg_ma,
  1141. int delta_time_s)
  1142. {
  1143. int new_unusable_mv;
  1144. int batt_temp_degc = batt_temp / 10;
  1145. int max_percent_change;
  1146. max_percent_change = max(delta_time_s / TIME_PER_PERCENT_UUC, 1);
  1147. if (chip->prev_pc_unusable == -EINVAL
  1148. || abs(chip->prev_pc_unusable - new_pc_unusable)
  1149. <= max_percent_change) {
  1150. chip->prev_pc_unusable = new_pc_unusable;
  1151. return new_uuc;
  1152. }
  1153. /* the uuc is trying to change more than 1% restrict it */
  1154. if (new_pc_unusable > chip->prev_pc_unusable)
  1155. chip->prev_pc_unusable += max_percent_change;
  1156. else
  1157. chip->prev_pc_unusable -= max_percent_change;
  1158. chip->prev_pc_unusable = clamp(chip->prev_pc_unusable, 0, 100);
  1159. new_uuc = (fcc_uah * chip->prev_pc_unusable) / 100;
  1160. /* also find update the iavg_ma accordingly */
  1161. new_unusable_mv = interpolate_ocv(chip->pc_temp_ocv_lut,
  1162. batt_temp_degc, chip->prev_pc_unusable);
  1163. if (new_unusable_mv < chip->v_cutoff)
  1164. new_unusable_mv = chip->v_cutoff;
  1165. *iavg_ma = (new_unusable_mv - chip->v_cutoff) * 1000 / rbatt;
  1166. if (*iavg_ma == 0)
  1167. *iavg_ma = 1;
  1168. pr_debug("Restricting UUC to %d (%d%%) unusable_mv = %d iavg_ma = %d\n",
  1169. new_uuc, chip->prev_pc_unusable,
  1170. new_unusable_mv, *iavg_ma);
  1171. return new_uuc;
  1172. }
  1173. static int get_current_time(unsigned long *now_tm_sec)
  1174. {
  1175. struct rtc_time tm;
  1176. struct rtc_device *rtc;
  1177. int rc;
  1178. rtc = rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE);
  1179. if (rtc == NULL) {
  1180. pr_err("%s: unable to open rtc device (%s)\n",
  1181. __FILE__, CONFIG_RTC_HCTOSYS_DEVICE);
  1182. return -EINVAL;
  1183. }
  1184. rc = rtc_read_time(rtc, &tm);
  1185. if (rc) {
  1186. pr_err("Error reading rtc device (%s) : %d\n",
  1187. CONFIG_RTC_HCTOSYS_DEVICE, rc);
  1188. return rc;
  1189. }
  1190. rc = rtc_valid_tm(&tm);
  1191. if (rc) {
  1192. pr_err("Invalid RTC time (%s): %d\n",
  1193. CONFIG_RTC_HCTOSYS_DEVICE, rc);
  1194. return rc;
  1195. }
  1196. rtc_tm_to_time(&tm, now_tm_sec);
  1197. return 0;
  1198. }
  1199. static int calculate_delta_time(struct pm8921_bms_chip *chip, int *delta_time_s)
  1200. {
  1201. unsigned long now_tm_sec = 0;
  1202. /* default to delta time = 0 if anything fails */
  1203. *delta_time_s = 0;
  1204. get_current_time(&now_tm_sec);
  1205. *delta_time_s = (now_tm_sec - chip->tm_sec);
  1206. pr_debug("tm_sec = %ld, now_tm_sec = %ld delta_s = %d\n",
  1207. chip->tm_sec, now_tm_sec, *delta_time_s);
  1208. /* remember this time */
  1209. chip->tm_sec = now_tm_sec;
  1210. return 0;
  1211. }
  1212. static void calculate_iavg_ua(struct pm8921_bms_chip *chip, int cc_uah,
  1213. int *iavg_ua, int delta_time_s)
  1214. {
  1215. int delta_cc_uah = 0;
  1216. /* if anything fails report the previous iavg_ua */
  1217. *iavg_ua = chip->prev_iavg_ua;
  1218. if (chip->last_cc_uah == INT_MIN) {
  1219. pm8921_bms_get_battery_current(iavg_ua);
  1220. goto out;
  1221. }
  1222. /* use the previous iavg if called within 15 seconds */
  1223. if (delta_time_s < 15) {
  1224. *iavg_ua = chip->prev_iavg_ua;
  1225. goto out;
  1226. }
  1227. delta_cc_uah = cc_uah - chip->last_cc_uah;
  1228. *iavg_ua = div_s64((s64)delta_cc_uah * 3600, delta_time_s);
  1229. out:
  1230. pr_debug("delta_cc = %d iavg_ua = %d\n", delta_cc_uah, (int)*iavg_ua);
  1231. /* remember the iavg */
  1232. chip->prev_iavg_ua = *iavg_ua;
  1233. /* remember cc_uah */
  1234. chip->last_cc_uah = cc_uah;
  1235. }
  1236. #define IAVG_SAMPLES 16
  1237. #define MIN_IAVG_MA 250
  1238. #define MIN_SECONDS_FOR_VALID_SAMPLE 20
  1239. static int calculate_unusable_charge_uah(struct pm8921_bms_chip *chip,
  1240. int rbatt, int fcc_uah, int cc_uah,
  1241. int soc_rbatt, int batt_temp, int chargecycles,
  1242. int iavg_ua, int delta_time_s)
  1243. {
  1244. int uuc_uah_iavg;
  1245. int i;
  1246. int iavg_ma = iavg_ua / 1000;
  1247. static int iavg_samples[IAVG_SAMPLES];
  1248. static int iavg_index;
  1249. static int iavg_num_samples;
  1250. static int firsttime = 1;
  1251. int pc_unusable;
  1252. /*
  1253. * if we are called first time fill all the
  1254. * samples with the the shutdown_iavg_ua
  1255. */
  1256. if (firsttime && chip->shutdown_iavg_ua != 0) {
  1257. pr_debug("Using shutdown_iavg_ua = %d in all samples\n",
  1258. chip->shutdown_iavg_ua);
  1259. for (i = 0; i < IAVG_SAMPLES; i++)
  1260. iavg_samples[i] = chip->shutdown_iavg_ua;
  1261. iavg_index = 0;
  1262. iavg_num_samples = IAVG_SAMPLES;
  1263. }
  1264. /*
  1265. * if we are charging use a nominal avg current so that we keep
  1266. * a reasonable UUC while charging
  1267. */
  1268. if (iavg_ma < MIN_IAVG_MA)
  1269. iavg_ma = MIN_IAVG_MA;
  1270. iavg_samples[iavg_index] = iavg_ma;
  1271. iavg_index = (iavg_index + 1) % IAVG_SAMPLES;
  1272. iavg_num_samples++;
  1273. if (iavg_num_samples >= IAVG_SAMPLES)
  1274. iavg_num_samples = IAVG_SAMPLES;
  1275. /* now that this sample is added calcualte the average */
  1276. iavg_ma = 0;
  1277. if (iavg_num_samples != 0) {
  1278. for (i = 0; i < iavg_num_samples; i++) {
  1279. pr_debug("iavg_samples[%d] = %d\n", i, iavg_samples[i]);
  1280. iavg_ma += iavg_samples[i];
  1281. }
  1282. iavg_ma = DIV_ROUND_CLOSEST(iavg_ma, iavg_num_samples);
  1283. }
  1284. /*
  1285. * if we're in bms reset mode, force uuc to be 3% of fcc
  1286. */
  1287. if (bms_reset)
  1288. return (fcc_uah * 3) / 100;
  1289. uuc_uah_iavg = calculate_termination_uuc(chip,
  1290. batt_temp, chargecycles,
  1291. fcc_uah, iavg_ma,
  1292. &pc_unusable);
  1293. pr_debug("iavg = %d uuc_iavg = %d\n", iavg_ma, uuc_uah_iavg);
  1294. /* restrict the uuc change to one percent per 60 seconds */
  1295. uuc_uah_iavg = adjust_uuc(chip, fcc_uah, pc_unusable, uuc_uah_iavg,
  1296. batt_temp, rbatt, &iavg_ma, delta_time_s);
  1297. /* find out what the avg current should be for this uuc */
  1298. chip->prev_uuc_iavg_ma = iavg_ma;
  1299. firsttime = 0;
  1300. return uuc_uah_iavg;
  1301. }
  1302. /* calculate remainging charge at the time of ocv */
  1303. static int calculate_remaining_charge_uah(struct pm8921_bms_chip *chip,
  1304. struct pm8921_soc_params *raw,
  1305. int fcc_uah, int batt_temp,
  1306. int chargecycles)
  1307. {
  1308. int ocv, pc, batt_temp_decidegc;
  1309. ocv = raw->last_good_ocv_uv;
  1310. batt_temp_decidegc = chip->last_ocv_temp_decidegc;
  1311. pc = calculate_pc(chip, ocv, batt_temp_decidegc, chargecycles);
  1312. pr_debug("ocv = %d pc = %d\n", ocv, pc);
  1313. return (fcc_uah * pc) / 100;
  1314. }
  1315. static void calculate_soc_params(struct pm8921_bms_chip *chip,
  1316. struct pm8921_soc_params *raw,
  1317. int batt_temp, int chargecycles,
  1318. int *fcc_uah,
  1319. int *unusable_charge_uah,
  1320. int *remaining_charge_uah,
  1321. int *cc_uah,
  1322. int *rbatt,
  1323. int *iavg_ua)
  1324. {
  1325. int soc_rbatt;
  1326. int delta_time_s;
  1327. int rc;
  1328. rc = calculate_delta_time(chip, &delta_time_s);
  1329. if (rc) {
  1330. pr_err("Failed to get delta time from RTC: %d\n", rc);
  1331. delta_time_s = 0;
  1332. }
  1333. *fcc_uah = calculate_fcc_uah(chip, batt_temp, chargecycles);
  1334. pr_debug("FCC = %uuAh batt_temp = %d, cycles = %d\n",
  1335. *fcc_uah, batt_temp, chargecycles);
  1336. /* calculate remainging charge */
  1337. *remaining_charge_uah = calculate_remaining_charge_uah(chip, raw,
  1338. *fcc_uah, batt_temp, chargecycles);
  1339. pr_debug("RC = %uuAh\n", *remaining_charge_uah);
  1340. /* calculate cc micro_volt_hour */
  1341. calculate_cc_uah(chip, raw->cc, cc_uah);
  1342. pr_debug("cc_uah = %duAh raw->cc = %x\n", *cc_uah, raw->cc);
  1343. soc_rbatt = ((*remaining_charge_uah - *cc_uah) * 100) / *fcc_uah;
  1344. if (soc_rbatt < 0)
  1345. soc_rbatt = 0;
  1346. *rbatt = get_rbatt(chip, soc_rbatt, batt_temp);
  1347. calculate_iavg_ua(chip, *cc_uah, iavg_ua, delta_time_s);
  1348. *unusable_charge_uah = calculate_unusable_charge_uah(chip, *rbatt,
  1349. *fcc_uah, *cc_uah, soc_rbatt,
  1350. batt_temp, chargecycles, *iavg_ua,
  1351. delta_time_s);
  1352. pr_debug("UUC = %uuAh\n", *unusable_charge_uah);
  1353. }
  1354. int pm8921_bms_get_simultaneous_battery_voltage_and_current(int *ibat_ua,
  1355. int *vbat_uv)
  1356. {
  1357. int rc;
  1358. if (the_chip == NULL) {
  1359. pr_err("Called too early\n");
  1360. return -EINVAL;
  1361. }
  1362. if (pm8921_is_batfet_closed()) {
  1363. return override_mode_simultaneous_battery_voltage_and_current(
  1364. ibat_ua,
  1365. vbat_uv);
  1366. } else {
  1367. pr_debug("batfet is open using separate vbat and ibat meas\n");
  1368. rc = get_battery_uvolts(the_chip, vbat_uv);
  1369. if (rc < 0) {
  1370. pr_err("adc vbat failed err = %d\n", rc);
  1371. return rc;
  1372. }
  1373. rc = pm8921_bms_get_battery_current(ibat_ua);
  1374. if (rc < 0) {
  1375. pr_err("bms ibat failed err = %d\n", rc);
  1376. return rc;
  1377. }
  1378. }
  1379. return 0;
  1380. }
  1381. EXPORT_SYMBOL(pm8921_bms_get_simultaneous_battery_voltage_and_current);
  1382. #define SIGN(x) ((x) < 0 ? -1 : 1)
  1383. static void find_ocv_for_soc(struct pm8921_bms_chip *chip,
  1384. int batt_temp,
  1385. int chargecycles,
  1386. int fcc_uah,
  1387. int uuc_uah,
  1388. int cc_uah,
  1389. int shutdown_soc,
  1390. int *rc_uah,
  1391. int *ocv_uv)
  1392. {
  1393. s64 rc;
  1394. int pc, new_pc;
  1395. int batt_temp_degc = batt_temp / 10;
  1396. int ocv;
  1397. rc = (s64)shutdown_soc * (fcc_uah - uuc_uah);
  1398. rc = div_s64(rc, 100) + cc_uah + uuc_uah;
  1399. pc = DIV_ROUND_CLOSEST((int)rc * 100, fcc_uah);
  1400. pc = clamp(pc, 0, 100);
  1401. ocv = interpolate_ocv(chip->pc_temp_ocv_lut, batt_temp_degc, pc);
  1402. pr_debug("s_soc = %d, fcc = %d uuc = %d rc = %d, pc = %d, ocv mv = %d\n",
  1403. shutdown_soc, fcc_uah, uuc_uah, (int)rc, pc, ocv);
  1404. new_pc = interpolate_pc(chip->pc_temp_ocv_lut, batt_temp_degc, ocv);
  1405. pr_debug("test revlookup pc = %d for ocv = %d\n", new_pc, ocv);
  1406. if (abs(new_pc - pc) > 0) {
  1407. /* Maximum spins to make in while-loop when searching in
  1408. * full resolution.
  1409. */
  1410. const unsigned int max_spin_count =
  1411. chip->max_voltage_uv / 1000 - chip->v_cutoff + 1;
  1412. unsigned int count = 0;
  1413. int delta_mv = 5;
  1414. int diff = abs(new_pc - pc);
  1415. char sign = SIGN(new_pc - pc);
  1416. char old_sign;
  1417. int old_diff;
  1418. int old_ocv;
  1419. do {
  1420. count++;
  1421. old_ocv = ocv;
  1422. old_diff = diff;
  1423. old_sign = sign;
  1424. if (new_pc > pc)
  1425. ocv -= delta_mv;
  1426. else
  1427. ocv += delta_mv;
  1428. new_pc = interpolate_pc(chip->pc_temp_ocv_lut,
  1429. batt_temp_degc, ocv);
  1430. pr_debug("test revlookup pc = %d for ocv = %d\n",
  1431. new_pc, ocv);
  1432. diff = abs(new_pc - pc);
  1433. sign = SIGN(new_pc - pc);
  1434. if (sign != old_sign) {
  1435. if (delta_mv == 5) {
  1436. /*
  1437. * we crossed our desired PC probably
  1438. * becuase we were overcorrecting
  1439. */
  1440. delta_mv = 1;
  1441. } else {
  1442. /* we crossed our desired PC even with
  1443. * 1mV steps, choose the best of two */
  1444. if (diff > old_diff)
  1445. ocv = old_ocv;
  1446. break;
  1447. }
  1448. }
  1449. } while (count <= max_spin_count && diff > 0);
  1450. }
  1451. *ocv_uv = ocv * 1000;
  1452. *rc_uah = (int)rc;
  1453. }
  1454. static void adjust_rc_and_uuc_for_specific_soc(
  1455. struct pm8921_bms_chip *chip,
  1456. int batt_temp,
  1457. int chargecycles,
  1458. int soc,
  1459. int fcc_uah,
  1460. int uuc_uah,
  1461. int cc_uah,
  1462. int rc_uah,
  1463. int rbatt,
  1464. int *ret_ocv,
  1465. int *ret_rc,
  1466. int *ret_uuc,
  1467. int *ret_rbatt)
  1468. {
  1469. int ocv_uv;
  1470. find_ocv_for_soc(chip, batt_temp, chargecycles,
  1471. fcc_uah, uuc_uah, cc_uah,
  1472. soc,
  1473. &rc_uah, &ocv_uv);
  1474. *ret_ocv = ocv_uv;
  1475. *ret_rbatt = rbatt;
  1476. *ret_rc = rc_uah;
  1477. *ret_uuc = uuc_uah;
  1478. }
  1479. static void calc_current_max(struct pm8921_bms_chip *chip, int ocv_uv,
  1480. int rbatt_mohm)
  1481. {
  1482. chip->imax_ua = 1000 * (ocv_uv - chip->v_cutoff * 1000) / rbatt_mohm;
  1483. }
  1484. static int bound_soc(int soc)
  1485. {
  1486. soc = max(0, soc);
  1487. soc = min(100, soc);
  1488. return soc;
  1489. }
  1490. static int charging_adjustments(struct pm8921_bms_chip *chip,
  1491. int soc, int vbat_uv, int ibat_ua,
  1492. int batt_temp, int chargecycles,
  1493. int fcc_uah, int cc_uah, int uuc_uah)
  1494. {
  1495. int chg_soc;
  1496. int vbat_batt_terminal_uv = vbat_uv
  1497. + (ibat_ua * chip->rconn_mohm) / 1000;
  1498. if (chip->soc_at_cv == -EINVAL) {
  1499. /* In constant current charging return the calc soc */
  1500. if (vbat_batt_terminal_uv <= chip->max_voltage_uv)
  1501. pr_debug("CC CHG SOC %d\n", soc);
  1502. /* Note the CC to CV point */
  1503. if (vbat_batt_terminal_uv >= chip->max_voltage_uv) {
  1504. chip->soc_at_cv = soc;
  1505. chip->prev_chg_soc = soc;
  1506. chip->ibat_at_cv_ua = ibat_ua;
  1507. pr_debug("CC_TO_CV ibat_ua = %d CHG SOC %d\n",
  1508. ibat_ua, soc);
  1509. }
  1510. chip->prev_vbat_batt_terminal_uv = vbat_batt_terminal_uv;
  1511. return soc;
  1512. }
  1513. /*
  1514. * battery is in CV phase - begin liner inerpolation of soc based on
  1515. * battery charge current
  1516. */
  1517. /*
  1518. * if the battery terminal voltage lessened (possibly because of
  1519. * a sudden increase in system load) keep reporting the prev chg soc
  1520. */
  1521. if (vbat_batt_terminal_uv < chip->prev_vbat_batt_terminal_uv) {
  1522. pr_debug("vbat_terminals %d < prev = %d CC CHG SOC %d\n",
  1523. vbat_batt_terminal_uv,
  1524. chip->prev_vbat_batt_terminal_uv,
  1525. chip->prev_chg_soc);
  1526. chip->prev_vbat_batt_terminal_uv = vbat_batt_terminal_uv;
  1527. return chip->prev_chg_soc;
  1528. }
  1529. chg_soc = linear_interpolate(chip->soc_at_cv, chip->ibat_at_cv_ua,
  1530. 100, -1 * chip->chg_term_ua,
  1531. ibat_ua);
  1532. chg_soc = bound_soc(chg_soc);
  1533. /* always report a higher soc */
  1534. if (chg_soc > chip->prev_chg_soc) {
  1535. int new_ocv_uv;
  1536. int new_rc;
  1537. chip->prev_chg_soc = chg_soc;
  1538. find_ocv_for_soc(chip, batt_temp, chargecycles,
  1539. fcc_uah, uuc_uah, cc_uah,
  1540. chg_soc,
  1541. &new_rc, &new_ocv_uv);
  1542. the_chip->last_ocv_uv = new_ocv_uv;
  1543. pr_debug("CC CHG ADJ OCV = %d CHG SOC %d\n",
  1544. new_ocv_uv,
  1545. chip->prev_chg_soc);
  1546. }
  1547. pr_debug("Reporting CHG SOC %d\n", chip->prev_chg_soc);
  1548. chip->prev_vbat_batt_terminal_uv = vbat_batt_terminal_uv;
  1549. return chip->prev_chg_soc;
  1550. }
  1551. static void very_low_voltage_check(struct pm8921_bms_chip *chip,
  1552. int ibat_ua, int vbat_uv)
  1553. {
  1554. int rc;
  1555. /*
  1556. * if battery is very low (v_cutoff voltage + 20mv) hold
  1557. * a wakelock untill soc = 0%
  1558. */
  1559. if (vbat_uv <= (chip->alarm_low_mv + 20) * 1000 &&
  1560. !wake_lock_active(&the_chip->low_voltage_wake_lock)) {
  1561. pr_debug("voltage = %d low holding wakelock\n", vbat_uv);
  1562. wake_lock(&chip->low_voltage_wake_lock);
  1563. chip->soc_calc_period = chip->low_voltage_calc_ms;
  1564. }
  1565. if (vbat_uv > (chip->alarm_low_mv + 20 + BATT_ALARM_ACCURACY) * 1000
  1566. && wake_lock_active(&the_chip->low_voltage_wake_lock)) {
  1567. pr_debug("voltage = %d releasing wakelock\n", vbat_uv);
  1568. chip->vbatt_cutoff_count = 0;
  1569. chip->soc_calc_period = chip->normal_voltage_calc_ms;
  1570. rc = pm8921_bms_enable_batt_alarm(chip);
  1571. if (rc)
  1572. pr_err("Unable to enable batt alarm\n");
  1573. wake_unlock(&chip->low_voltage_wake_lock);
  1574. }
  1575. }
  1576. static bool is_voltage_below_cutoff_window(struct pm8921_bms_chip *chip,
  1577. int ibat_ua, int vbat_uv)
  1578. {
  1579. if (vbat_uv < (chip->v_cutoff * 1000) && ibat_ua > 0) {
  1580. chip->vbatt_cutoff_count++;
  1581. if (chip->vbatt_cutoff_count >= chip->vbatt_cutoff_retries) {
  1582. pr_debug("cutoff_count >= %d\n",
  1583. chip->vbatt_cutoff_retries);
  1584. return true;
  1585. }
  1586. } else {
  1587. chip->vbatt_cutoff_count = 0;
  1588. }
  1589. return false;
  1590. }
  1591. static int last_soc_est = -EINVAL;
  1592. static int adjust_soc(struct pm8921_bms_chip *chip, int soc,
  1593. int batt_temp, int chargecycles,
  1594. int rbatt, int fcc_uah, int uuc_uah, int cc_uah)
  1595. {
  1596. int ibat_ua = 0, vbat_uv = 0;
  1597. int ocv_est_uv = 0, soc_est = 0, pc_est = 0, pc = 0;
  1598. int delta_ocv_uv = 0;
  1599. int n = 0;
  1600. int rc_new_uah = 0;
  1601. int pc_new = 0;
  1602. int soc_new = 0;
  1603. int m = 0;
  1604. int rc = 0;
  1605. int delta_ocv_uv_limit = 0;
  1606. int correction_limit_uv = 0;
  1607. rc = pm8921_bms_get_simultaneous_battery_voltage_and_current(
  1608. &ibat_ua,
  1609. &vbat_uv);
  1610. if (rc < 0) {
  1611. pr_err("simultaneous vbat ibat failed err = %d\n", rc);
  1612. goto out;
  1613. }
  1614. very_low_voltage_check(chip, ibat_ua, vbat_uv);
  1615. if (chip->low_voltage_detect &&
  1616. wake_lock_active(&chip->low_voltage_wake_lock)) {
  1617. if (is_voltage_below_cutoff_window(chip, ibat_ua, vbat_uv)) {
  1618. soc = 0;
  1619. pr_info("Voltage below cutoff, setting soc to 0\n");
  1620. goto out;
  1621. }
  1622. }
  1623. delta_ocv_uv_limit = DIV_ROUND_CLOSEST(ibat_ua, 1000);
  1624. ocv_est_uv = vbat_uv + (ibat_ua * rbatt)/1000;
  1625. calc_current_max(chip, ocv_est_uv, rbatt);
  1626. pc_est = calculate_pc(chip, ocv_est_uv, batt_temp, last_chargecycles);
  1627. soc_est = div_s64((s64)fcc_uah * pc_est - uuc_uah*100,
  1628. (s64)fcc_uah - uuc_uah);
  1629. soc_est = bound_soc(soc_est);
  1630. /* never adjust during bms reset mode */
  1631. if (bms_reset) {
  1632. pr_debug("bms reset mode, SOC adjustment skipped\n");
  1633. goto out;
  1634. }
  1635. if (ibat_ua < 0 && pm8921_is_batfet_closed()) {
  1636. soc = charging_adjustments(chip, soc, vbat_uv, ibat_ua,
  1637. batt_temp, chargecycles,
  1638. fcc_uah, cc_uah, uuc_uah);
  1639. goto out;
  1640. }
  1641. /*
  1642. * do not adjust
  1643. * if soc_est is same as what bms calculated
  1644. * OR if soc_est > 15
  1645. * OR if soc it is above 90 because we might pull it low
  1646. * and cause a bad user experience
  1647. */
  1648. if (soc_est == soc
  1649. || soc_est > 15
  1650. || soc >= 90)
  1651. goto out;
  1652. if (last_soc_est == -EINVAL)
  1653. last_soc_est = soc;
  1654. n = min(200, max(1 , soc + soc_est + last_soc_est));
  1655. /* remember the last soc_est in last_soc_est */
  1656. last_soc_est = soc_est;
  1657. pc = calculate_pc(chip, chip->last_ocv_uv,
  1658. chip->last_ocv_temp_decidegc, last_chargecycles);
  1659. if (pc > 0) {
  1660. pc_new = calculate_pc(chip, chip->last_ocv_uv - (++m * 1000),
  1661. chip->last_ocv_temp_decidegc,
  1662. last_chargecycles);
  1663. while (pc_new == pc) {
  1664. /* start taking 10mV steps */
  1665. m = m + 10;
  1666. pc_new = calculate_pc(chip,
  1667. chip->last_ocv_uv - (m * 1000),
  1668. chip->last_ocv_temp_decidegc,
  1669. last_chargecycles);
  1670. }
  1671. } else {
  1672. /*
  1673. * pc is already at the lowest point,
  1674. * assume 1 millivolt translates to 1% pc
  1675. */
  1676. pc = 1;
  1677. pc_new = 0;
  1678. m = 1;
  1679. }
  1680. delta_ocv_uv = div_s64((soc - soc_est) * (s64)m * 1000,
  1681. n * (pc - pc_new));
  1682. if (abs(delta_ocv_uv) > delta_ocv_uv_limit) {
  1683. pr_debug("limiting delta ocv %d limit = %d\n", delta_ocv_uv,
  1684. delta_ocv_uv_limit);
  1685. if (delta_ocv_uv > 0)
  1686. delta_ocv_uv = delta_ocv_uv_limit;
  1687. else
  1688. delta_ocv_uv = -1 * delta_ocv_uv_limit;
  1689. pr_debug("new delta ocv = %d\n", delta_ocv_uv);
  1690. }
  1691. if (wake_lock_active(&chip->low_voltage_wake_lock)) {
  1692. pr_debug("Low Voltage, apply only ibat limited corrections\n");
  1693. goto skip_limiting_corrections;
  1694. }
  1695. if (chip->last_ocv_uv > 3800000)
  1696. correction_limit_uv = the_chip->high_ocv_correction_limit_uv;
  1697. else
  1698. correction_limit_uv = the_chip->low_ocv_correction_limit_uv;
  1699. if (abs(delta_ocv_uv) > correction_limit_uv) {
  1700. pr_debug("limiting delta ocv %d limit = %d\n", delta_ocv_uv,
  1701. correction_limit_uv);
  1702. if (delta_ocv_uv > 0)
  1703. delta_ocv_uv = correction_limit_uv;
  1704. else
  1705. delta_ocv_uv = -1 * correction_limit_uv;
  1706. pr_debug("new delta ocv = %d\n", delta_ocv_uv);
  1707. }
  1708. skip_limiting_corrections:
  1709. chip->last_ocv_uv -= delta_ocv_uv;
  1710. if (chip->last_ocv_uv >= chip->max_voltage_uv)
  1711. chip->last_ocv_uv = chip->max_voltage_uv;
  1712. /* calculate the soc based on this new ocv */
  1713. pc_new = calculate_pc(chip, chip->last_ocv_uv,
  1714. chip->last_ocv_temp_decidegc, last_chargecycles);
  1715. rc_new_uah = (fcc_uah * pc_new) / 100;
  1716. soc_new = (rc_new_uah - cc_uah - uuc_uah)*100 / (fcc_uah - uuc_uah);
  1717. soc_new = bound_soc(soc_new);
  1718. /*
  1719. * if soc_new is ZERO force it higher so that phone doesnt report soc=0
  1720. * soc = 0 should happen only when soc_est == 0
  1721. */
  1722. if (soc_new == 0 && soc_est >= the_chip->hold_soc_est)
  1723. soc_new = 1;
  1724. soc = soc_new;
  1725. out:
  1726. pr_debug("ibat_ua = %d, vbat_uv = %d, ocv_est_uv = %d, pc_est = %d, "
  1727. "soc_est = %d, n = %d, delta_ocv_uv = %d, last_ocv_uv = %d, "
  1728. "pc_new = %d, soc_new = %d, rbatt = %d, m = %d\n",
  1729. ibat_ua, vbat_uv, ocv_est_uv, pc_est,
  1730. soc_est, n, delta_ocv_uv, chip->last_ocv_uv,
  1731. pc_new, soc_new, rbatt, m);
  1732. return soc;
  1733. }
  1734. #define IGNORE_SOC_TEMP_DECIDEG 50
  1735. #define IAVG_STEP_SIZE_MA 50
  1736. #define IAVG_START 600
  1737. #define SOC_ZERO 0xFF
  1738. static void backup_soc_and_iavg(struct pm8921_bms_chip *chip, int batt_temp,
  1739. int soc)
  1740. {
  1741. u8 temp;
  1742. int iavg_ma = chip->prev_uuc_iavg_ma;
  1743. if (iavg_ma > IAVG_START)
  1744. temp = (iavg_ma - IAVG_START) / IAVG_STEP_SIZE_MA;
  1745. else
  1746. temp = 0;
  1747. pm_bms_masked_write(chip, TEMP_IAVG_STORAGE,
  1748. TEMP_IAVG_STORAGE_USE_MASK, temp);
  1749. /* since only 6 bits are available for SOC, we store half the soc */
  1750. if (soc == 0)
  1751. temp = SOC_ZERO;
  1752. else
  1753. temp = soc;
  1754. /* don't store soc if temperature is below 5degC */
  1755. if (batt_temp > IGNORE_SOC_TEMP_DECIDEG)
  1756. pm8xxx_writeb(the_chip->dev->parent, TEMP_SOC_STORAGE, temp);
  1757. }
  1758. static void read_shutdown_soc_and_iavg(struct pm8921_bms_chip *chip)
  1759. {
  1760. int rc;
  1761. u8 temp;
  1762. rc = pm8xxx_readb(chip->dev->parent, TEMP_IAVG_STORAGE, &temp);
  1763. if (rc) {
  1764. pr_err("failed to read addr = %d %d assuming %d\n",
  1765. TEMP_IAVG_STORAGE, rc, IAVG_START);
  1766. chip->shutdown_iavg_ua = IAVG_START;
  1767. } else {
  1768. temp &= TEMP_IAVG_STORAGE_USE_MASK;
  1769. if (temp == 0) {
  1770. chip->shutdown_iavg_ua = IAVG_START;
  1771. } else {
  1772. chip->shutdown_iavg_ua = IAVG_START
  1773. + IAVG_STEP_SIZE_MA * (temp + 1);
  1774. }
  1775. }
  1776. rc = pm8xxx_readb(chip->dev->parent, TEMP_SOC_STORAGE, &temp);
  1777. if (rc) {
  1778. pr_err("failed to read addr = %d %d\n", TEMP_SOC_STORAGE, rc);
  1779. } else {
  1780. chip->shutdown_soc = temp;
  1781. if (chip->shutdown_soc == 0) {
  1782. pr_debug("No shutdown soc available\n");
  1783. shutdown_soc_invalid = 1;
  1784. chip->shutdown_iavg_ua = 0;
  1785. } else if (chip->shutdown_soc == SOC_ZERO) {
  1786. chip->shutdown_soc = 0;
  1787. }
  1788. }
  1789. if (chip->ignore_shutdown_soc) {
  1790. shutdown_soc_invalid = 1;
  1791. chip->shutdown_soc = 0;
  1792. chip->shutdown_iavg_ua = 0;
  1793. }
  1794. pr_debug("shutdown_soc = %d shutdown_iavg = %d shutdown_soc_invalid = %d\n",
  1795. chip->shutdown_soc,
  1796. chip->shutdown_iavg_ua,
  1797. shutdown_soc_invalid);
  1798. }
  1799. #define SOC_CATCHUP_SEC_MAX 600
  1800. #define SOC_CATCHUP_SEC_PER_PERCENT 60
  1801. #define MAX_CATCHUP_SOC (SOC_CATCHUP_SEC_MAX/SOC_CATCHUP_SEC_PER_PERCENT)
  1802. static int scale_soc_while_chg(struct pm8921_bms_chip *chip,
  1803. int delta_time_us, int new_soc, int prev_soc)
  1804. {
  1805. int chg_time_sec;
  1806. int catch_up_sec;
  1807. int scaled_soc;
  1808. int numerator;
  1809. /*
  1810. * The device must be charging for reporting a higher soc, if
  1811. * not ignore this soc and continue reporting the prev_soc.
  1812. * Also don't report a high value immediately slowly scale the
  1813. * value from prev_soc to the new soc based on a charge time
  1814. * weighted average
  1815. */
  1816. /* if we are not charging return last soc */
  1817. if (the_chip->start_percent == -EINVAL)
  1818. return prev_soc;
  1819. /* do not scale at 100 */
  1820. if (new_soc == 100)
  1821. return new_soc;
  1822. chg_time_sec = DIV_ROUND_UP(the_chip->charge_time_us, USEC_PER_SEC);
  1823. catch_up_sec = DIV_ROUND_UP(the_chip->catch_up_time_us, USEC_PER_SEC);
  1824. if (catch_up_sec == 0)
  1825. return new_soc;
  1826. pr_debug("cts= %d catch_up_sec = %d\n", chg_time_sec, catch_up_sec);
  1827. /*
  1828. * if we have been charging for more than catch_up time simply return
  1829. * new soc
  1830. */
  1831. if (chg_time_sec > catch_up_sec)
  1832. return new_soc;
  1833. numerator = (catch_up_sec - chg_time_sec) * prev_soc
  1834. + chg_time_sec * new_soc;
  1835. scaled_soc = numerator / catch_up_sec;
  1836. pr_debug("cts = %d new_soc = %d prev_soc = %d scaled_soc = %d\n",
  1837. chg_time_sec, new_soc, prev_soc, scaled_soc);
  1838. return scaled_soc;
  1839. }
  1840. static bool is_shutdown_soc_within_limits(struct pm8921_bms_chip *chip, int soc)
  1841. {
  1842. if (shutdown_soc_invalid) {
  1843. pr_debug("NOT forcing shutdown soc = %d\n", chip->shutdown_soc);
  1844. return 0;
  1845. }
  1846. if (abs(chip->shutdown_soc - soc) > chip->shutdown_soc_valid_limit) {
  1847. pr_debug("rejecting shutdown soc = %d, soc = %d limit = %d\n",
  1848. chip->shutdown_soc, soc,
  1849. chip->shutdown_soc_valid_limit);
  1850. shutdown_soc_invalid = 1;
  1851. return 0;
  1852. }
  1853. return 1;
  1854. }
  1855. static void update_power_supply(struct pm8921_bms_chip *chip)
  1856. {
  1857. if (chip->batt_psy == NULL || chip->batt_psy < 0)
  1858. chip->batt_psy = power_supply_get_by_name("battery");
  1859. if (chip->batt_psy > 0)
  1860. power_supply_changed(chip->batt_psy);
  1861. }
  1862. #define MIN_DELTA_625_UV 1000
  1863. static void calib_hkadc(struct pm8921_bms_chip *chip)
  1864. {
  1865. int voltage, rc;
  1866. struct pm8xxx_adc_chan_result result;
  1867. int usb_chg;
  1868. int this_delta;
  1869. mutex_lock(&chip->calib_mutex);
  1870. rc = pm8xxx_adc_read(the_chip->ref1p25v_channel, &result);
  1871. if (rc) {
  1872. pr_err("ADC failed for 1.25volts rc = %d\n", rc);
  1873. goto out;
  1874. }
  1875. voltage = xoadc_reading_to_microvolt(result.adc_code);
  1876. pr_debug("result 1.25v = 0x%x, voltage = %duV adc_meas = %lld\n",
  1877. result.adc_code, voltage, result.measurement);
  1878. chip->xoadc_v125 = voltage;
  1879. rc = pm8xxx_adc_read(the_chip->ref625mv_channel, &result);
  1880. if (rc) {
  1881. pr_err("ADC failed for 1.25volts rc = %d\n", rc);
  1882. goto out;
  1883. }
  1884. voltage = xoadc_reading_to_microvolt(result.adc_code);
  1885. usb_chg = usb_chg_plugged_in(chip);
  1886. pr_debug("result 0.625V = 0x%x, voltage = %duV adc_meas = %lld usb_chg = %d\n",
  1887. result.adc_code, voltage, result.measurement,
  1888. usb_chg);
  1889. if (usb_chg)
  1890. chip->xoadc_v0625_usb_present = voltage;
  1891. else
  1892. chip->xoadc_v0625_usb_absent = voltage;
  1893. chip->xoadc_v0625 = voltage;
  1894. if (chip->xoadc_v0625_usb_present && chip->xoadc_v0625_usb_absent) {
  1895. this_delta = chip->xoadc_v0625_usb_present
  1896. - chip->xoadc_v0625_usb_absent;
  1897. pr_debug("this_delta= %duV\n", this_delta);
  1898. if (this_delta > MIN_DELTA_625_UV)
  1899. last_usb_cal_delta_uv = this_delta;
  1900. pr_debug("625V_present= %d, 625V_absent= %d, delta = %duV\n",
  1901. chip->xoadc_v0625_usb_present,
  1902. chip->xoadc_v0625_usb_absent,
  1903. last_usb_cal_delta_uv);
  1904. }
  1905. pr_debug("calibration batt_temp = %d\n", chip->last_calib_temp);
  1906. out:
  1907. mutex_unlock(&chip->calib_mutex);
  1908. }
  1909. #define HKADC_CALIB_DELAY_S 600
  1910. #define HKADC_CALIB_DELTA_TEMP 20
  1911. static void calib_hkadc_check(struct pm8921_bms_chip *chip, int batt_temp)
  1912. {
  1913. unsigned long time_since_last_calib;
  1914. unsigned long tm_now_sec;
  1915. int delta_temp;
  1916. int rc;
  1917. rc = get_current_time(&tm_now_sec);
  1918. if (rc) {
  1919. pr_err("Could not read current time: %d\n", rc);
  1920. return;
  1921. }
  1922. if (tm_now_sec > chip->last_calib_time) {
  1923. time_since_last_calib = tm_now_sec - chip->last_calib_time;
  1924. delta_temp = abs(chip->last_calib_temp - batt_temp);
  1925. pr_debug("time since last calib: %lu, temp diff = %d\n",
  1926. time_since_last_calib, delta_temp);
  1927. if (time_since_last_calib >= HKADC_CALIB_DELAY_S
  1928. || delta_temp > HKADC_CALIB_DELTA_TEMP) {
  1929. chip->last_calib_temp = batt_temp;
  1930. chip->last_calib_time = tm_now_sec;
  1931. calib_hkadc(chip);
  1932. }
  1933. }
  1934. }
  1935. /*
  1936. * Remaining Usable Charge = remaining_charge (charge at ocv instance)
  1937. * - coloumb counter charge
  1938. * - unusable charge (due to battery resistance)
  1939. * SOC% = (remaining usable charge/ fcc - usable_charge);
  1940. */
  1941. static int calculate_state_of_charge(struct pm8921_bms_chip *chip,
  1942. struct pm8921_soc_params *raw,
  1943. int batt_temp, int chargecycles)
  1944. {
  1945. int remaining_usable_charge_uah, fcc_uah, unusable_charge_uah;
  1946. int remaining_charge_uah, soc;
  1947. int cc_uah;
  1948. int rbatt;
  1949. int iavg_ua;
  1950. int new_ocv;
  1951. int new_rc_uah;
  1952. int new_ucc_uah;
  1953. int new_rbatt;
  1954. int shutdown_soc;
  1955. int new_calculated_soc;
  1956. static int firsttime = 1;
  1957. calculate_soc_params(chip, raw, batt_temp, chargecycles,
  1958. &fcc_uah,
  1959. &unusable_charge_uah,
  1960. &remaining_charge_uah,
  1961. &cc_uah,
  1962. &rbatt,
  1963. &iavg_ua);
  1964. /* calculate remaining usable charge */
  1965. remaining_usable_charge_uah = remaining_charge_uah
  1966. - cc_uah
  1967. - unusable_charge_uah;
  1968. pr_debug("RUC = %duAh\n", remaining_usable_charge_uah);
  1969. if (fcc_uah - unusable_charge_uah <= 0) {
  1970. pr_debug("FCC = %duAh, UUC = %duAh forcing soc = 0\n",
  1971. fcc_uah, unusable_charge_uah);
  1972. soc = 0;
  1973. } else {
  1974. soc = DIV_ROUND_CLOSEST((remaining_usable_charge_uah * 100),
  1975. (fcc_uah - unusable_charge_uah));
  1976. }
  1977. if (firsttime && soc < 0) {
  1978. /*
  1979. * first time calcualtion and the pon ocv is too low resulting
  1980. * in a bad soc. Adjust ocv such that we get 0 soc
  1981. */
  1982. pr_debug("soc is %d, adjusting pon ocv to make it 0\n", soc);
  1983. adjust_rc_and_uuc_for_specific_soc(
  1984. chip,
  1985. batt_temp, chargecycles,
  1986. 0,
  1987. fcc_uah, unusable_charge_uah,
  1988. cc_uah, remaining_charge_uah,
  1989. rbatt,
  1990. &new_ocv,
  1991. &new_rc_uah, &new_ucc_uah,
  1992. &new_rbatt);
  1993. chip->last_ocv_uv = new_ocv;
  1994. remaining_charge_uah = new_rc_uah;
  1995. unusable_charge_uah = new_ucc_uah;
  1996. rbatt = new_rbatt;
  1997. remaining_usable_charge_uah = remaining_charge_uah
  1998. - cc_uah
  1999. - unusable_charge_uah;
  2000. soc = DIV_ROUND_CLOSEST((remaining_usable_charge_uah * 100),
  2001. (fcc_uah - unusable_charge_uah));
  2002. pr_debug("DONE for O soc is %d, pon ocv adjusted to %duV\n",
  2003. soc, chip->last_ocv_uv);
  2004. }
  2005. if (soc > 100)
  2006. soc = 100;
  2007. if (soc < 0) {
  2008. pr_debug("bad rem_usb_chg = %d rem_chg %d,"
  2009. "cc_uah %d, unusb_chg %d\n",
  2010. remaining_usable_charge_uah,
  2011. remaining_charge_uah,
  2012. cc_uah, unusable_charge_uah);
  2013. pr_debug("for bad rem_usb_chg last_ocv_uv = %d"
  2014. "chargecycles = %d, batt_temp = %d"
  2015. "fcc = %d soc =%d\n",
  2016. chip->last_ocv_uv, chargecycles, batt_temp,
  2017. fcc_uah, soc);
  2018. soc = 0;
  2019. }
  2020. mutex_lock(&soc_invalidation_mutex);
  2021. shutdown_soc = chip->shutdown_soc;
  2022. if (firsttime && soc != shutdown_soc
  2023. && is_shutdown_soc_within_limits(chip, soc)) {
  2024. /*
  2025. * soc for the first time - use shutdown soc
  2026. * to adjust pon ocv since it is a small percent away from
  2027. * the real soc
  2028. */
  2029. pr_debug("soc = %d before forcing shutdown_soc = %d\n",
  2030. soc, shutdown_soc);
  2031. adjust_rc_and_uuc_for_specific_soc(
  2032. chip,
  2033. batt_temp, chargecycles,
  2034. shutdown_soc,
  2035. fcc_uah, unusable_charge_uah,
  2036. cc_uah, remaining_charge_uah,
  2037. rbatt,
  2038. &new_ocv,
  2039. &new_rc_uah, &new_ucc_uah,
  2040. &new_rbatt);
  2041. chip->pon_ocv_uv = chip->last_ocv_uv;
  2042. chip->last_ocv_uv = new_ocv;
  2043. remaining_charge_uah = new_rc_uah;
  2044. unusable_charge_uah = new_ucc_uah;
  2045. rbatt = new_rbatt;
  2046. remaining_usable_charge_uah = remaining_charge_uah
  2047. - cc_uah
  2048. - unusable_charge_uah;
  2049. soc = DIV_ROUND_CLOSEST((remaining_usable_charge_uah * 100),
  2050. (fcc_uah - unusable_charge_uah));
  2051. pr_debug("DONE for shutdown_soc = %d soc is %d, adjusted ocv to %duV\n",
  2052. shutdown_soc, soc, chip->last_ocv_uv);
  2053. }
  2054. mutex_unlock(&soc_invalidation_mutex);
  2055. pr_debug("SOC before adjustment = %d\n", soc);
  2056. new_calculated_soc = adjust_soc(chip, soc, batt_temp, chargecycles,
  2057. rbatt, fcc_uah, unusable_charge_uah, cc_uah);
  2058. pr_debug("calculated SOC = %d\n", new_calculated_soc);
  2059. if (new_calculated_soc != calculated_soc) {
  2060. calculated_soc = new_calculated_soc;
  2061. update_power_supply(chip);
  2062. }
  2063. firsttime = 0;
  2064. get_current_time(&chip->last_recalc_time);
  2065. if (chip->disable_flat_portion_ocv) {
  2066. if (is_between(chip->ocv_dis_high_soc, chip->ocv_dis_low_soc,
  2067. calculated_soc)) {
  2068. pm8921_bms_stop_ocv_updates();
  2069. } else {
  2070. pm8921_bms_start_ocv_updates();
  2071. }
  2072. }
  2073. return calculated_soc;
  2074. }
  2075. static int recalculate_soc(struct pm8921_bms_chip *chip)
  2076. {
  2077. int batt_temp;
  2078. struct pm8921_soc_params raw;
  2079. int soc;
  2080. wake_lock(&the_chip->soc_wake_lock);
  2081. get_batt_temp(chip, &batt_temp);
  2082. mutex_lock(&chip->last_ocv_uv_mutex);
  2083. calib_hkadc_check(chip, batt_temp);
  2084. read_soc_params_raw(chip, &raw, batt_temp);
  2085. soc = calculate_state_of_charge(chip, &raw,
  2086. batt_temp, last_chargecycles);
  2087. mutex_unlock(&chip->last_ocv_uv_mutex);
  2088. wake_unlock(&the_chip->soc_wake_lock);
  2089. return soc;
  2090. }
  2091. static void calculate_soc_work(struct work_struct *work)
  2092. {
  2093. struct delayed_work *dwork = to_delayed_work(work);
  2094. struct pm8921_bms_chip *chip = container_of(dwork,
  2095. struct pm8921_bms_chip,
  2096. calculate_soc_delayed_work);
  2097. recalculate_soc(chip);
  2098. schedule_delayed_work(&chip->calculate_soc_delayed_work,
  2099. round_jiffies_relative(msecs_to_jiffies
  2100. (chip->soc_calc_period)));
  2101. }
  2102. static int report_state_of_charge(struct pm8921_bms_chip *chip)
  2103. {
  2104. int soc = calculated_soc;
  2105. int delta_time_us;
  2106. struct timespec now;
  2107. int batt_temp;
  2108. if (bms_fake_battery != -EINVAL) {
  2109. pr_debug("Returning Fake SOC = %d%%\n", bms_fake_battery);
  2110. return bms_fake_battery;
  2111. }
  2112. get_batt_temp(chip, &batt_temp);
  2113. do_posix_clock_monotonic_gettime(&now);
  2114. if (chip->t_soc_queried.tv_sec != 0) {
  2115. delta_time_us
  2116. = (now.tv_sec - chip->t_soc_queried.tv_sec) * USEC_PER_SEC
  2117. + (now.tv_nsec - chip->t_soc_queried.tv_nsec) / 1000;
  2118. } else {
  2119. /* calculation for the first time */
  2120. delta_time_us = 0;
  2121. }
  2122. /*
  2123. * account for charge time - limit it to SOC_CATCHUP_SEC to
  2124. * avoid overflows when charging continues for extended periods
  2125. */
  2126. if (the_chip->start_percent != -EINVAL) {
  2127. if (the_chip->charge_time_us == 0) {
  2128. /*
  2129. * calculating soc for the first time
  2130. * after start of chg. Initialize catchup time
  2131. */
  2132. if (abs(soc - last_soc) < MAX_CATCHUP_SOC)
  2133. the_chip->catch_up_time_us =
  2134. (soc - last_soc) * SOC_CATCHUP_SEC_PER_PERCENT
  2135. * USEC_PER_SEC;
  2136. else
  2137. the_chip->catch_up_time_us =
  2138. SOC_CATCHUP_SEC_MAX * USEC_PER_SEC;
  2139. if (the_chip->catch_up_time_us < 0)
  2140. the_chip->catch_up_time_us = 0;
  2141. }
  2142. /* add charge time */
  2143. if (the_chip->charge_time_us
  2144. < SOC_CATCHUP_SEC_MAX * USEC_PER_SEC)
  2145. chip->charge_time_us += delta_time_us;
  2146. /* end catchup if calculated soc and last soc are same */
  2147. if (last_soc == soc)
  2148. the_chip->catch_up_time_us = 0;
  2149. }
  2150. /* last_soc < soc ... scale and catch up */
  2151. if (last_soc != -EINVAL && last_soc < soc)
  2152. soc = scale_soc_while_chg(chip, delta_time_us, soc, last_soc);
  2153. if (last_soc != -EINVAL) {
  2154. if (chip->first_report_after_suspend) {
  2155. chip->first_report_after_suspend = false;
  2156. if (chip->soc_updated_on_resume) {
  2157. /* coming here after a long suspend */
  2158. chip->soc_updated_on_resume = false;
  2159. if (last_soc < soc)
  2160. /* if soc has falsely increased during
  2161. * suspend, set the soc_at_suspend
  2162. */
  2163. soc = chip->last_soc_at_suspend;
  2164. } else {
  2165. /*
  2166. * suspended for a short time
  2167. * report the last_soc before suspend
  2168. */
  2169. soc = chip->last_soc_at_suspend;
  2170. }
  2171. } else if (soc < last_soc && soc != 0) {
  2172. soc = last_soc - 1;
  2173. } else if (soc > last_soc && soc != 100) {
  2174. soc = last_soc + 1;
  2175. }
  2176. }
  2177. last_soc = bound_soc(soc);
  2178. backup_soc_and_iavg(chip, batt_temp, last_soc);
  2179. pr_debug("Reported SOC = %d\n", last_soc);
  2180. chip->t_soc_queried = now;
  2181. return last_soc;
  2182. }
  2183. void pm8921_bms_battery_removed(void)
  2184. {
  2185. if (!the_chip) {
  2186. pr_err("called before initialization\n");
  2187. return;
  2188. }
  2189. pr_info("Battery Removed Cleaning up\n");
  2190. cancel_delayed_work_sync(&the_chip->calculate_soc_delayed_work);
  2191. calculated_soc = 0;
  2192. the_chip->start_percent = -EINVAL;
  2193. the_chip->end_percent = -EINVAL;
  2194. /* cleanup for charge time catchup */
  2195. the_chip->charge_time_us = 0;
  2196. the_chip->catch_up_time_us = 0;
  2197. /* cleanup for charge time adjusting */
  2198. the_chip->soc_at_cv = -EINVAL;
  2199. the_chip->soc_at_cv = -EINVAL;
  2200. the_chip->prev_chg_soc = -EINVAL;
  2201. the_chip->ibat_at_cv_ua = 0;
  2202. the_chip->prev_vbat_batt_terminal_uv = 0;
  2203. /* ocv cleanups */
  2204. the_chip->ocv_reading_at_100 = OCV_RAW_UNINITIALIZED;
  2205. the_chip->prev_last_good_ocv_raw = OCV_RAW_UNINITIALIZED;
  2206. the_chip->last_ocv_temp_decidegc = -EINVAL;
  2207. /* cleanup delta time */
  2208. the_chip->tm_sec = 0;
  2209. /* cc and avg current cleanups */
  2210. the_chip->prev_iavg_ua = 0;
  2211. the_chip->last_cc_uah = INT_MIN;
  2212. /* report SOC cleanups */
  2213. the_chip->t_soc_queried.tv_sec = 0;
  2214. the_chip->t_soc_queried.tv_nsec = 0;
  2215. last_soc = -EINVAL;
  2216. /* store invalid soc */
  2217. pm8xxx_writeb(the_chip->dev->parent, TEMP_SOC_STORAGE, 0);
  2218. /* fcc learning cleanup */
  2219. if (the_chip->enable_fcc_learning) {
  2220. battery_removed = 1;
  2221. sysfs_notify(&the_chip->dev->kobj, NULL, "fcc_data");
  2222. }
  2223. /* UUC related data is left as is - use the same historical load avg */
  2224. update_power_supply(the_chip);
  2225. }
  2226. EXPORT_SYMBOL(pm8921_bms_battery_removed);
  2227. void pm8921_bms_battery_inserted(void)
  2228. {
  2229. if (!the_chip) {
  2230. pr_err("called before initialization\n");
  2231. return;
  2232. }
  2233. pr_info("Battery Inserted\n");
  2234. the_chip->last_ocv_uv = estimate_ocv(the_chip);
  2235. schedule_delayed_work(&the_chip->calculate_soc_delayed_work, 0);
  2236. }
  2237. EXPORT_SYMBOL(pm8921_bms_battery_inserted);
  2238. void pm8921_bms_invalidate_shutdown_soc(void)
  2239. {
  2240. int calculate_soc = 0;
  2241. struct pm8921_bms_chip *chip = the_chip;
  2242. /* clean up the fcc learning table */
  2243. if (!the_chip)
  2244. the_chip->adjusted_fcc_temp_lut = NULL;
  2245. last_fcc_update_count = 0;
  2246. last_real_fcc_mah = -EINVAL;
  2247. last_real_fcc_batt_temp = -EINVAL;
  2248. battery_removed = 1;
  2249. pr_debug("Invalidating shutdown soc - the battery was removed\n");
  2250. if (shutdown_soc_invalid)
  2251. return;
  2252. mutex_lock(&soc_invalidation_mutex);
  2253. shutdown_soc_invalid = 1;
  2254. last_soc = -EINVAL;
  2255. if (the_chip) {
  2256. /* reset to pon ocv undoing what the adjusting did */
  2257. if (the_chip->pon_ocv_uv) {
  2258. the_chip->last_ocv_uv = the_chip->pon_ocv_uv;
  2259. calculate_soc = 1;
  2260. pr_debug("resetting ocv to pon_ocv = %d\n",
  2261. the_chip->pon_ocv_uv);
  2262. }
  2263. }
  2264. mutex_unlock(&soc_invalidation_mutex);
  2265. if (!calculate_soc)
  2266. return;
  2267. recalculate_soc(chip);
  2268. }
  2269. EXPORT_SYMBOL(pm8921_bms_invalidate_shutdown_soc);
  2270. static void calibrate_hkadc_work(struct work_struct *work)
  2271. {
  2272. struct pm8921_bms_chip *chip = container_of(work,
  2273. struct pm8921_bms_chip, calib_hkadc_work);
  2274. calib_hkadc(chip);
  2275. }
  2276. void pm8921_bms_calibrate_hkadc(void)
  2277. {
  2278. schedule_work(&the_chip->calib_hkadc_work);
  2279. }
  2280. int pm8921_bms_get_vsense_avg(int *result)
  2281. {
  2282. int rc = -EINVAL;
  2283. if (the_chip) {
  2284. mutex_lock(&the_chip->bms_output_lock);
  2285. pm_bms_lock_output_data(the_chip);
  2286. rc = read_vsense_avg(the_chip, result);
  2287. pm_bms_unlock_output_data(the_chip);
  2288. mutex_unlock(&the_chip->bms_output_lock);
  2289. }
  2290. pr_err("called before initialization\n");
  2291. return rc;
  2292. }
  2293. EXPORT_SYMBOL(pm8921_bms_get_vsense_avg);
  2294. int pm8921_bms_get_battery_current(int *result_ua)
  2295. {
  2296. int vsense_uv;
  2297. int rc = 0;
  2298. *result_ua = 0;
  2299. if (!the_chip) {
  2300. pr_err("called before initialization\n");
  2301. return -EINVAL;
  2302. }
  2303. if (the_chip->r_sense_uohm == 0) {
  2304. pr_err("r_sense is zero\n");
  2305. return -EINVAL;
  2306. }
  2307. mutex_lock(&the_chip->bms_output_lock);
  2308. pm_bms_lock_output_data(the_chip);
  2309. rc = read_vsense_avg(the_chip, &vsense_uv);
  2310. pm_bms_unlock_output_data(the_chip);
  2311. mutex_unlock(&the_chip->bms_output_lock);
  2312. if (rc) {
  2313. pr_err("Unable to read vsense average\n");
  2314. goto error_vsense;
  2315. }
  2316. pr_debug("vsense=%duV\n", vsense_uv);
  2317. /* cast for signed division */
  2318. *result_ua = div_s64(vsense_uv * 1000000LL, the_chip->r_sense_uohm);
  2319. pr_debug("ibat=%duA\n", *result_ua);
  2320. error_vsense:
  2321. return rc;
  2322. }
  2323. EXPORT_SYMBOL(pm8921_bms_get_battery_current);
  2324. int pm8921_bms_get_percent_charge(void)
  2325. {
  2326. if (!the_chip) {
  2327. pr_err("called before initialization\n");
  2328. return -EINVAL;
  2329. }
  2330. return report_state_of_charge(the_chip);
  2331. }
  2332. EXPORT_SYMBOL_GPL(pm8921_bms_get_percent_charge);
  2333. int pm8921_bms_get_current_max(void)
  2334. {
  2335. if (!the_chip) {
  2336. pr_err("called before initialization\n");
  2337. return -EINVAL;
  2338. }
  2339. return the_chip->imax_ua;
  2340. }
  2341. EXPORT_SYMBOL_GPL(pm8921_bms_get_current_max);
  2342. int pm8921_bms_get_fcc(void)
  2343. {
  2344. int batt_temp;
  2345. if (!the_chip) {
  2346. pr_err("called before initialization\n");
  2347. return -EINVAL;
  2348. }
  2349. get_batt_temp(the_chip, &batt_temp);
  2350. return calculate_fcc_uah(the_chip, batt_temp, last_chargecycles);
  2351. }
  2352. EXPORT_SYMBOL_GPL(pm8921_bms_get_fcc);
  2353. static void calculate_real_soc(struct pm8921_bms_chip *chip, int *soc,
  2354. int batt_temp, struct pm8921_soc_params *raw, int cc_uah)
  2355. {
  2356. int fcc_uah = 0, rc_uah = 0;
  2357. fcc_uah = calculate_fcc_uah(chip, batt_temp, last_chargecycles);
  2358. rc_uah = calculate_remaining_charge_uah(chip, raw,
  2359. fcc_uah, batt_temp, last_chargecycles);
  2360. *soc = ((rc_uah - cc_uah) * 100) / fcc_uah;
  2361. pr_debug("fcc = %d, rc = %d, cc = %d Real SOC = %d\n",
  2362. fcc_uah, rc_uah, cc_uah, *soc);
  2363. }
  2364. void pm8921_bms_charging_began(void)
  2365. {
  2366. struct pm8921_soc_params raw;
  2367. int batt_temp;
  2368. get_batt_temp(the_chip, &batt_temp);
  2369. mutex_lock(&the_chip->last_ocv_uv_mutex);
  2370. calib_hkadc_check(the_chip, batt_temp);
  2371. read_soc_params_raw(the_chip, &raw, batt_temp);
  2372. mutex_unlock(&the_chip->last_ocv_uv_mutex);
  2373. the_chip->start_percent = report_state_of_charge(the_chip);
  2374. bms_start_percent = the_chip->start_percent;
  2375. bms_start_ocv_uv = raw.last_good_ocv_uv;
  2376. calculate_cc_uah(the_chip, raw.cc, &bms_start_cc_uah);
  2377. pm_bms_masked_write(the_chip, BMS_TOLERANCES,
  2378. IBAT_TOL_MASK, IBAT_TOL_DEFAULT);
  2379. the_chip->charge_time_us = 0;
  2380. the_chip->catch_up_time_us = 0;
  2381. the_chip->soc_at_cv = -EINVAL;
  2382. the_chip->prev_chg_soc = -EINVAL;
  2383. if (the_chip->enable_fcc_learning) {
  2384. calculate_real_soc(the_chip, &the_chip->start_real_soc,
  2385. batt_temp, &raw, bms_start_cc_uah);
  2386. the_chip->pc_at_start_charge =
  2387. interpolate_pc(the_chip->pc_temp_ocv_lut, batt_temp,
  2388. bms_start_ocv_uv / 1000);
  2389. pr_debug("Start real soc = %d, start pc = %d\n",
  2390. the_chip->start_real_soc, the_chip->pc_at_start_charge);
  2391. }
  2392. pr_debug("start_percent = %u%%\n", the_chip->start_percent);
  2393. }
  2394. EXPORT_SYMBOL_GPL(pm8921_bms_charging_began);
  2395. static void invalidate_fcc(struct pm8921_bms_chip *chip)
  2396. {
  2397. memset(chip->fcc_table, 0, chip->min_fcc_learning_samples *
  2398. sizeof(*(chip->fcc_table)));
  2399. last_fcc_update_count = 0;
  2400. chip->adjusted_fcc_temp_lut = NULL;
  2401. last_real_fcc_mah = -EINVAL;
  2402. last_real_fcc_batt_temp = -EINVAL;
  2403. last_chargecycles = 0;
  2404. last_charge_increase = 0;
  2405. }
  2406. static void update_fcc_table_for_temp(struct pm8921_bms_chip *chip,
  2407. int batt_temp_final)
  2408. {
  2409. int i, fcc_t1, fcc_t2, fcc_final;
  2410. struct fcc_data *ft;
  2411. /* Interpolate all the FCC entries to the same temperature */
  2412. for (i = 0; i < chip->min_fcc_learning_samples; i++) {
  2413. ft = &chip->fcc_table[i];
  2414. if (ft->batt_temp == batt_temp_final)
  2415. continue;
  2416. fcc_t1 = interpolate_fcc(chip->fcc_temp_lut, ft->batt_temp);
  2417. fcc_t2 = interpolate_fcc(chip->fcc_temp_lut, batt_temp_final);
  2418. fcc_final = (ft->fcc_new / fcc_t1) * fcc_t2;
  2419. ft->fcc_new = fcc_final;
  2420. ft->batt_temp = batt_temp_final;
  2421. }
  2422. }
  2423. static void update_fcc_learning_table(struct pm8921_bms_chip *chip,
  2424. int fcc_uah, int new_fcc_uah, int chargecycles, int batt_temp)
  2425. {
  2426. int i, temp_fcc_avg = 0, new_fcc_avg = 0, temp_fcc_delta = 0, count;
  2427. struct fcc_data *ft;
  2428. count = last_fcc_update_count % chip->min_fcc_learning_samples;
  2429. ft = &chip->fcc_table[count];
  2430. ft->fcc_new = ft->fcc_real = new_fcc_uah;
  2431. ft->batt_temp = ft->temp_real = batt_temp;
  2432. ft->chargecycles = chargecycles;
  2433. chip->fcc_new = new_fcc_uah;
  2434. last_fcc_update_count++;
  2435. /* update userspace with the new data */
  2436. sysfs_notify(&chip->dev->kobj, NULL, "fcc_data");
  2437. pr_debug("Updated fcc table. new_fcc=%d, chargecycle=%d, temp=%d fcc_update_count=%d\n",
  2438. new_fcc_uah, chargecycles, batt_temp, last_fcc_update_count);
  2439. if (last_fcc_update_count < chip->min_fcc_learning_samples) {
  2440. pr_debug("Not enough FCC samples. Current count = %d\n",
  2441. last_fcc_update_count);
  2442. return; /* Not enough samples to update fcc */
  2443. }
  2444. /* reject entries if they are > 50 chargecycles apart */
  2445. for (i = 0; i < chip->min_fcc_learning_samples; i++) {
  2446. if ((chip->fcc_table[i].chargecycles + VALID_FCC_CHGCYL_RANGE)
  2447. < chargecycles) {
  2448. pr_debug("Charge cycle too old (> %d cycles apart)\n",
  2449. VALID_FCC_CHGCYL_RANGE);
  2450. return; /* Samples old, > 50 cycles apart*/
  2451. }
  2452. }
  2453. /* update the fcc table for temperature difference*/
  2454. update_fcc_table_for_temp(chip, batt_temp);
  2455. /* Calculate the avg. and SD for all the fcc entries */
  2456. for (i = 0; i < chip->min_fcc_learning_samples; i++)
  2457. temp_fcc_avg += chip->fcc_table[i].fcc_new;
  2458. temp_fcc_avg /= chip->min_fcc_learning_samples;
  2459. temp_fcc_delta = div_u64(temp_fcc_avg * DELTA_FCC_PERCENT, 100);
  2460. /* fix the fcc if its an outlier i.e. > 5% of the average */
  2461. for (i = 0; i < chip->min_fcc_learning_samples; i++) {
  2462. ft = &chip->fcc_table[i];
  2463. if (abs(ft->fcc_new - temp_fcc_avg) > temp_fcc_delta)
  2464. ft->fcc_new = temp_fcc_avg;
  2465. new_fcc_avg += ft->fcc_new;
  2466. }
  2467. new_fcc_avg /= chip->min_fcc_learning_samples;
  2468. last_real_fcc_mah = new_fcc_avg/1000;
  2469. last_real_fcc_batt_temp = batt_temp;
  2470. pr_debug("FCC update: last_real_fcc_mah=%d, last_real_fcc_batt_temp=%d\n",
  2471. new_fcc_avg, batt_temp);
  2472. readjust_fcc_table();
  2473. sysfs_notify(&chip->dev->kobj, NULL, "fcc_data");
  2474. }
  2475. static bool is_new_fcc_valid(int new_fcc_uah, int fcc_uah)
  2476. {
  2477. /* reject the new fcc if < 50% and > 105% of nominal fcc */
  2478. if ((new_fcc_uah >= (fcc_uah / 2)) &&
  2479. ((new_fcc_uah * 100) <= (fcc_uah * 105)))
  2480. return true;
  2481. pr_debug("FCC rejected - not within valid limit\n");
  2482. return false;
  2483. }
  2484. void pm8921_bms_charging_end(int is_battery_full)
  2485. {
  2486. int batt_temp;
  2487. struct pm8921_soc_params raw;
  2488. if (the_chip == NULL)
  2489. return;
  2490. get_batt_temp(the_chip, &batt_temp);
  2491. mutex_lock(&the_chip->last_ocv_uv_mutex);
  2492. calib_hkadc_check(the_chip, batt_temp);
  2493. read_soc_params_raw(the_chip, &raw, batt_temp);
  2494. calculate_cc_uah(the_chip, raw.cc, &bms_end_cc_uah);
  2495. bms_end_ocv_uv = raw.last_good_ocv_uv;
  2496. pr_debug("battery_full = %d, fcc_learning = %d, pc_start_chg = %d\n",
  2497. is_battery_full, the_chip->enable_fcc_learning,
  2498. the_chip->pc_at_start_charge);
  2499. if (is_battery_full && the_chip->enable_fcc_learning &&
  2500. (the_chip->start_percent <= the_chip->min_fcc_learning_soc) &&
  2501. (the_chip->pc_at_start_charge <= the_chip->min_fcc_ocv_pc)) {
  2502. int fcc_uah, new_fcc_uah, delta_cc_uah, delta_soc;
  2503. /* new_fcc = (cc_end - cc_start) / (end_soc - start_soc) */
  2504. delta_soc = 100 - the_chip->start_real_soc;
  2505. delta_cc_uah = abs(bms_end_cc_uah - bms_start_cc_uah);
  2506. new_fcc_uah = div_u64(delta_cc_uah * 100, delta_soc);
  2507. fcc_uah = calculate_fcc_uah(the_chip, batt_temp,
  2508. last_chargecycles);
  2509. pr_info("start_real_soc = %d, end_real_soc = 100, start_cc = %d, end_cc = %d, nominal_fcc = %d, new_fcc = %d\n",
  2510. the_chip->start_real_soc, bms_start_cc_uah,
  2511. bms_end_cc_uah, fcc_uah, new_fcc_uah);
  2512. if (is_new_fcc_valid(new_fcc_uah, fcc_uah))
  2513. update_fcc_learning_table(the_chip, fcc_uah,
  2514. new_fcc_uah, last_chargecycles, batt_temp);
  2515. }
  2516. if (is_battery_full) {
  2517. the_chip->ocv_reading_at_100 = raw.last_good_ocv_raw;
  2518. the_chip->last_ocv_uv = the_chip->max_voltage_uv;
  2519. raw.last_good_ocv_uv = the_chip->max_voltage_uv;
  2520. raw.cc = 0;
  2521. /* reset the cc in h/w */
  2522. reset_cc(the_chip);
  2523. the_chip->last_ocv_temp_decidegc = batt_temp;
  2524. /*
  2525. * since we are treating this as an ocv event
  2526. * forget the old cc value
  2527. */
  2528. the_chip->last_cc_uah = 0;
  2529. pr_debug("EOC BATT_FULL ocv_reading = 0x%x\n",
  2530. the_chip->ocv_reading_at_100);
  2531. }
  2532. the_chip->end_percent = calculate_state_of_charge(the_chip, &raw,
  2533. batt_temp, last_chargecycles);
  2534. mutex_unlock(&the_chip->last_ocv_uv_mutex);
  2535. bms_end_percent = the_chip->end_percent;
  2536. if (the_chip->end_percent > the_chip->start_percent) {
  2537. last_charge_increase +=
  2538. the_chip->end_percent - the_chip->start_percent;
  2539. if (last_charge_increase > 100) {
  2540. last_chargecycles++;
  2541. last_charge_increase = last_charge_increase % 100;
  2542. }
  2543. }
  2544. pr_debug("end_percent = %u%% last_charge_increase = %d"
  2545. "last_chargecycles = %d\n",
  2546. the_chip->end_percent,
  2547. last_charge_increase,
  2548. last_chargecycles);
  2549. the_chip->start_percent = -EINVAL;
  2550. the_chip->end_percent = -EINVAL;
  2551. the_chip->charge_time_us = 0;
  2552. the_chip->catch_up_time_us = 0;
  2553. the_chip->soc_at_cv = -EINVAL;
  2554. the_chip->prev_chg_soc = -EINVAL;
  2555. pm_bms_masked_write(the_chip, BMS_TOLERANCES,
  2556. IBAT_TOL_MASK, IBAT_TOL_NOCHG);
  2557. }
  2558. EXPORT_SYMBOL_GPL(pm8921_bms_charging_end);
  2559. static irqreturn_t pm8921_bms_sbi_write_ok_handler(int irq, void *data)
  2560. {
  2561. pr_debug("irq = %d triggered", irq);
  2562. return IRQ_HANDLED;
  2563. }
  2564. static irqreturn_t pm8921_bms_cc_thr_handler(int irq, void *data)
  2565. {
  2566. pr_debug("irq = %d triggered", irq);
  2567. return IRQ_HANDLED;
  2568. }
  2569. static irqreturn_t pm8921_bms_vsense_thr_handler(int irq, void *data)
  2570. {
  2571. pr_debug("irq = %d triggered", irq);
  2572. return IRQ_HANDLED;
  2573. }
  2574. static irqreturn_t pm8921_bms_vsense_for_r_handler(int irq, void *data)
  2575. {
  2576. pr_debug("irq = %d triggered", irq);
  2577. return IRQ_HANDLED;
  2578. }
  2579. static irqreturn_t pm8921_bms_ocv_for_r_handler(int irq, void *data)
  2580. {
  2581. struct pm8921_bms_chip *chip = data;
  2582. pr_debug("irq = %d triggered", irq);
  2583. schedule_work(&chip->calib_hkadc_work);
  2584. return IRQ_HANDLED;
  2585. }
  2586. static irqreturn_t pm8921_bms_good_ocv_handler(int irq, void *data)
  2587. {
  2588. struct pm8921_bms_chip *chip = data;
  2589. pr_debug("irq = %d triggered", irq);
  2590. schedule_work(&chip->calib_hkadc_work);
  2591. return IRQ_HANDLED;
  2592. }
  2593. struct pm_bms_irq_init_data {
  2594. unsigned int irq_id;
  2595. char *name;
  2596. unsigned long flags;
  2597. irqreturn_t (*handler)(int, void *);
  2598. };
  2599. #define BMS_IRQ(_id, _flags, _handler) \
  2600. { \
  2601. .irq_id = _id, \
  2602. .name = #_id, \
  2603. .flags = _flags, \
  2604. .handler = _handler, \
  2605. }
  2606. struct pm_bms_irq_init_data bms_irq_data[] = {
  2607. BMS_IRQ(PM8921_BMS_SBI_WRITE_OK, IRQF_TRIGGER_RISING,
  2608. pm8921_bms_sbi_write_ok_handler),
  2609. BMS_IRQ(PM8921_BMS_CC_THR, IRQF_TRIGGER_RISING,
  2610. pm8921_bms_cc_thr_handler),
  2611. BMS_IRQ(PM8921_BMS_VSENSE_THR, IRQF_TRIGGER_RISING,
  2612. pm8921_bms_vsense_thr_handler),
  2613. BMS_IRQ(PM8921_BMS_VSENSE_FOR_R, IRQF_TRIGGER_RISING,
  2614. pm8921_bms_vsense_for_r_handler),
  2615. BMS_IRQ(PM8921_BMS_OCV_FOR_R, IRQF_TRIGGER_RISING,
  2616. pm8921_bms_ocv_for_r_handler),
  2617. BMS_IRQ(PM8921_BMS_GOOD_OCV, IRQF_TRIGGER_RISING,
  2618. pm8921_bms_good_ocv_handler),
  2619. };
  2620. static void free_irqs(struct pm8921_bms_chip *chip)
  2621. {
  2622. int i;
  2623. for (i = 0; i < PM_BMS_MAX_INTS; i++)
  2624. if (chip->pmic_bms_irq[i]) {
  2625. free_irq(chip->pmic_bms_irq[i], NULL);
  2626. chip->pmic_bms_irq[i] = 0;
  2627. }
  2628. }
  2629. static int __devinit request_irqs(struct pm8921_bms_chip *chip,
  2630. struct platform_device *pdev)
  2631. {
  2632. struct resource *res;
  2633. int ret, i;
  2634. ret = 0;
  2635. bitmap_fill(chip->enabled_irqs, PM_BMS_MAX_INTS);
  2636. for (i = 0; i < ARRAY_SIZE(bms_irq_data); i++) {
  2637. res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
  2638. bms_irq_data[i].name);
  2639. if (res == NULL) {
  2640. pr_err("couldn't find %s\n", bms_irq_data[i].name);
  2641. goto err_out;
  2642. }
  2643. ret = request_irq(res->start, bms_irq_data[i].handler,
  2644. bms_irq_data[i].flags,
  2645. bms_irq_data[i].name, chip);
  2646. if (ret < 0) {
  2647. pr_err("couldn't request %d (%s) %d\n", res->start,
  2648. bms_irq_data[i].name, ret);
  2649. goto err_out;
  2650. }
  2651. chip->pmic_bms_irq[bms_irq_data[i].irq_id] = res->start;
  2652. pm8921_bms_disable_irq(chip, bms_irq_data[i].irq_id);
  2653. }
  2654. return 0;
  2655. err_out:
  2656. free_irqs(chip);
  2657. return -EINVAL;
  2658. }
  2659. #define EN_BMS_BIT BIT(7)
  2660. #define EN_PON_HS_BIT BIT(0)
  2661. static int __devinit pm8921_bms_hw_init(struct pm8921_bms_chip *chip)
  2662. {
  2663. int rc;
  2664. rc = pm_bms_masked_write(chip, BMS_CONTROL,
  2665. EN_BMS_BIT | EN_PON_HS_BIT, EN_BMS_BIT | EN_PON_HS_BIT);
  2666. if (rc) {
  2667. pr_err("failed to enable pon and bms addr = %d %d",
  2668. BMS_CONTROL, rc);
  2669. }
  2670. /* The charger will call start charge later if usb is present */
  2671. pm_bms_masked_write(chip, BMS_TOLERANCES,
  2672. IBAT_TOL_MASK, IBAT_TOL_NOCHG);
  2673. return 0;
  2674. }
  2675. static void check_initial_ocv(struct pm8921_bms_chip *chip)
  2676. {
  2677. int ocv_uv, rc;
  2678. int16_t ocv_raw;
  2679. int usb_chg;
  2680. /*
  2681. * Check if a ocv is available in bms hw,
  2682. * if not compute it here at boot time and save it
  2683. * in the last_ocv_uv.
  2684. */
  2685. ocv_uv = 0;
  2686. pm_bms_read_output_data(chip, LAST_GOOD_OCV_VALUE, &ocv_raw);
  2687. usb_chg = usb_chg_plugged_in(chip);
  2688. rc = convert_vbatt_raw_to_uv(chip, usb_chg, ocv_raw, &ocv_uv);
  2689. if (rc || ocv_uv == 0) {
  2690. rc = adc_based_ocv(chip, &ocv_uv);
  2691. if (rc) {
  2692. pr_err("failed to read adc based ocv_uv rc = %d\n", rc);
  2693. ocv_uv = DEFAULT_OCV_MICROVOLTS;
  2694. }
  2695. }
  2696. chip->last_ocv_uv = ocv_uv;
  2697. pr_debug("ocv_uv = %d last_ocv_uv = %d\n", ocv_uv, chip->last_ocv_uv);
  2698. }
  2699. static int64_t read_battery_id(struct pm8921_bms_chip *chip)
  2700. {
  2701. int rc;
  2702. struct pm8xxx_adc_chan_result result;
  2703. rc = pm8xxx_adc_read(chip->batt_id_channel, &result);
  2704. if (rc) {
  2705. pr_err("error reading batt id channel = %d, rc = %d\n",
  2706. chip->vbat_channel, rc);
  2707. return rc;
  2708. }
  2709. pr_debug("batt_id phy = %lld meas = 0x%llx\n", result.physical,
  2710. result.measurement);
  2711. return result.adc_code;
  2712. }
  2713. #define PALLADIUM_ID_MIN 0x7F40
  2714. #define PALLADIUM_ID_MAX 0x7F5A
  2715. #define DESAY_5200_ID_MIN 0x7F7F
  2716. #define DESAY_5200_ID_MAX 0x802F
  2717. static int set_battery_data(struct pm8921_bms_chip *chip)
  2718. {
  2719. int64_t battery_id;
  2720. if (chip->batt_type == BATT_DESAY)
  2721. goto desay;
  2722. else if (chip->batt_type == BATT_PALLADIUM)
  2723. goto palladium;
  2724. battery_id = read_battery_id(chip);
  2725. if (battery_id < 0) {
  2726. pr_err("cannot read battery id err = %lld\n", battery_id);
  2727. return battery_id;
  2728. }
  2729. if (is_between(PALLADIUM_ID_MIN, PALLADIUM_ID_MAX, battery_id)) {
  2730. goto palladium;
  2731. } else if (is_between(DESAY_5200_ID_MIN, DESAY_5200_ID_MAX,
  2732. battery_id)) {
  2733. goto desay;
  2734. } else {
  2735. pr_warn("invalid battid, palladium 1500 assumed batt_id %llx\n",
  2736. battery_id);
  2737. goto palladium;
  2738. }
  2739. palladium:
  2740. chip->fcc = palladium_1500_data.fcc;
  2741. chip->fcc_temp_lut = palladium_1500_data.fcc_temp_lut;
  2742. chip->fcc_sf_lut = palladium_1500_data.fcc_sf_lut;
  2743. chip->pc_temp_ocv_lut = palladium_1500_data.pc_temp_ocv_lut;
  2744. chip->pc_sf_lut = palladium_1500_data.pc_sf_lut;
  2745. chip->rbatt_sf_lut = palladium_1500_data.rbatt_sf_lut;
  2746. chip->default_rbatt_mohm
  2747. = palladium_1500_data.default_rbatt_mohm;
  2748. chip->delta_rbatt_mohm = palladium_1500_data.delta_rbatt_mohm;
  2749. chip->rbatt_capacitive_mohm
  2750. = palladium_1500_data.rbatt_capacitive_mohm;
  2751. return 0;
  2752. desay:
  2753. chip->fcc = desay_5200_data.fcc;
  2754. chip->fcc_temp_lut = desay_5200_data.fcc_temp_lut;
  2755. chip->pc_temp_ocv_lut = desay_5200_data.pc_temp_ocv_lut;
  2756. chip->pc_sf_lut = desay_5200_data.pc_sf_lut;
  2757. chip->rbatt_sf_lut = desay_5200_data.rbatt_sf_lut;
  2758. chip->default_rbatt_mohm = desay_5200_data.default_rbatt_mohm;
  2759. chip->delta_rbatt_mohm = desay_5200_data.delta_rbatt_mohm;
  2760. chip->rbatt_capacitive_mohm
  2761. = desay_5200_data.rbatt_capacitive_mohm;
  2762. return 0;
  2763. }
  2764. enum bms_request_operation {
  2765. CALC_FCC,
  2766. CALC_PC,
  2767. CALC_SOC,
  2768. CALIB_HKADC,
  2769. CALIB_CCADC,
  2770. GET_VBAT_VSENSE_SIMULTANEOUS,
  2771. STOP_OCV,
  2772. START_OCV,
  2773. SET_OCV,
  2774. BATT_PRESENT,
  2775. };
  2776. static int test_batt_temp = 5;
  2777. static int test_chargecycle = 150;
  2778. static int test_ocv = 3900000;
  2779. enum {
  2780. TEST_BATT_TEMP,
  2781. TEST_CHARGE_CYCLE,
  2782. TEST_OCV,
  2783. };
  2784. static int get_test_param(void *data, u64 * val)
  2785. {
  2786. switch ((int)data) {
  2787. case TEST_BATT_TEMP:
  2788. *val = test_batt_temp;
  2789. break;
  2790. case TEST_CHARGE_CYCLE:
  2791. *val = test_chargecycle;
  2792. break;
  2793. case TEST_OCV:
  2794. *val = test_ocv;
  2795. break;
  2796. default:
  2797. return -EINVAL;
  2798. }
  2799. return 0;
  2800. }
  2801. static int set_test_param(void *data, u64 val)
  2802. {
  2803. switch ((int)data) {
  2804. case TEST_BATT_TEMP:
  2805. test_batt_temp = (int)val;
  2806. break;
  2807. case TEST_CHARGE_CYCLE:
  2808. test_chargecycle = (int)val;
  2809. break;
  2810. case TEST_OCV:
  2811. test_ocv = (int)val;
  2812. break;
  2813. default:
  2814. return -EINVAL;
  2815. }
  2816. return 0;
  2817. }
  2818. DEFINE_SIMPLE_ATTRIBUTE(temp_fops, get_test_param, set_test_param, "%llu\n");
  2819. static int get_calc(void *data, u64 * val)
  2820. {
  2821. int param = (int)data;
  2822. int ret = 0;
  2823. int ibat_ua, vbat_uv;
  2824. struct pm8921_soc_params raw;
  2825. read_soc_params_raw(the_chip, &raw, 300);
  2826. *val = 0;
  2827. /* global irq number passed in via data */
  2828. switch (param) {
  2829. case CALC_FCC:
  2830. *val = calculate_fcc_uah(the_chip, test_batt_temp,
  2831. test_chargecycle);
  2832. break;
  2833. case CALC_PC:
  2834. *val = calculate_pc(the_chip, test_ocv, test_batt_temp,
  2835. test_chargecycle);
  2836. break;
  2837. case CALC_SOC:
  2838. *val = calculate_state_of_charge(the_chip, &raw,
  2839. test_batt_temp, test_chargecycle);
  2840. break;
  2841. case CALIB_HKADC:
  2842. /* reading this will trigger calibration */
  2843. *val = 0;
  2844. calib_hkadc(the_chip);
  2845. break;
  2846. case CALIB_CCADC:
  2847. /* reading this will trigger calibration */
  2848. *val = 0;
  2849. pm8xxx_calib_ccadc();
  2850. break;
  2851. case GET_VBAT_VSENSE_SIMULTANEOUS:
  2852. /* reading this will call simultaneous vbat and vsense */
  2853. *val =
  2854. pm8921_bms_get_simultaneous_battery_voltage_and_current(
  2855. &ibat_ua,
  2856. &vbat_uv);
  2857. default:
  2858. ret = -EINVAL;
  2859. }
  2860. return ret;
  2861. }
  2862. static int set_calc(void *data, u64 val)
  2863. {
  2864. int param = (int)data;
  2865. int ret = 0;
  2866. switch (param) {
  2867. case STOP_OCV:
  2868. pm8921_bms_stop_ocv_updates();
  2869. break;
  2870. case START_OCV:
  2871. pm8921_bms_start_ocv_updates();
  2872. break;
  2873. default:
  2874. ret = -EINVAL;
  2875. }
  2876. return ret;
  2877. }
  2878. DEFINE_SIMPLE_ATTRIBUTE(calc_fops, get_calc, set_calc, "%llu\n");
  2879. static int get_reading(void *data, u64 * val)
  2880. {
  2881. int param = (int)data;
  2882. int ret = 0;
  2883. struct pm8921_soc_params raw;
  2884. mutex_lock(&the_chip->last_ocv_uv_mutex);
  2885. read_soc_params_raw(the_chip, &raw, 300);
  2886. mutex_lock(&the_chip->last_ocv_uv_mutex);
  2887. *val = 0;
  2888. switch (param) {
  2889. case CC_MSB:
  2890. case CC_LSB:
  2891. *val = raw.cc;
  2892. break;
  2893. case LAST_GOOD_OCV_VALUE:
  2894. *val = raw.last_good_ocv_uv;
  2895. break;
  2896. case VSENSE_AVG:
  2897. read_vsense_avg(the_chip, (uint *)val);
  2898. break;
  2899. default:
  2900. ret = -EINVAL;
  2901. }
  2902. return ret;
  2903. }
  2904. DEFINE_SIMPLE_ATTRIBUTE(reading_fops, get_reading, NULL, "%lld\n");
  2905. static int get_rt_status(void *data, u64 * val)
  2906. {
  2907. int i = (int)data;
  2908. int ret;
  2909. /* global irq number passed in via data */
  2910. ret = pm_bms_get_rt_status(the_chip, i);
  2911. *val = ret;
  2912. return 0;
  2913. }
  2914. DEFINE_SIMPLE_ATTRIBUTE(rt_fops, get_rt_status, NULL, "%llu\n");
  2915. static int get_reg(void *data, u64 * val)
  2916. {
  2917. int addr = (int)data;
  2918. int ret;
  2919. u8 temp;
  2920. ret = pm8xxx_readb(the_chip->dev->parent, addr, &temp);
  2921. if (ret) {
  2922. pr_err("pm8xxx_readb to %x value = %d errored = %d\n",
  2923. addr, temp, ret);
  2924. return -EAGAIN;
  2925. }
  2926. *val = temp;
  2927. return 0;
  2928. }
  2929. static int set_reg(void *data, u64 val)
  2930. {
  2931. int addr = (int)data;
  2932. int ret;
  2933. u8 temp;
  2934. temp = (u8) val;
  2935. ret = pm8xxx_writeb(the_chip->dev->parent, addr, temp);
  2936. if (ret) {
  2937. pr_err("pm8xxx_writeb to %x value = %d errored = %d\n",
  2938. addr, temp, ret);
  2939. return -EAGAIN;
  2940. }
  2941. return 0;
  2942. }
  2943. DEFINE_SIMPLE_ATTRIBUTE(reg_fops, get_reg, set_reg, "0x%02llx\n");
  2944. static void create_debugfs_entries(struct pm8921_bms_chip *chip)
  2945. {
  2946. int i;
  2947. chip->dent = debugfs_create_dir("pm8921-bms", NULL);
  2948. if (IS_ERR(chip->dent)) {
  2949. pr_err("pmic bms couldnt create debugfs dir\n");
  2950. return;
  2951. }
  2952. debugfs_create_file("BMS_CONTROL", 0644, chip->dent,
  2953. (void *)BMS_CONTROL, &reg_fops);
  2954. debugfs_create_file("BMS_OUTPUT0", 0644, chip->dent,
  2955. (void *)BMS_OUTPUT0, &reg_fops);
  2956. debugfs_create_file("BMS_OUTPUT1", 0644, chip->dent,
  2957. (void *)BMS_OUTPUT1, &reg_fops);
  2958. debugfs_create_file("BMS_TEST1", 0644, chip->dent,
  2959. (void *)BMS_TEST1, &reg_fops);
  2960. debugfs_create_file("test_batt_temp", 0644, chip->dent,
  2961. (void *)TEST_BATT_TEMP, &temp_fops);
  2962. debugfs_create_file("test_chargecycle", 0644, chip->dent,
  2963. (void *)TEST_CHARGE_CYCLE, &temp_fops);
  2964. debugfs_create_file("test_ocv", 0644, chip->dent,
  2965. (void *)TEST_OCV, &temp_fops);
  2966. debugfs_create_file("read_cc", 0644, chip->dent,
  2967. (void *)CC_MSB, &reading_fops);
  2968. debugfs_create_file("read_last_good_ocv", 0644, chip->dent,
  2969. (void *)LAST_GOOD_OCV_VALUE, &reading_fops);
  2970. debugfs_create_file("read_vbatt_for_rbatt", 0644, chip->dent,
  2971. (void *)VBATT_FOR_RBATT, &reading_fops);
  2972. debugfs_create_file("read_vsense_for_rbatt", 0644, chip->dent,
  2973. (void *)VSENSE_FOR_RBATT, &reading_fops);
  2974. debugfs_create_file("read_ocv_for_rbatt", 0644, chip->dent,
  2975. (void *)OCV_FOR_RBATT, &reading_fops);
  2976. debugfs_create_file("read_vsense_avg", 0644, chip->dent,
  2977. (void *)VSENSE_AVG, &reading_fops);
  2978. debugfs_create_file("show_fcc", 0644, chip->dent,
  2979. (void *)CALC_FCC, &calc_fops);
  2980. debugfs_create_file("show_pc", 0644, chip->dent,
  2981. (void *)CALC_PC, &calc_fops);
  2982. debugfs_create_file("show_soc", 0644, chip->dent,
  2983. (void *)CALC_SOC, &calc_fops);
  2984. debugfs_create_file("calib_hkadc", 0644, chip->dent,
  2985. (void *)CALIB_HKADC, &calc_fops);
  2986. debugfs_create_file("calib_ccadc", 0644, chip->dent,
  2987. (void *)CALIB_CCADC, &calc_fops);
  2988. debugfs_create_file("stop_ocv", 0644, chip->dent,
  2989. (void *)STOP_OCV, &calc_fops);
  2990. debugfs_create_file("start_ocv", 0644, chip->dent,
  2991. (void *)START_OCV, &calc_fops);
  2992. debugfs_create_file("set_ocv", 0644, chip->dent,
  2993. (void *)SET_OCV, &calc_fops);
  2994. debugfs_create_file("batt_present", 0644, chip->dent,
  2995. (void *)BATT_PRESENT, &calc_fops);
  2996. debugfs_create_file("simultaneous", 0644, chip->dent,
  2997. (void *)GET_VBAT_VSENSE_SIMULTANEOUS, &calc_fops);
  2998. for (i = 0; i < ARRAY_SIZE(bms_irq_data); i++) {
  2999. if (chip->pmic_bms_irq[bms_irq_data[i].irq_id])
  3000. debugfs_create_file(bms_irq_data[i].name, 0444,
  3001. chip->dent,
  3002. (void *)bms_irq_data[i].irq_id,
  3003. &rt_fops);
  3004. }
  3005. }
  3006. static ssize_t fcc_data_set(struct device *dev, struct device_attribute *attr,
  3007. const char *buf, size_t count)
  3008. {
  3009. struct pm8921_bms_chip *chip = dev_get_drvdata(dev);
  3010. static int i;
  3011. int fcc_new = 0, rc;
  3012. if (battery_removed) {
  3013. pr_debug("Invalid FCC table. Possible battery removal\n");
  3014. last_fcc_update_count = 0;
  3015. return count;
  3016. }
  3017. i %= chip->min_fcc_learning_samples;
  3018. rc = sscanf(buf, "%d", &fcc_new);
  3019. if (rc != 1)
  3020. return -EINVAL;
  3021. chip->fcc_table[i].fcc_new = fcc_new;
  3022. chip->fcc_table[i].fcc_real = fcc_new;
  3023. pr_debug("Rcvd: [%d] fcc_new=%d\n", i, fcc_new);
  3024. i++;
  3025. return count;
  3026. }
  3027. static ssize_t fcc_data_get(struct device *dev, struct device_attribute *attr,
  3028. char *buf)
  3029. {
  3030. int count = 0;
  3031. struct pm8921_bms_chip *chip = dev_get_drvdata(dev);
  3032. if (battery_removed) {
  3033. pr_debug("Invalidate the fcc table\n");
  3034. invalidate_fcc(chip);
  3035. battery_removed = 0;
  3036. return count;
  3037. }
  3038. count = snprintf(buf, PAGE_SIZE, "%d", chip->fcc_new);
  3039. pr_debug("Sent: fcc_new=%d\n", chip->fcc_new);
  3040. return count;
  3041. }
  3042. static ssize_t fcc_temp_set(struct device *dev, struct device_attribute *attr,
  3043. const char *buf, size_t count)
  3044. {
  3045. static int i;
  3046. int batt_temp = 0, rc;
  3047. struct pm8921_bms_chip *chip = dev_get_drvdata(dev);
  3048. i %= chip->min_fcc_learning_samples;
  3049. rc = sscanf(buf, "%d", &batt_temp);
  3050. if (rc != 1)
  3051. return -EINVAL;
  3052. chip->fcc_table[i].batt_temp = batt_temp;
  3053. chip->fcc_table[i].temp_real = batt_temp;
  3054. pr_debug("Rcvd: [%d] batt_temp=%d\n", i, batt_temp);
  3055. i++;
  3056. return count;
  3057. }
  3058. static ssize_t fcc_chgcyl_set(struct device *dev, struct device_attribute *attr,
  3059. const char *buf, size_t count)
  3060. {
  3061. static int i;
  3062. int chargecycle = 0, rc;
  3063. struct pm8921_bms_chip *chip = dev_get_drvdata(dev);
  3064. i %= chip->min_fcc_learning_samples;
  3065. rc = sscanf(buf, "%d", &chargecycle);
  3066. if (rc != 1)
  3067. return -EINVAL;
  3068. chip->fcc_table[i].chargecycles = chargecycle;
  3069. pr_debug("Rcvd: [%d] chargecycle=%d\n", i, chargecycle);
  3070. i++;
  3071. return count;
  3072. }
  3073. static ssize_t fcc_list_get(struct device *dev, struct device_attribute *attr,
  3074. char *buf)
  3075. {
  3076. struct pm8921_bms_chip *chip = dev_get_drvdata(dev);
  3077. struct fcc_data *ft;
  3078. int i = 0, j, count = 0;
  3079. if (last_fcc_update_count < chip->min_fcc_learning_samples)
  3080. i = last_fcc_update_count;
  3081. else
  3082. i = chip->min_fcc_learning_samples;
  3083. for (j = 0; j < i; j++) {
  3084. ft = &chip->fcc_table[j];
  3085. count += snprintf(buf + count, PAGE_SIZE - count,
  3086. "%d %d %d %d %d\n", ft->fcc_new, ft->chargecycles,
  3087. ft->batt_temp, ft->fcc_real, ft->temp_real);
  3088. }
  3089. return count;
  3090. }
  3091. static DEVICE_ATTR(fcc_data, 0664, fcc_data_get, fcc_data_set);
  3092. static DEVICE_ATTR(fcc_temp, 0664, NULL, fcc_temp_set);
  3093. static DEVICE_ATTR(fcc_chgcyl, 0664, NULL, fcc_chgcyl_set);
  3094. static DEVICE_ATTR(fcc_list, 0664, fcc_list_get, NULL);
  3095. static struct attribute *fcc_attrs[] = {
  3096. &dev_attr_fcc_data.attr,
  3097. &dev_attr_fcc_temp.attr,
  3098. &dev_attr_fcc_chgcyl.attr,
  3099. &dev_attr_fcc_list.attr,
  3100. NULL
  3101. };
  3102. static const struct attribute_group fcc_attr_group = {
  3103. .attrs = fcc_attrs,
  3104. };
  3105. #define REG_SBI_CONFIG 0x04F
  3106. #define PAGE3_ENABLE_MASK 0x6
  3107. #define PROGRAM_REV_MASK 0x0F
  3108. #define PROGRAM_REV 0x9
  3109. static int read_ocv_trim(struct pm8921_bms_chip *chip)
  3110. {
  3111. int rc;
  3112. u8 reg, sbi_config;
  3113. rc = pm8xxx_readb(chip->dev->parent, REG_SBI_CONFIG, &sbi_config);
  3114. if (rc) {
  3115. pr_err("error = %d reading sbi config reg\n", rc);
  3116. return rc;
  3117. }
  3118. reg = sbi_config | PAGE3_ENABLE_MASK;
  3119. rc = pm8xxx_writeb(chip->dev->parent, REG_SBI_CONFIG, reg);
  3120. if (rc) {
  3121. pr_err("error = %d writing sbi config reg\n", rc);
  3122. return rc;
  3123. }
  3124. rc = pm8xxx_readb(chip->dev->parent, TEST_PROGRAM_REV, &reg);
  3125. if (rc)
  3126. pr_err("Error %d reading %d addr %d\n",
  3127. rc, reg, TEST_PROGRAM_REV);
  3128. pr_err("program rev reg is 0x%x\n", reg);
  3129. reg &= PROGRAM_REV_MASK;
  3130. /* If the revision is equal or higher do not adjust trim delta */
  3131. if (reg >= PROGRAM_REV) {
  3132. chip->amux_2_trim_delta = 0;
  3133. goto restore_sbi_config;
  3134. }
  3135. rc = pm8xxx_readb(chip->dev->parent, AMUX_TRIM_2, &reg);
  3136. if (rc) {
  3137. pr_err("error = %d reading trim reg\n", rc);
  3138. return rc;
  3139. }
  3140. pr_err("trim reg is 0x%x\n", reg);
  3141. chip->amux_2_trim_delta = abs(0x49 - reg);
  3142. pr_err("trim delta is %d\n", chip->amux_2_trim_delta);
  3143. restore_sbi_config:
  3144. rc = pm8xxx_writeb(chip->dev->parent, REG_SBI_CONFIG, sbi_config);
  3145. if (rc) {
  3146. pr_err("error = %d writing sbi config reg\n", rc);
  3147. return rc;
  3148. }
  3149. return 0;
  3150. }
  3151. static int __devinit pm8921_bms_probe(struct platform_device *pdev)
  3152. {
  3153. int rc = 0;
  3154. int vbatt;
  3155. struct pm8921_bms_chip *chip;
  3156. const struct pm8921_bms_platform_data *pdata
  3157. = pdev->dev.platform_data;
  3158. if (!pdata) {
  3159. pr_err("missing platform data\n");
  3160. return -EINVAL;
  3161. }
  3162. chip = kzalloc(sizeof(struct pm8921_bms_chip), GFP_KERNEL);
  3163. if (!chip) {
  3164. pr_err("Cannot allocate pm_bms_chip\n");
  3165. return -ENOMEM;
  3166. }
  3167. mutex_init(&chip->bms_output_lock);
  3168. mutex_init(&chip->last_ocv_uv_mutex);
  3169. chip->dev = &pdev->dev;
  3170. chip->r_sense_uohm = pdata->r_sense_uohm;
  3171. chip->v_cutoff = pdata->v_cutoff;
  3172. chip->max_voltage_uv = pdata->max_voltage_uv;
  3173. chip->chg_term_ua = pdata->chg_term_ua;
  3174. chip->batt_type = pdata->battery_type;
  3175. chip->rconn_mohm = pdata->rconn_mohm;
  3176. chip->start_percent = -EINVAL;
  3177. chip->end_percent = -EINVAL;
  3178. chip->last_cc_uah = INT_MIN;
  3179. chip->ocv_reading_at_100 = OCV_RAW_UNINITIALIZED;
  3180. chip->prev_last_good_ocv_raw = OCV_RAW_UNINITIALIZED;
  3181. chip->shutdown_soc_valid_limit = pdata->shutdown_soc_valid_limit;
  3182. chip->adjust_soc_low_threshold = pdata->adjust_soc_low_threshold;
  3183. chip->normal_voltage_calc_ms = pdata->normal_voltage_calc_ms;
  3184. chip->low_voltage_calc_ms = pdata->low_voltage_calc_ms;
  3185. chip->soc_calc_period = pdata->normal_voltage_calc_ms;
  3186. if (chip->adjust_soc_low_threshold >= 45)
  3187. chip->adjust_soc_low_threshold = 45;
  3188. chip->prev_pc_unusable = -EINVAL;
  3189. chip->soc_at_cv = -EINVAL;
  3190. chip->imax_ua = -EINVAL;
  3191. chip->ignore_shutdown_soc = pdata->ignore_shutdown_soc;
  3192. rc = set_battery_data(chip);
  3193. if (rc) {
  3194. pr_err("%s bad battery data %d\n", __func__, rc);
  3195. goto free_chip;
  3196. }
  3197. if (chip->pc_temp_ocv_lut == NULL) {
  3198. pr_err("temp ocv lut table is NULL\n");
  3199. rc = -EINVAL;
  3200. goto free_chip;
  3201. }
  3202. /* set defaults in the battery data */
  3203. if (chip->default_rbatt_mohm <= 0)
  3204. chip->default_rbatt_mohm = DEFAULT_RBATT_MOHMS;
  3205. chip->batt_temp_channel = pdata->bms_cdata.batt_temp_channel;
  3206. chip->vbat_channel = pdata->bms_cdata.vbat_channel;
  3207. chip->ref625mv_channel = pdata->bms_cdata.ref625mv_channel;
  3208. chip->ref1p25v_channel = pdata->bms_cdata.ref1p25v_channel;
  3209. chip->batt_id_channel = pdata->bms_cdata.batt_id_channel;
  3210. chip->revision = pm8xxx_get_revision(chip->dev->parent);
  3211. chip->enable_fcc_learning = pdata->enable_fcc_learning;
  3212. chip->min_fcc_learning_soc = pdata->min_fcc_learning_soc;
  3213. chip->min_fcc_ocv_pc = pdata->min_fcc_ocv_pc;
  3214. chip->min_fcc_learning_samples = pdata->min_fcc_learning_samples;
  3215. if (chip->enable_fcc_learning) {
  3216. if (!chip->min_fcc_learning_soc)
  3217. chip->min_fcc_learning_soc =
  3218. MIN_START_PERCENT_FOR_LEARNING;
  3219. if (!chip->min_fcc_ocv_pc)
  3220. chip->min_fcc_ocv_pc =
  3221. MIN_START_OCV_PERCENT_FOR_LEARNING;
  3222. if (!chip->min_fcc_learning_samples ||
  3223. chip->min_fcc_learning_samples > MAX_FCC_LEARNING_COUNT)
  3224. chip->min_fcc_learning_samples = MAX_FCC_LEARNING_COUNT;
  3225. min_fcc_cycles = chip->min_fcc_learning_samples;
  3226. chip->fcc_table = kzalloc(sizeof(struct fcc_data) *
  3227. chip->min_fcc_learning_samples, GFP_KERNEL);
  3228. if (!chip->fcc_table) {
  3229. pr_err("Unable to allocate table for fcc learning\n");
  3230. rc = -ENOMEM;
  3231. goto free_chip;
  3232. }
  3233. rc = sysfs_create_group(&pdev->dev.kobj, &fcc_attr_group);
  3234. if (rc) {
  3235. pr_err("Unable to create sysfs entries\n");
  3236. goto free_chip;
  3237. }
  3238. }
  3239. chip->disable_flat_portion_ocv = pdata->disable_flat_portion_ocv;
  3240. chip->ocv_dis_high_soc = pdata->ocv_dis_high_soc;
  3241. chip->ocv_dis_low_soc = pdata->ocv_dis_low_soc;
  3242. chip->high_ocv_correction_limit_uv
  3243. = pdata->high_ocv_correction_limit_uv;
  3244. chip->low_ocv_correction_limit_uv = pdata->low_ocv_correction_limit_uv;
  3245. chip->hold_soc_est = pdata->hold_soc_est;
  3246. chip->alarm_low_mv = pdata->alarm_low_mv;
  3247. chip->alarm_high_mv = pdata->alarm_high_mv;
  3248. chip->low_voltage_detect = pdata->low_voltage_detect;
  3249. chip->vbatt_cutoff_retries = pdata->vbatt_cutoff_retries;
  3250. mutex_init(&chip->calib_mutex);
  3251. INIT_WORK(&chip->calib_hkadc_work, calibrate_hkadc_work);
  3252. INIT_DELAYED_WORK(&chip->calculate_soc_delayed_work,
  3253. calculate_soc_work);
  3254. wake_lock_init(&chip->soc_wake_lock,
  3255. WAKE_LOCK_SUSPEND, "pm8921_soc_lock");
  3256. rc = request_irqs(chip, pdev);
  3257. if (rc) {
  3258. pr_err("couldn't register interrupts rc = %d\n", rc);
  3259. goto destroy_soc_wl;
  3260. }
  3261. wake_lock_init(&chip->low_voltage_wake_lock,
  3262. WAKE_LOCK_SUSPEND, "pm8921_bms_low");
  3263. rc = pm8921_bms_hw_init(chip);
  3264. if (rc) {
  3265. pr_err("couldn't init hardware rc = %d\n", rc);
  3266. goto free_irqs;
  3267. }
  3268. read_shutdown_soc_and_iavg(chip);
  3269. platform_set_drvdata(pdev, chip);
  3270. the_chip = chip;
  3271. create_debugfs_entries(chip);
  3272. rc = read_ocv_trim(chip);
  3273. if (rc) {
  3274. pr_err("couldn't adjust ocv_trim rc= %d\n", rc);
  3275. goto free_irqs;
  3276. }
  3277. check_initial_ocv(chip);
  3278. /* enable the vbatt reading interrupts for scheduling hkadc calib */
  3279. pm8921_bms_enable_irq(chip, PM8921_BMS_GOOD_OCV);
  3280. pm8921_bms_enable_irq(chip, PM8921_BMS_OCV_FOR_R);
  3281. rc = pm8921_bms_configure_batt_alarm(chip);
  3282. if (rc) {
  3283. pr_err("Couldn't configure battery alarm! rc=%d\n", rc);
  3284. goto free_irqs;
  3285. }
  3286. rc = pm8921_bms_enable_batt_alarm(chip);
  3287. if (rc) {
  3288. pr_err("Couldn't enable battery alarm! rc=%d\n", rc);
  3289. goto free_irqs;
  3290. }
  3291. calculate_soc_work(&(chip->calculate_soc_delayed_work.work));
  3292. rc = get_battery_uvolts(chip, &vbatt);
  3293. if (!rc)
  3294. pr_info("OK battery_capacity_at_boot=%d volt = %d ocv = %d\n",
  3295. pm8921_bms_get_percent_charge(),
  3296. vbatt, chip->last_ocv_uv);
  3297. else
  3298. pr_info("Unable to read battery voltage at boot\n");
  3299. return 0;
  3300. free_irqs:
  3301. wake_lock_destroy(&chip->low_voltage_wake_lock);
  3302. free_irqs(chip);
  3303. destroy_soc_wl:
  3304. wake_lock_destroy(&chip->soc_wake_lock);
  3305. free_chip:
  3306. kfree(chip);
  3307. return rc;
  3308. }
  3309. static int __devexit pm8921_bms_remove(struct platform_device *pdev)
  3310. {
  3311. struct pm8921_bms_chip *chip = platform_get_drvdata(pdev);
  3312. free_irqs(chip);
  3313. kfree(chip->adjusted_fcc_temp_lut);
  3314. platform_set_drvdata(pdev, NULL);
  3315. the_chip = NULL;
  3316. kfree(chip);
  3317. return 0;
  3318. }
  3319. static int pm8921_bms_suspend(struct device *dev)
  3320. {
  3321. struct pm8921_bms_chip *chip = dev_get_drvdata(dev);
  3322. cancel_delayed_work_sync(&chip->calculate_soc_delayed_work);
  3323. chip->last_soc_at_suspend = last_soc;
  3324. return 0;
  3325. }
  3326. static int pm8921_bms_resume(struct device *dev)
  3327. {
  3328. int rc;
  3329. unsigned long time_since_last_recalc;
  3330. unsigned long tm_now_sec;
  3331. struct pm8921_bms_chip *chip = dev_get_drvdata(dev);
  3332. rc = get_current_time(&tm_now_sec);
  3333. if (rc) {
  3334. pr_err("Could not read current time: %d\n", rc);
  3335. return 0;
  3336. }
  3337. if (tm_now_sec > chip->last_recalc_time) {
  3338. time_since_last_recalc = tm_now_sec -
  3339. chip->last_recalc_time;
  3340. pr_debug("Time since last recalc: %lu\n",
  3341. time_since_last_recalc);
  3342. if ((time_since_last_recalc * 1000) >=
  3343. chip->soc_calc_period) {
  3344. chip->last_recalc_time = tm_now_sec;
  3345. recalculate_soc(chip);
  3346. chip->soc_updated_on_resume = true;
  3347. }
  3348. }
  3349. chip->first_report_after_suspend = true;
  3350. update_power_supply(chip);
  3351. schedule_delayed_work(&chip->calculate_soc_delayed_work,
  3352. msecs_to_jiffies(chip->soc_calc_period));
  3353. return 0;
  3354. }
  3355. static const struct dev_pm_ops pm8921_bms_pm_ops = {
  3356. .resume = pm8921_bms_resume,
  3357. .suspend = pm8921_bms_suspend,
  3358. };
  3359. static struct platform_driver pm8921_bms_driver = {
  3360. .probe = pm8921_bms_probe,
  3361. .remove = __devexit_p(pm8921_bms_remove),
  3362. .driver = {
  3363. .name = PM8921_BMS_DEV_NAME,
  3364. .owner = THIS_MODULE,
  3365. .pm = &pm8921_bms_pm_ops,
  3366. },
  3367. };
  3368. static int __init pm8921_bms_init(void)
  3369. {
  3370. return platform_driver_register(&pm8921_bms_driver);
  3371. }
  3372. static void __exit pm8921_bms_exit(void)
  3373. {
  3374. platform_driver_unregister(&pm8921_bms_driver);
  3375. }
  3376. late_initcall(pm8921_bms_init);
  3377. module_exit(pm8921_bms_exit);
  3378. MODULE_LICENSE("GPL v2");
  3379. MODULE_DESCRIPTION("PMIC8921 bms driver");
  3380. MODULE_VERSION("1.0");
  3381. MODULE_ALIAS("platform:" PM8921_BMS_DEV_NAME);