ioctl_9500.h 3.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191
  1. #ifndef IOCTL_9500_H_
  2. #define IOCTL_9500_H_
  3. /***************************************************************************
  4. *
  5. * Copyright (C) 2008-2009 SMSC
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version 2
  10. * of the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20. *
  21. ***************************************************************************
  22. * File: ioctl_500.h
  23. */
  24. #define SMSC9500_DRIVER_SIGNATURE (0x82745BACUL+DRIVER_VERSION)
  25. #define SMSC9500_APP_SIGNATURE (0x987BEF28UL+DRIVER_VERSION)
  26. #define SMSC9500_IOCTL (SIOCDEVPRIVATE + 0xB)
  27. #define MAX_EEPROM_SIZE 512
  28. enum{
  29. COMMAND_BASE = 0x974FB832UL,
  30. COMMAND_GET_SIGNATURE,
  31. COMMAND_LAN_GET_REG,
  32. COMMAND_LAN_SET_REG,
  33. COMMAND_MAC_GET_REG,
  34. COMMAND_MAC_SET_REG,
  35. COMMAND_PHY_GET_REG,
  36. COMMAND_PHY_SET_REG,
  37. COMMAND_DUMP_LAN_REGS,
  38. COMMAND_DUMP_MAC_REGS,
  39. COMMAND_DUMP_PHY_REGS,
  40. COMMAND_DUMP_EEPROM,
  41. COMMAND_GET_MAC_ADDRESS,
  42. COMMAND_SET_MAC_ADDRESS,
  43. COMMAND_LOAD_MAC_ADDRESS,
  44. COMMAND_SAVE_MAC_ADDRESS,
  45. COMMAND_SET_DEBUG_MODE,
  46. COMMAND_SET_POWER_MODE,
  47. COMMAND_GET_POWER_MODE,
  48. COMMAND_SET_LINK_MODE,
  49. COMMAND_GET_LINK_MODE,
  50. COMMAND_GET_CONFIGURATION,
  51. COMMAND_DUMP_TEMP,
  52. COMMAND_READ_BYTE,
  53. COMMAND_READ_WORD,
  54. COMMAND_READ_DWORD,
  55. COMMAND_WRITE_BYTE,
  56. COMMAND_WRITE_WORD,
  57. COMMAND_WRITE_DWORD,
  58. COMMAND_CHECK_LINK,
  59. COMMAND_GET_ERRORS,
  60. COMMAND_SET_EEPROM,
  61. COMMAND_GET_EEPROM,
  62. COMMAND_WRITE_EEPROM_FROM_FILE,
  63. COMMAND_WRITE_EEPROM_TO_FILE,
  64. COMMAND_VERIFY_EEPROM_WITH_FILE,
  65. //the following codes are intended for cmd9500 only
  66. // they are not intended to have any use in the driver
  67. COMMAND_RUN_SERVER,
  68. COMMAND_RUN_TUNER,
  69. COMMAND_GET_FLOW_PARAMS,
  70. COMMAND_SET_FLOW_PARAMS,
  71. COMMAND_SET_AMDIX_STS,
  72. COMMAND_GET_AMDIX_STS,
  73. COMMAND_SET_EEPROM_BUFFER
  74. };
  75. enum{
  76. LAN_REG_ID_REV,
  77. LAN_REG_FPGA_REV,
  78. LAN_REG_INT_STS,
  79. LAN_REG_RX_CFG,
  80. LAN_REG_TX_CFG,
  81. LAN_REG_HW_CFG,
  82. LAN_REG_RX_FIFO_INF,
  83. LAN_REG_TX_FIFO_INF,
  84. LAN_REG_PMT_CTRL,
  85. LAN_REG_LED_GPIO_CFG,
  86. LAN_REG_GPIO_CFG,
  87. LAN_REG_AFC_CFG,
  88. LAN_REG_E2P_CMD,
  89. LAN_REG_E2P_DATA,
  90. LAN_REG_BURST_CAP,
  91. LAN_REG_STRAP_DBG,
  92. LAN_REG_DP_SEL,
  93. LAN_REG_DP_CMD,
  94. LAN_REG_DP_ADDR,
  95. LAN_REG_DP_DATA0,
  96. LAN_REG_DP_DATA1,
  97. LAN_REG_GPIO_WAKE,
  98. LAN_REG_INT_EP_CTL,
  99. LAN_REG_BULK_IN_DLY,
  100. MAX_LAN_REG_NUM
  101. };
  102. enum{
  103. MAC_REG_MAC_CR,
  104. MAC_REG_ADDRH,
  105. MAC_REG_ADDRL,
  106. MAC_REG_HASHH,
  107. MAC_REG_HASHL,
  108. MAC_REG_MII_ADDR,
  109. MAC_REG_MII_DATA,
  110. MAC_REG_FLOW,
  111. MAC_REG_VLAN1,
  112. MAC_REG_VLAN2,
  113. MAC_REG_WUFF,
  114. MAC_REG_WUCSR,
  115. MAC_REG_COE_CR,
  116. MAX_MAC_REG_NUM
  117. };
  118. enum{
  119. PHY_REG_BCR,
  120. PHY_REG_BSR,
  121. PHY_REG_ID1,
  122. PHY_REG_ID2,
  123. PHY_REG_ANEG_ADV,
  124. PHY_REG_ANEG_LPA,
  125. PHY_REG_ANEG_ER,
  126. PHY_REG_SILICON_REV,
  127. PHY_REG_MODE_CTRL_STS,
  128. PHY_REG_SPECIAL_MODES,
  129. PHY_REG_TSTCNTL,
  130. PHY_REG_TSTREAD1,
  131. PHY_REG_TSTREAD2,
  132. PHY_REG_TSTWRITE,
  133. PHY_REG_SPECIAL_CTRL_STS,
  134. PHY_REG_SITC,
  135. PHY_REG_INT_SRC,
  136. PHY_REG_INT_MASK,
  137. PHY_REG_SPECIAL,
  138. MAX_PHY_REG_NUM
  139. };
  140. typedef struct _SMSC9500_IOCTL_DATA {
  141. unsigned long dwSignature;
  142. unsigned long dwCommand;
  143. unsigned long Data[526];
  144. char Strng1[30];
  145. char Strng2[10];
  146. } SMSC9500_IOCTL_DATA, *PSMSC9500_IOCTL_DATA;
  147. #endif /*IOCTL_9500_H_*/