catas.c 4.5 KB

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  1. /*
  2. * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
  3. * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/workqueue.h>
  34. #include <linux/module.h>
  35. #include "mlx4.h"
  36. enum {
  37. MLX4_CATAS_POLL_INTERVAL = 5 * HZ,
  38. };
  39. static DEFINE_SPINLOCK(catas_lock);
  40. static LIST_HEAD(catas_list);
  41. static struct work_struct catas_work;
  42. static int internal_err_reset = 1;
  43. module_param(internal_err_reset, int, 0644);
  44. MODULE_PARM_DESC(internal_err_reset,
  45. "Reset device on internal errors if non-zero"
  46. " (default 1, in SRIOV mode default is 0)");
  47. static void dump_err_buf(struct mlx4_dev *dev)
  48. {
  49. struct mlx4_priv *priv = mlx4_priv(dev);
  50. int i;
  51. mlx4_err(dev, "Internal error detected:\n");
  52. for (i = 0; i < priv->fw.catas_size; ++i)
  53. mlx4_err(dev, " buf[%02x]: %08x\n",
  54. i, swab32(readl(priv->catas_err.map + i)));
  55. }
  56. static void poll_catas(unsigned long dev_ptr)
  57. {
  58. struct mlx4_dev *dev = (struct mlx4_dev *) dev_ptr;
  59. struct mlx4_priv *priv = mlx4_priv(dev);
  60. if (readl(priv->catas_err.map)) {
  61. dump_err_buf(dev);
  62. mlx4_dispatch_event(dev, MLX4_DEV_EVENT_CATASTROPHIC_ERROR, 0);
  63. if (internal_err_reset) {
  64. spin_lock(&catas_lock);
  65. list_add(&priv->catas_err.list, &catas_list);
  66. spin_unlock(&catas_lock);
  67. queue_work(mlx4_wq, &catas_work);
  68. }
  69. } else
  70. mod_timer(&priv->catas_err.timer,
  71. round_jiffies(jiffies + MLX4_CATAS_POLL_INTERVAL));
  72. }
  73. static void catas_reset(struct work_struct *work)
  74. {
  75. struct mlx4_priv *priv, *tmppriv;
  76. struct mlx4_dev *dev;
  77. LIST_HEAD(tlist);
  78. int ret;
  79. spin_lock_irq(&catas_lock);
  80. list_splice_init(&catas_list, &tlist);
  81. spin_unlock_irq(&catas_lock);
  82. list_for_each_entry_safe(priv, tmppriv, &tlist, catas_err.list) {
  83. struct pci_dev *pdev = priv->dev.pdev;
  84. ret = mlx4_restart_one(priv->dev.pdev);
  85. /* 'priv' now is not valid */
  86. if (ret)
  87. pr_err("mlx4 %s: Reset failed (%d)\n",
  88. pci_name(pdev), ret);
  89. else {
  90. dev = pci_get_drvdata(pdev);
  91. mlx4_dbg(dev, "Reset succeeded\n");
  92. }
  93. }
  94. }
  95. void mlx4_start_catas_poll(struct mlx4_dev *dev)
  96. {
  97. struct mlx4_priv *priv = mlx4_priv(dev);
  98. phys_addr_t addr;
  99. /*If we are in SRIOV the default of the module param must be 0*/
  100. if (mlx4_is_mfunc(dev))
  101. internal_err_reset = 0;
  102. INIT_LIST_HEAD(&priv->catas_err.list);
  103. init_timer(&priv->catas_err.timer);
  104. priv->catas_err.map = NULL;
  105. addr = pci_resource_start(dev->pdev, priv->fw.catas_bar) +
  106. priv->fw.catas_offset;
  107. priv->catas_err.map = ioremap(addr, priv->fw.catas_size * 4);
  108. if (!priv->catas_err.map) {
  109. mlx4_warn(dev, "Failed to map internal error buffer at 0x%llx\n",
  110. (unsigned long long) addr);
  111. return;
  112. }
  113. priv->catas_err.timer.data = (unsigned long) dev;
  114. priv->catas_err.timer.function = poll_catas;
  115. priv->catas_err.timer.expires =
  116. round_jiffies(jiffies + MLX4_CATAS_POLL_INTERVAL);
  117. add_timer(&priv->catas_err.timer);
  118. }
  119. void mlx4_stop_catas_poll(struct mlx4_dev *dev)
  120. {
  121. struct mlx4_priv *priv = mlx4_priv(dev);
  122. del_timer_sync(&priv->catas_err.timer);
  123. if (priv->catas_err.map)
  124. iounmap(priv->catas_err.map);
  125. spin_lock_irq(&catas_lock);
  126. list_del(&priv->catas_err.list);
  127. spin_unlock_irq(&catas_lock);
  128. }
  129. void __init mlx4_catas_init(void)
  130. {
  131. INIT_WORK(&catas_work, catas_reset);
  132. }