at25.c 10.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414
  1. /*
  2. * at25.c -- support most SPI EEPROMs, such as Atmel AT25 models
  3. *
  4. * Copyright (C) 2006 David Brownell
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/delay.h>
  16. #include <linux/device.h>
  17. #include <linux/sched.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/spi/eeprom.h>
  20. /*
  21. * NOTE: this is an *EEPROM* driver. The vagaries of product naming
  22. * mean that some AT25 products are EEPROMs, and others are FLASH.
  23. * Handle FLASH chips with the drivers/mtd/devices/m25p80.c driver,
  24. * not this one!
  25. */
  26. struct at25_data {
  27. struct spi_device *spi;
  28. struct memory_accessor mem;
  29. struct mutex lock;
  30. struct spi_eeprom chip;
  31. struct bin_attribute bin;
  32. unsigned addrlen;
  33. };
  34. #define AT25_WREN 0x06 /* latch the write enable */
  35. #define AT25_WRDI 0x04 /* reset the write enable */
  36. #define AT25_RDSR 0x05 /* read status register */
  37. #define AT25_WRSR 0x01 /* write status register */
  38. #define AT25_READ 0x03 /* read byte(s) */
  39. #define AT25_WRITE 0x02 /* write byte(s)/sector */
  40. #define AT25_SR_nRDY 0x01 /* nRDY = write-in-progress */
  41. #define AT25_SR_WEN 0x02 /* write enable (latched) */
  42. #define AT25_SR_BP0 0x04 /* BP for software writeprotect */
  43. #define AT25_SR_BP1 0x08
  44. #define AT25_SR_WPEN 0x80 /* writeprotect enable */
  45. #define EE_MAXADDRLEN 3 /* 24 bit addresses, up to 2 MBytes */
  46. /* Specs often allow 5 msec for a page write, sometimes 20 msec;
  47. * it's important to recover from write timeouts.
  48. */
  49. #define EE_TIMEOUT 25
  50. /*-------------------------------------------------------------------------*/
  51. #define io_limit PAGE_SIZE /* bytes */
  52. static ssize_t
  53. at25_ee_read(
  54. struct at25_data *at25,
  55. char *buf,
  56. unsigned offset,
  57. size_t count
  58. )
  59. {
  60. u8 command[EE_MAXADDRLEN + 1];
  61. u8 *cp;
  62. ssize_t status;
  63. struct spi_transfer t[2];
  64. struct spi_message m;
  65. if (unlikely(offset >= at25->bin.size))
  66. return 0;
  67. if ((offset + count) > at25->bin.size)
  68. count = at25->bin.size - offset;
  69. if (unlikely(!count))
  70. return count;
  71. cp = command;
  72. *cp++ = AT25_READ;
  73. /* 8/16/24-bit address is written MSB first */
  74. switch (at25->addrlen) {
  75. default: /* case 3 */
  76. *cp++ = offset >> 16;
  77. case 2:
  78. *cp++ = offset >> 8;
  79. case 1:
  80. case 0: /* can't happen: for better codegen */
  81. *cp++ = offset >> 0;
  82. }
  83. spi_message_init(&m);
  84. memset(t, 0, sizeof t);
  85. t[0].tx_buf = command;
  86. t[0].len = at25->addrlen + 1;
  87. spi_message_add_tail(&t[0], &m);
  88. t[1].rx_buf = buf;
  89. t[1].len = count;
  90. spi_message_add_tail(&t[1], &m);
  91. mutex_lock(&at25->lock);
  92. /* Read it all at once.
  93. *
  94. * REVISIT that's potentially a problem with large chips, if
  95. * other devices on the bus need to be accessed regularly or
  96. * this chip is clocked very slowly
  97. */
  98. status = spi_sync(at25->spi, &m);
  99. dev_dbg(&at25->spi->dev,
  100. "read %Zd bytes at %d --> %d\n",
  101. count, offset, (int) status);
  102. mutex_unlock(&at25->lock);
  103. return status ? status : count;
  104. }
  105. static ssize_t
  106. at25_bin_read(struct file *filp, struct kobject *kobj,
  107. struct bin_attribute *bin_attr,
  108. char *buf, loff_t off, size_t count)
  109. {
  110. struct device *dev;
  111. struct at25_data *at25;
  112. dev = container_of(kobj, struct device, kobj);
  113. at25 = dev_get_drvdata(dev);
  114. return at25_ee_read(at25, buf, off, count);
  115. }
  116. static ssize_t
  117. at25_ee_write(struct at25_data *at25, const char *buf, loff_t off,
  118. size_t count)
  119. {
  120. ssize_t status = 0;
  121. unsigned written = 0;
  122. unsigned buf_size;
  123. u8 *bounce;
  124. if (unlikely(off >= at25->bin.size))
  125. return -EFBIG;
  126. if ((off + count) > at25->bin.size)
  127. count = at25->bin.size - off;
  128. if (unlikely(!count))
  129. return count;
  130. /* Temp buffer starts with command and address */
  131. buf_size = at25->chip.page_size;
  132. if (buf_size > io_limit)
  133. buf_size = io_limit;
  134. bounce = kmalloc(buf_size + at25->addrlen + 1, GFP_KERNEL);
  135. if (!bounce)
  136. return -ENOMEM;
  137. /* For write, rollover is within the page ... so we write at
  138. * most one page, then manually roll over to the next page.
  139. */
  140. bounce[0] = AT25_WRITE;
  141. mutex_lock(&at25->lock);
  142. do {
  143. unsigned long timeout, retries;
  144. unsigned segment;
  145. unsigned offset = (unsigned) off;
  146. u8 *cp = bounce + 1;
  147. int sr;
  148. *cp = AT25_WREN;
  149. status = spi_write(at25->spi, cp, 1);
  150. if (status < 0) {
  151. dev_dbg(&at25->spi->dev, "WREN --> %d\n",
  152. (int) status);
  153. break;
  154. }
  155. /* 8/16/24-bit address is written MSB first */
  156. switch (at25->addrlen) {
  157. default: /* case 3 */
  158. *cp++ = offset >> 16;
  159. case 2:
  160. *cp++ = offset >> 8;
  161. case 1:
  162. case 0: /* can't happen: for better codegen */
  163. *cp++ = offset >> 0;
  164. }
  165. /* Write as much of a page as we can */
  166. segment = buf_size - (offset % buf_size);
  167. if (segment > count)
  168. segment = count;
  169. memcpy(cp, buf, segment);
  170. status = spi_write(at25->spi, bounce,
  171. segment + at25->addrlen + 1);
  172. dev_dbg(&at25->spi->dev,
  173. "write %u bytes at %u --> %d\n",
  174. segment, offset, (int) status);
  175. if (status < 0)
  176. break;
  177. /* REVISIT this should detect (or prevent) failed writes
  178. * to readonly sections of the EEPROM...
  179. */
  180. /* Wait for non-busy status */
  181. timeout = jiffies + msecs_to_jiffies(EE_TIMEOUT);
  182. retries = 0;
  183. do {
  184. sr = spi_w8r8(at25->spi, AT25_RDSR);
  185. if (sr < 0 || (sr & AT25_SR_nRDY)) {
  186. dev_dbg(&at25->spi->dev,
  187. "rdsr --> %d (%02x)\n", sr, sr);
  188. /* at HZ=100, this is sloooow */
  189. msleep(1);
  190. continue;
  191. }
  192. if (!(sr & AT25_SR_nRDY))
  193. break;
  194. } while (retries++ < 3 || time_before_eq(jiffies, timeout));
  195. if ((sr < 0) || (sr & AT25_SR_nRDY)) {
  196. dev_err(&at25->spi->dev,
  197. "write %d bytes offset %d, "
  198. "timeout after %u msecs\n",
  199. segment, offset,
  200. jiffies_to_msecs(jiffies -
  201. (timeout - EE_TIMEOUT)));
  202. status = -ETIMEDOUT;
  203. break;
  204. }
  205. off += segment;
  206. buf += segment;
  207. count -= segment;
  208. written += segment;
  209. } while (count > 0);
  210. mutex_unlock(&at25->lock);
  211. kfree(bounce);
  212. return written ? written : status;
  213. }
  214. static ssize_t
  215. at25_bin_write(struct file *filp, struct kobject *kobj,
  216. struct bin_attribute *bin_attr,
  217. char *buf, loff_t off, size_t count)
  218. {
  219. struct device *dev;
  220. struct at25_data *at25;
  221. dev = container_of(kobj, struct device, kobj);
  222. at25 = dev_get_drvdata(dev);
  223. return at25_ee_write(at25, buf, off, count);
  224. }
  225. /*-------------------------------------------------------------------------*/
  226. /* Let in-kernel code access the eeprom data. */
  227. static ssize_t at25_mem_read(struct memory_accessor *mem, char *buf,
  228. off_t offset, size_t count)
  229. {
  230. struct at25_data *at25 = container_of(mem, struct at25_data, mem);
  231. return at25_ee_read(at25, buf, offset, count);
  232. }
  233. static ssize_t at25_mem_write(struct memory_accessor *mem, const char *buf,
  234. off_t offset, size_t count)
  235. {
  236. struct at25_data *at25 = container_of(mem, struct at25_data, mem);
  237. return at25_ee_write(at25, buf, offset, count);
  238. }
  239. /*-------------------------------------------------------------------------*/
  240. static int at25_probe(struct spi_device *spi)
  241. {
  242. struct at25_data *at25 = NULL;
  243. const struct spi_eeprom *chip;
  244. int err;
  245. int sr;
  246. int addrlen;
  247. /* Chip description */
  248. chip = spi->dev.platform_data;
  249. if (!chip) {
  250. dev_dbg(&spi->dev, "no chip description\n");
  251. err = -ENODEV;
  252. goto fail;
  253. }
  254. /* For now we only support 8/16/24 bit addressing */
  255. if (chip->flags & EE_ADDR1)
  256. addrlen = 1;
  257. else if (chip->flags & EE_ADDR2)
  258. addrlen = 2;
  259. else if (chip->flags & EE_ADDR3)
  260. addrlen = 3;
  261. else {
  262. dev_dbg(&spi->dev, "unsupported address type\n");
  263. err = -EINVAL;
  264. goto fail;
  265. }
  266. /* Ping the chip ... the status register is pretty portable,
  267. * unlike probing manufacturer IDs. We do expect that system
  268. * firmware didn't write it in the past few milliseconds!
  269. */
  270. sr = spi_w8r8(spi, AT25_RDSR);
  271. if (sr < 0 || sr & AT25_SR_nRDY) {
  272. dev_dbg(&spi->dev, "rdsr --> %d (%02x)\n", sr, sr);
  273. err = -ENXIO;
  274. goto fail;
  275. }
  276. if (!(at25 = kzalloc(sizeof *at25, GFP_KERNEL))) {
  277. err = -ENOMEM;
  278. goto fail;
  279. }
  280. mutex_init(&at25->lock);
  281. at25->chip = *chip;
  282. at25->spi = spi_dev_get(spi);
  283. dev_set_drvdata(&spi->dev, at25);
  284. at25->addrlen = addrlen;
  285. /* Export the EEPROM bytes through sysfs, since that's convenient.
  286. * And maybe to other kernel code; it might hold a board's Ethernet
  287. * address, or board-specific calibration data generated on the
  288. * manufacturing floor.
  289. *
  290. * Default to root-only access to the data; EEPROMs often hold data
  291. * that's sensitive for read and/or write, like ethernet addresses,
  292. * security codes, board-specific manufacturing calibrations, etc.
  293. */
  294. sysfs_bin_attr_init(&at25->bin);
  295. at25->bin.attr.name = "eeprom";
  296. at25->bin.attr.mode = S_IRUSR;
  297. at25->bin.read = at25_bin_read;
  298. at25->mem.read = at25_mem_read;
  299. at25->bin.size = at25->chip.byte_len;
  300. if (!(chip->flags & EE_READONLY)) {
  301. at25->bin.write = at25_bin_write;
  302. at25->bin.attr.mode |= S_IWUSR;
  303. at25->mem.write = at25_mem_write;
  304. }
  305. err = sysfs_create_bin_file(&spi->dev.kobj, &at25->bin);
  306. if (err)
  307. goto fail;
  308. if (chip->setup)
  309. chip->setup(&at25->mem, chip->context);
  310. dev_info(&spi->dev, "%Zd %s %s eeprom%s, pagesize %u\n",
  311. (at25->bin.size < 1024)
  312. ? at25->bin.size
  313. : (at25->bin.size / 1024),
  314. (at25->bin.size < 1024) ? "Byte" : "KByte",
  315. at25->chip.name,
  316. (chip->flags & EE_READONLY) ? " (readonly)" : "",
  317. at25->chip.page_size);
  318. return 0;
  319. fail:
  320. dev_dbg(&spi->dev, "probe err %d\n", err);
  321. kfree(at25);
  322. return err;
  323. }
  324. static int __devexit at25_remove(struct spi_device *spi)
  325. {
  326. struct at25_data *at25;
  327. at25 = dev_get_drvdata(&spi->dev);
  328. sysfs_remove_bin_file(&spi->dev.kobj, &at25->bin);
  329. kfree(at25);
  330. return 0;
  331. }
  332. /*-------------------------------------------------------------------------*/
  333. static struct spi_driver at25_driver = {
  334. .driver = {
  335. .name = "at25",
  336. .owner = THIS_MODULE,
  337. },
  338. .probe = at25_probe,
  339. .remove = __devexit_p(at25_remove),
  340. };
  341. module_spi_driver(at25_driver);
  342. MODULE_DESCRIPTION("Driver for most SPI EEPROMs");
  343. MODULE_AUTHOR("David Brownell");
  344. MODULE_LICENSE("GPL");
  345. MODULE_ALIAS("spi:at25");