pm8xxx-batt-alarm.c 21 KB

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  1. /* Copyright (c) 2011, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. /*
  13. * Qualcomm PMIC PM8xxx Battery Alarm driver
  14. *
  15. */
  16. #define pr_fmt(fmt) "%s: " fmt, __func__
  17. #include <linux/err.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/module.h>
  20. #include <linux/notifier.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/slab.h>
  23. #include <linux/mfd/pm8xxx/core.h>
  24. #include <linux/mfd/pm8xxx/batt-alarm.h>
  25. /* Available voltage threshold values */
  26. #define THRESHOLD_MIN_MV 2500
  27. #define THRESHOLD_MAX_MV 5675
  28. #define THRESHOLD_STEP_MV 25
  29. /* Register bit definitions */
  30. /* Threshold register */
  31. #define THRESHOLD_UPPER_MASK 0xF0
  32. #define THRESHOLD_LOWER_MASK 0x0F
  33. #define THRESHOLD_UPPER_SHIFT 4
  34. #define THRESHOLD_LOWER_SHIFT 0
  35. /* CTRL 1 register */
  36. #define CTRL1_BATT_ALARM_ENABLE_MASK 0x80
  37. #define CTRL1_BATT_ALARM_ENABLE 0x80
  38. #define CTRL1_BATT_ALARM_DISABLE 0x00
  39. #define CTRL1_HOLD_TIME_MASK 0x70
  40. #define CTRL1_STATUS_UPPER_MASK 0x02
  41. #define CTRL1_STATUS_LOWER_MASK 0x01
  42. #define CTRL1_HOLD_TIME_SHIFT 4
  43. #define CTRL1_HOLD_TIME_MIN 0
  44. #define CTRL1_HOLD_TIME_MAX 7
  45. /* CTRL 2 register */
  46. #define CTRL2_COMP_UPPER_DISABLE_MASK 0x80
  47. #define CTRL2_COMP_UPPER_ENABLE 0x00
  48. #define CTRL2_COMP_UPPER_DISABLE 0x80
  49. #define CTRL2_COMP_LOWER_DISABLE_MASK 0x40
  50. #define CTRL2_COMP_LOWER_ENABLE 0x00
  51. #define CTRL2_COMP_LOWER_DISABLE 0x40
  52. #define CTRL2_FINE_STEP_UPPER_MASK 0x30
  53. #define CTRL2_RANGE_EXT_UPPER_MASK 0x08
  54. #define CTRL2_FINE_STEP_LOWER_MASK 0x06
  55. #define CTRL2_RANGE_EXT_LOWER_MASK 0x01
  56. #define CTRL2_FINE_STEP_UPPER_SHIFT 4
  57. #define CTRL2_FINE_STEP_LOWER_SHIFT 1
  58. /* PWM control register */
  59. #define PWM_CTRL_ALARM_EN_MASK 0xC0
  60. #define PWM_CTRL_ALARM_EN_NEVER 0x00
  61. #define PWM_CTRL_ALARM_EN_TCXO 0x40
  62. #define PWM_CTRL_ALARM_EN_PWM 0x80
  63. #define PWM_CTRL_ALARM_EN_ALWAYS 0xC0
  64. #define PWM_CTRL_PRE_MASK 0x38
  65. #define PWM_CTRL_DIV_MASK 0x07
  66. #define PWM_CTRL_PRE_SHIFT 3
  67. #define PWM_CTRL_DIV_SHIFT 0
  68. #define PWM_CTRL_PRE_MIN 0
  69. #define PWM_CTRL_PRE_MAX 7
  70. #define PWM_CTRL_DIV_MIN 1
  71. #define PWM_CTRL_DIV_MAX 7
  72. /* PWM control input range */
  73. #define PWM_CTRL_PRE_INPUT_MIN 2
  74. #define PWM_CTRL_PRE_INPUT_MAX 9
  75. #define PWM_CTRL_DIV_INPUT_MIN 2
  76. #define PWM_CTRL_DIV_INPUT_MAX 8
  77. /* Available voltage threshold values */
  78. #define THRESHOLD_BASIC_MIN_MV 2800
  79. #define THRESHOLD_EXT_MIN_MV 4400
  80. /*
  81. * Default values used during initialization:
  82. * Slowest PWM rate to ensure minimal status jittering when crossing thresholds.
  83. * Largest hold time also helps reduce status value jittering. Comparators
  84. * are disabled by default and must be turned on by calling
  85. * pm8xxx_batt_alarm_state_set.
  86. */
  87. #define DEFAULT_THRESHOLD_LOWER 3200
  88. #define DEFAULT_THRESHOLD_UPPER 4300
  89. #define DEFAULT_HOLD_TIME PM8XXX_BATT_ALARM_HOLD_TIME_16_MS
  90. #define DEFAULT_USE_PWM 1
  91. #define DEFAULT_PWM_SCALER 9
  92. #define DEFAULT_PWM_DIVIDER 8
  93. #define DEFAULT_LOWER_ENABLE 0
  94. #define DEFAULT_UPPER_ENABLE 0
  95. struct pm8xxx_batt_alarm_chip {
  96. struct pm8xxx_batt_alarm_core_data cdata;
  97. struct srcu_notifier_head irq_notifier_list;
  98. struct work_struct irq_work;
  99. struct device *dev;
  100. struct mutex lock;
  101. unsigned int irq;
  102. int notifier_count;
  103. u8 reg_threshold;
  104. u8 reg_ctrl1;
  105. u8 reg_ctrl2;
  106. u8 reg_pwm_ctrl;
  107. };
  108. static struct pm8xxx_batt_alarm_chip *the_battalarm;
  109. static int pm8xxx_reg_write(struct pm8xxx_batt_alarm_chip *chip, u16 addr,
  110. u8 val, u8 mask, u8 *reg_save)
  111. {
  112. int rc = 0;
  113. u8 reg;
  114. reg = (*reg_save & ~mask) | (val & mask);
  115. if (reg != *reg_save)
  116. rc = pm8xxx_writeb(chip->dev->parent, addr, reg);
  117. if (rc)
  118. pr_err("pm8xxx_writeb failed; addr=%03X, rc=%d\n", addr, rc);
  119. else
  120. *reg_save = reg;
  121. return rc;
  122. }
  123. /**
  124. * pm8xxx_batt_alarm_enable - enable one of the battery voltage threshold
  125. * comparators
  126. * @comparator: selects which comparator to enable
  127. *
  128. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  129. */
  130. int pm8xxx_batt_alarm_enable(enum pm8xxx_batt_alarm_comparator comparator)
  131. {
  132. struct pm8xxx_batt_alarm_chip *chip = the_battalarm;
  133. int rc;
  134. u8 val_ctrl2 = 0, mask_ctrl2 = 0;
  135. if (!chip) {
  136. pr_err("no battery alarm device found.\n");
  137. return -ENODEV;
  138. }
  139. if (comparator < 0 || comparator > PM8XXX_BATT_ALARM_UPPER_COMPARATOR) {
  140. pr_err("invalid comparator ID number: %d\n", comparator);
  141. return -EINVAL;
  142. }
  143. if (comparator == PM8XXX_BATT_ALARM_LOWER_COMPARATOR) {
  144. val_ctrl2 = CTRL2_COMP_LOWER_ENABLE;
  145. mask_ctrl2 = CTRL2_COMP_LOWER_DISABLE_MASK;
  146. } else {
  147. val_ctrl2 = CTRL2_COMP_UPPER_ENABLE;
  148. mask_ctrl2 = CTRL2_COMP_UPPER_DISABLE_MASK;
  149. }
  150. mutex_lock(&chip->lock);
  151. /* Enable the battery alarm block. */
  152. rc = pm8xxx_reg_write(chip, chip->cdata.reg_addr_ctrl1,
  153. CTRL1_BATT_ALARM_ENABLE,
  154. CTRL1_BATT_ALARM_ENABLE_MASK, &chip->reg_ctrl1);
  155. if (rc)
  156. goto bail;
  157. /* Enable the individual comparators. */
  158. rc = pm8xxx_reg_write(chip, chip->cdata.reg_addr_ctrl2, val_ctrl2,
  159. mask_ctrl2, &chip->reg_ctrl2);
  160. bail:
  161. mutex_unlock(&chip->lock);
  162. return rc;
  163. }
  164. EXPORT_SYMBOL(pm8xxx_batt_alarm_enable);
  165. /**
  166. * pm8xxx_batt_alarm_disable - disable one of the battery voltage threshold
  167. * comparators
  168. * @comparator: selects which comparator to disable
  169. *
  170. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  171. */
  172. int pm8xxx_batt_alarm_disable(enum pm8xxx_batt_alarm_comparator comparator)
  173. {
  174. struct pm8xxx_batt_alarm_chip *chip = the_battalarm;
  175. int rc;
  176. u8 val_ctrl1 = 0, val_ctrl2 = 0, mask_ctrl2 = 0;
  177. if (!chip) {
  178. pr_err("no battery alarm device found.\n");
  179. return -ENODEV;
  180. }
  181. if (comparator < 0 || comparator > PM8XXX_BATT_ALARM_UPPER_COMPARATOR) {
  182. pr_err("invalid comparator ID number: %d\n", comparator);
  183. return -EINVAL;
  184. }
  185. if (comparator == PM8XXX_BATT_ALARM_LOWER_COMPARATOR) {
  186. val_ctrl2 = CTRL2_COMP_LOWER_DISABLE;
  187. mask_ctrl2 = CTRL2_COMP_LOWER_DISABLE_MASK;
  188. } else {
  189. val_ctrl2 = CTRL2_COMP_UPPER_DISABLE;
  190. mask_ctrl2 = CTRL2_COMP_UPPER_DISABLE_MASK;
  191. }
  192. mutex_lock(&chip->lock);
  193. /* Disable the specified comparator. */
  194. rc = pm8xxx_reg_write(chip, chip->cdata.reg_addr_ctrl2, val_ctrl2,
  195. mask_ctrl2, &chip->reg_ctrl2);
  196. if (rc)
  197. goto bail;
  198. /* Disable the battery alarm block if both comparators are disabled. */
  199. val_ctrl2 = chip->reg_ctrl2
  200. & (CTRL2_COMP_LOWER_DISABLE_MASK | CTRL2_COMP_UPPER_DISABLE_MASK);
  201. if (val_ctrl2 == (CTRL2_COMP_LOWER_DISABLE | CTRL2_COMP_UPPER_DISABLE))
  202. val_ctrl1 = CTRL1_BATT_ALARM_DISABLE;
  203. else
  204. val_ctrl1 = CTRL1_BATT_ALARM_ENABLE;
  205. rc = pm8xxx_reg_write(chip, chip->cdata.reg_addr_ctrl1, val_ctrl1,
  206. CTRL1_BATT_ALARM_ENABLE_MASK, &chip->reg_ctrl1);
  207. bail:
  208. mutex_unlock(&chip->lock);
  209. return rc;
  210. }
  211. EXPORT_SYMBOL(pm8xxx_batt_alarm_disable);
  212. /**
  213. * pm8xxx_batt_alarm_threshold_set - set the lower and upper alarm thresholds
  214. * @comparator: selects which comparator to set the threshold of
  215. * @threshold_mV: battery voltage threshold in millivolts
  216. * set points = 2500-5675 mV in 25 mV steps
  217. *
  218. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  219. */
  220. int pm8xxx_batt_alarm_threshold_set(
  221. enum pm8xxx_batt_alarm_comparator comparator, int threshold_mV)
  222. {
  223. struct pm8xxx_batt_alarm_chip *chip = the_battalarm;
  224. int step, fine_step, rc;
  225. u8 val_threshold = 0, val_ctrl2 = 0;
  226. int threshold_mask, threshold_shift, range_ext_mask, fine_step_mask;
  227. int fine_step_shift;
  228. if (!chip) {
  229. pr_err("no battery alarm device found.\n");
  230. return -ENXIO;
  231. }
  232. if (comparator < 0 || comparator > PM8XXX_BATT_ALARM_UPPER_COMPARATOR) {
  233. pr_err("invalid comparator ID number: %d\n", comparator);
  234. return -EINVAL;
  235. }
  236. if (threshold_mV < THRESHOLD_MIN_MV
  237. || threshold_mV > THRESHOLD_MAX_MV) {
  238. pr_err("threshold value, %d mV, is outside of allowable "
  239. "range: [%d, %d] mV\n", threshold_mV,
  240. THRESHOLD_MIN_MV, THRESHOLD_MAX_MV);
  241. return -EINVAL;
  242. }
  243. if (comparator == PM8XXX_BATT_ALARM_LOWER_COMPARATOR) {
  244. threshold_mask = THRESHOLD_LOWER_MASK;
  245. threshold_shift = THRESHOLD_LOWER_SHIFT;
  246. range_ext_mask = CTRL2_RANGE_EXT_LOWER_MASK;
  247. fine_step_mask = CTRL2_FINE_STEP_LOWER_MASK;
  248. fine_step_shift = CTRL2_FINE_STEP_LOWER_SHIFT;
  249. } else {
  250. threshold_mask = THRESHOLD_UPPER_MASK;
  251. threshold_shift = THRESHOLD_UPPER_SHIFT;
  252. range_ext_mask = CTRL2_RANGE_EXT_UPPER_MASK;
  253. fine_step_mask = CTRL2_FINE_STEP_UPPER_MASK;
  254. fine_step_shift = CTRL2_FINE_STEP_UPPER_SHIFT;
  255. }
  256. /* Determine register settings to achieve the threshold. */
  257. if (threshold_mV < THRESHOLD_BASIC_MIN_MV) {
  258. /* Extended low range */
  259. val_ctrl2 |= range_ext_mask;
  260. step = (threshold_mV - THRESHOLD_MIN_MV) / THRESHOLD_STEP_MV;
  261. fine_step = step & 0x3;
  262. /* Extended low range is for steps 0 to 2 */
  263. step >>= 2;
  264. } else if (threshold_mV >= THRESHOLD_EXT_MIN_MV) {
  265. /* Extended high range */
  266. val_ctrl2 |= range_ext_mask;
  267. step = (threshold_mV - THRESHOLD_EXT_MIN_MV)
  268. / THRESHOLD_STEP_MV;
  269. fine_step = step & 0x3;
  270. /* Extended high range is for steps 3 to 15 */
  271. step = (step >> 2) + 3;
  272. } else {
  273. /* Basic range */
  274. step = (threshold_mV - THRESHOLD_BASIC_MIN_MV)
  275. / THRESHOLD_STEP_MV;
  276. fine_step = step & 0x3;
  277. step >>= 2;
  278. }
  279. val_threshold |= step << threshold_shift;
  280. val_ctrl2 |= (fine_step << fine_step_shift) & fine_step_mask;
  281. mutex_lock(&chip->lock);
  282. rc = pm8xxx_reg_write(chip, chip->cdata.reg_addr_threshold,
  283. val_threshold, threshold_mask, &chip->reg_threshold);
  284. if (rc)
  285. goto bail;
  286. rc = pm8xxx_reg_write(chip, chip->cdata.reg_addr_ctrl2, val_ctrl2,
  287. range_ext_mask | fine_step_mask, &chip->reg_ctrl2);
  288. bail:
  289. mutex_unlock(&chip->lock);
  290. return rc;
  291. }
  292. EXPORT_SYMBOL(pm8xxx_batt_alarm_threshold_set);
  293. /**
  294. * pm8xxx_batt_alarm_status_read - get status of both threshold comparators
  295. *
  296. * RETURNS: < 0 = error
  297. * 0 = battery voltage ok
  298. * BIT(0) set = battery voltage below lower threshold
  299. * BIT(1) set = battery voltage above upper threshold
  300. */
  301. int pm8xxx_batt_alarm_status_read(void)
  302. {
  303. struct pm8xxx_batt_alarm_chip *chip = the_battalarm;
  304. int status, rc;
  305. if (!chip) {
  306. pr_err("no battery alarm device found.\n");
  307. return -ENXIO;
  308. }
  309. mutex_lock(&chip->lock);
  310. rc = pm8xxx_readb(chip->dev->parent, chip->cdata.reg_addr_ctrl1,
  311. &chip->reg_ctrl1);
  312. status = ((chip->reg_ctrl1 & CTRL1_STATUS_LOWER_MASK)
  313. ? PM8XXX_BATT_ALARM_STATUS_BELOW_LOWER : 0)
  314. | ((chip->reg_ctrl1 & CTRL1_STATUS_UPPER_MASK)
  315. ? PM8XXX_BATT_ALARM_STATUS_ABOVE_UPPER : 0);
  316. mutex_unlock(&chip->lock);
  317. if (rc) {
  318. pr_err("pm8xxx_readb failed, rc=%d\n", rc);
  319. return rc;
  320. }
  321. return status;
  322. }
  323. EXPORT_SYMBOL(pm8xxx_batt_alarm_status_read);
  324. /**
  325. * pm8xxx_batt_alarm_hold_time_set - set hold time of interrupt output *
  326. * @hold_time: amount of time that battery voltage must remain outside of the
  327. * threshold range before the battery alarm interrupt triggers
  328. *
  329. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  330. */
  331. int pm8xxx_batt_alarm_hold_time_set(enum pm8xxx_batt_alarm_hold_time hold_time)
  332. {
  333. struct pm8xxx_batt_alarm_chip *chip = the_battalarm;
  334. int rc;
  335. u8 reg_ctrl1 = 0;
  336. if (!chip) {
  337. pr_err("no battery alarm device found.\n");
  338. return -ENXIO;
  339. }
  340. if (hold_time < CTRL1_HOLD_TIME_MIN
  341. || hold_time > CTRL1_HOLD_TIME_MAX) {
  342. pr_err("hold time, %d, is outside of allowable range: "
  343. "[%d, %d]\n", hold_time, CTRL1_HOLD_TIME_MIN,
  344. CTRL1_HOLD_TIME_MAX);
  345. return -EINVAL;
  346. }
  347. reg_ctrl1 = hold_time << CTRL1_HOLD_TIME_SHIFT;
  348. mutex_lock(&chip->lock);
  349. rc = pm8xxx_reg_write(chip, chip->cdata.reg_addr_ctrl1, reg_ctrl1,
  350. CTRL1_HOLD_TIME_MASK, &chip->reg_ctrl1);
  351. mutex_unlock(&chip->lock);
  352. return rc;
  353. }
  354. EXPORT_SYMBOL(pm8xxx_batt_alarm_hold_time_set);
  355. /**
  356. * pm8xxx_batt_alarm_pwm_rate_set - set battery alarm update rate *
  357. * @use_pwm: 1 = use PWM update rate, 0 = comparators always active
  358. * @clock_scaler: PWM clock scaler = 2 to 9
  359. * @clock_divider: PWM clock divider = 2 to 8
  360. *
  361. * This function sets the rate at which the battery alarm module enables
  362. * the threshold comparators. The rate is determined by the following equation:
  363. *
  364. * f_update = (1024 Hz) / (clock_divider * (2 ^ clock_scaler))
  365. *
  366. * Thus, the update rate can range from 0.25 Hz to 128 Hz.
  367. *
  368. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  369. */
  370. int pm8xxx_batt_alarm_pwm_rate_set(int use_pwm, int clock_scaler,
  371. int clock_divider)
  372. {
  373. struct pm8xxx_batt_alarm_chip *chip = the_battalarm;
  374. int rc;
  375. u8 reg_pwm_ctrl = 0, mask = 0;
  376. if (!chip) {
  377. pr_err("no battery alarm device found.\n");
  378. return -ENXIO;
  379. }
  380. if (use_pwm && (clock_scaler < PWM_CTRL_PRE_INPUT_MIN
  381. || clock_scaler > PWM_CTRL_PRE_INPUT_MAX)) {
  382. pr_err("PWM clock scaler, %d, is outside of allowable range: "
  383. "[%d, %d]\n", clock_scaler, PWM_CTRL_PRE_INPUT_MIN,
  384. PWM_CTRL_PRE_INPUT_MAX);
  385. return -EINVAL;
  386. }
  387. if (use_pwm && (clock_divider < PWM_CTRL_DIV_INPUT_MIN
  388. || clock_divider > PWM_CTRL_DIV_INPUT_MAX)) {
  389. pr_err("PWM clock divider, %d, is outside of allowable range: "
  390. "[%d, %d]\n", clock_divider, PWM_CTRL_DIV_INPUT_MIN,
  391. PWM_CTRL_DIV_INPUT_MAX);
  392. return -EINVAL;
  393. }
  394. if (!use_pwm) {
  395. /* Turn off PWM control and always enable. */
  396. reg_pwm_ctrl = PWM_CTRL_ALARM_EN_ALWAYS;
  397. mask = PWM_CTRL_ALARM_EN_MASK;
  398. } else {
  399. /* Use PWM control. */
  400. reg_pwm_ctrl = PWM_CTRL_ALARM_EN_PWM;
  401. mask = PWM_CTRL_ALARM_EN_MASK | PWM_CTRL_PRE_MASK
  402. | PWM_CTRL_DIV_MASK;
  403. clock_scaler -= PWM_CTRL_PRE_INPUT_MIN - PWM_CTRL_PRE_MIN;
  404. clock_divider -= PWM_CTRL_DIV_INPUT_MIN - PWM_CTRL_DIV_MIN;
  405. reg_pwm_ctrl |= (clock_scaler << PWM_CTRL_PRE_SHIFT)
  406. & PWM_CTRL_PRE_MASK;
  407. reg_pwm_ctrl |= (clock_divider << PWM_CTRL_DIV_SHIFT)
  408. & PWM_CTRL_DIV_MASK;
  409. }
  410. mutex_lock(&chip->lock);
  411. rc = pm8xxx_reg_write(chip, chip->cdata.reg_addr_pwm_ctrl, reg_pwm_ctrl,
  412. mask, &chip->reg_pwm_ctrl);
  413. mutex_unlock(&chip->lock);
  414. return rc;
  415. }
  416. EXPORT_SYMBOL(pm8xxx_batt_alarm_pwm_rate_set);
  417. /*
  418. * Handle the BATT_ALARM interrupt:
  419. * Battery voltage is above or below threshold range.
  420. */
  421. static irqreturn_t pm8xxx_batt_alarm_isr(int irq, void *data)
  422. {
  423. struct pm8xxx_batt_alarm_chip *chip = data;
  424. disable_irq_nosync(chip->irq);
  425. schedule_work(&chip->irq_work);
  426. return IRQ_HANDLED;
  427. }
  428. static void pm8xxx_batt_alarm_isr_work(struct work_struct *work)
  429. {
  430. struct pm8xxx_batt_alarm_chip *chip
  431. = container_of(work, struct pm8xxx_batt_alarm_chip, irq_work);
  432. int status;
  433. if (!chip)
  434. return;
  435. status = pm8xxx_batt_alarm_status_read();
  436. if (status < 0)
  437. pr_err("failed to read status, rc=%d\n", status);
  438. else
  439. srcu_notifier_call_chain(&chip->irq_notifier_list,
  440. status, NULL);
  441. enable_irq(chip->irq);
  442. }
  443. /**
  444. * pm8xxx_batt_alarm_register_notifier - register a notifier to run when a
  445. * battery voltage change interrupt fires
  446. * @nb: notifier block containing callback function to register
  447. *
  448. * nb->notifier_call must point to a function of this form -
  449. * int (*notifier_call)(struct notifier_block *nb, unsigned long status,
  450. * void *unused);
  451. * "status" will receive the battery alarm status; "unused" will be NULL.
  452. *
  453. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  454. */
  455. int pm8xxx_batt_alarm_register_notifier(struct notifier_block *nb)
  456. {
  457. struct pm8xxx_batt_alarm_chip *chip = the_battalarm;
  458. int rc;
  459. if (!chip) {
  460. pr_err("no battery alarm device found.\n");
  461. return -ENXIO;
  462. }
  463. rc = srcu_notifier_chain_register(&chip->irq_notifier_list, nb);
  464. mutex_lock(&chip->lock);
  465. if (rc == 0) {
  466. if (chip->notifier_count == 0) {
  467. enable_irq(chip->irq);
  468. rc = irq_set_irq_wake(chip->irq, 1);
  469. }
  470. chip->notifier_count++;
  471. }
  472. mutex_unlock(&chip->lock);
  473. return rc;
  474. }
  475. EXPORT_SYMBOL(pm8xxx_batt_alarm_register_notifier);
  476. /**
  477. * pm8xxx_batt_alarm_unregister_notifier - unregister a notifier that is run
  478. * when a battery voltage change interrupt fires
  479. * @nb: notifier block containing callback function to unregister
  480. *
  481. * RETURNS: an appropriate -ERRNO error value on error, or zero for success.
  482. */
  483. int pm8xxx_batt_alarm_unregister_notifier(struct notifier_block *nb)
  484. {
  485. struct pm8xxx_batt_alarm_chip *chip = the_battalarm;
  486. int rc;
  487. if (!chip) {
  488. pr_err("no battery alarm device found.\n");
  489. return -ENXIO;
  490. }
  491. rc = srcu_notifier_chain_unregister(&chip->irq_notifier_list, nb);
  492. if (rc == 0) {
  493. mutex_lock(&chip->lock);
  494. chip->notifier_count--;
  495. if (chip->notifier_count == 0) {
  496. rc = irq_set_irq_wake(chip->irq, 0);
  497. disable_irq(chip->irq);
  498. }
  499. WARN_ON(chip->notifier_count < 0);
  500. mutex_unlock(&chip->lock);
  501. }
  502. return rc;
  503. }
  504. EXPORT_SYMBOL(pm8xxx_batt_alarm_unregister_notifier);
  505. static int pm8xxx_batt_alarm_reg_init(struct pm8xxx_batt_alarm_chip *chip)
  506. {
  507. int rc = 0;
  508. /* save the current register states */
  509. rc = pm8xxx_readb(chip->dev->parent, chip->cdata.reg_addr_threshold,
  510. &chip->reg_threshold);
  511. if (rc)
  512. goto bail;
  513. rc = pm8xxx_readb(chip->dev->parent, chip->cdata.reg_addr_ctrl1,
  514. &chip->reg_ctrl1);
  515. if (rc)
  516. goto bail;
  517. rc = pm8xxx_readb(chip->dev->parent, chip->cdata.reg_addr_ctrl2,
  518. &chip->reg_ctrl2);
  519. if (rc)
  520. goto bail;
  521. rc = pm8xxx_readb(chip->dev->parent, chip->cdata.reg_addr_pwm_ctrl,
  522. &chip->reg_pwm_ctrl);
  523. if (rc)
  524. goto bail;
  525. bail:
  526. if (rc)
  527. pr_err("pm8xxx_readb failed; initial register states "
  528. "unknown, rc=%d\n", rc);
  529. return rc;
  530. }
  531. /* TODO: should this default setting function be removed? */
  532. static int pm8xxx_batt_alarm_config_defaults(void)
  533. {
  534. int rc = 0;
  535. /* Use default values when no platform data is provided. */
  536. rc = pm8xxx_batt_alarm_threshold_set(PM8XXX_BATT_ALARM_LOWER_COMPARATOR,
  537. DEFAULT_THRESHOLD_LOWER);
  538. if (rc) {
  539. pr_err("threshold_set failed, rc=%d\n", rc);
  540. goto done;
  541. }
  542. rc = pm8xxx_batt_alarm_threshold_set(PM8XXX_BATT_ALARM_UPPER_COMPARATOR,
  543. DEFAULT_THRESHOLD_UPPER);
  544. if (rc) {
  545. pr_err("threshold_set failed, rc=%d\n", rc);
  546. goto done;
  547. }
  548. rc = pm8xxx_batt_alarm_hold_time_set(DEFAULT_HOLD_TIME);
  549. if (rc) {
  550. pr_err("hold_time_set failed, rc=%d\n", rc);
  551. goto done;
  552. }
  553. rc = pm8xxx_batt_alarm_pwm_rate_set(DEFAULT_USE_PWM,
  554. DEFAULT_PWM_SCALER, DEFAULT_PWM_DIVIDER);
  555. if (rc) {
  556. pr_err("pwm_rate_set failed, rc=%d\n", rc);
  557. goto done;
  558. }
  559. rc = pm8xxx_batt_alarm_disable(PM8XXX_BATT_ALARM_LOWER_COMPARATOR);
  560. if (rc) {
  561. pr_err("disable lower failed, rc=%d\n", rc);
  562. goto done;
  563. }
  564. rc = pm8xxx_batt_alarm_disable(PM8XXX_BATT_ALARM_UPPER_COMPARATOR);
  565. if (rc) {
  566. pr_err("disable upper failed, rc=%d\n", rc);
  567. goto done;
  568. }
  569. done:
  570. return rc;
  571. }
  572. static int __devinit pm8xxx_batt_alarm_probe(struct platform_device *pdev)
  573. {
  574. const struct pm8xxx_batt_alarm_core_data *cdata
  575. = pdev->dev.platform_data;
  576. struct pm8xxx_batt_alarm_chip *chip;
  577. struct resource *res;
  578. int rc;
  579. if (the_battalarm) {
  580. pr_err("A PMIC battery alarm device has already probed.\n");
  581. return -ENODEV;
  582. }
  583. if (!cdata) {
  584. pr_err("missing core data\n");
  585. return -EINVAL;
  586. }
  587. if (!cdata->irq_name) {
  588. pr_err("missing IRQ name\n");
  589. return -EINVAL;
  590. }
  591. chip = kzalloc(sizeof(struct pm8xxx_batt_alarm_chip), GFP_KERNEL);
  592. if (chip == NULL) {
  593. pr_err("kzalloc() failed.\n");
  594. return -ENOMEM;
  595. }
  596. res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
  597. cdata->irq_name);
  598. if (res) {
  599. chip->irq = res->start;
  600. } else {
  601. pr_err("Battery alarm IRQ not specified\n");
  602. rc = -EINVAL;
  603. goto err_free_chip;
  604. }
  605. chip->dev = &pdev->dev;
  606. memcpy(&(chip->cdata), cdata,
  607. sizeof(struct pm8xxx_batt_alarm_core_data));
  608. srcu_init_notifier_head(&chip->irq_notifier_list);
  609. chip->notifier_count = 0;
  610. mutex_init(&chip->lock);
  611. the_battalarm = chip;
  612. rc = pm8xxx_batt_alarm_reg_init(chip);
  613. if (rc)
  614. goto err_free_mutex;
  615. rc = pm8xxx_batt_alarm_config_defaults();
  616. if (rc)
  617. goto err_free_mutex;
  618. INIT_WORK(&chip->irq_work, pm8xxx_batt_alarm_isr_work);
  619. /* TODO: Is it best to trigger on both edges? Should this be configurable? */
  620. rc = request_irq(chip->irq, pm8xxx_batt_alarm_isr,
  621. IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, cdata->irq_name,
  622. chip);
  623. if (rc < 0) {
  624. pr_err("request_irq(%d) failed, rc=%d\n", chip->irq, rc);
  625. goto err_cancel_work;
  626. }
  627. /* Disable the IRQ until a notifier is registered. */
  628. disable_irq(chip->irq);
  629. platform_set_drvdata(pdev, chip);
  630. return 0;
  631. err_cancel_work:
  632. cancel_work_sync(&chip->irq_work);
  633. err_free_mutex:
  634. mutex_destroy(&chip->lock);
  635. srcu_cleanup_notifier_head(&chip->irq_notifier_list);
  636. err_free_chip:
  637. kfree(chip);
  638. the_battalarm = NULL;
  639. return rc;
  640. }
  641. static int __devexit pm8xxx_batt_alarm_remove(struct platform_device *pdev)
  642. {
  643. struct pm8xxx_batt_alarm_chip *chip = platform_get_drvdata(pdev);
  644. if (chip) {
  645. platform_set_drvdata(pdev, NULL);
  646. irq_set_irq_wake(chip->irq, 0);
  647. free_irq(chip->irq, chip);
  648. cancel_work_sync(&chip->irq_work);
  649. srcu_cleanup_notifier_head(&chip->irq_notifier_list);
  650. mutex_destroy(&chip->lock);
  651. kfree(chip);
  652. the_battalarm = NULL;
  653. }
  654. return 0;
  655. }
  656. static struct platform_driver pm8xxx_batt_alarm_driver = {
  657. .probe = pm8xxx_batt_alarm_probe,
  658. .remove = __devexit_p(pm8xxx_batt_alarm_remove),
  659. .driver = {
  660. .name = PM8XXX_BATT_ALARM_DEV_NAME,
  661. .owner = THIS_MODULE,
  662. },
  663. };
  664. static int __init pm8xxx_batt_alarm_init(void)
  665. {
  666. return platform_driver_register(&pm8xxx_batt_alarm_driver);
  667. }
  668. static void __exit pm8xxx_batt_alarm_exit(void)
  669. {
  670. platform_driver_unregister(&pm8xxx_batt_alarm_driver);
  671. }
  672. module_init(pm8xxx_batt_alarm_init);
  673. module_exit(pm8xxx_batt_alarm_exit);
  674. MODULE_LICENSE("GPL v2");
  675. MODULE_DESCRIPTION("PMIC PM8xxx Battery Alarm");
  676. MODULE_VERSION("1.0");
  677. MODULE_ALIAS("platform:" PM8XXX_BATT_ALARM_DEV_NAME);