nes_verbs.c 124 KB

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  1. /*
  2. * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/module.h>
  34. #include <linux/moduleparam.h>
  35. #include <linux/random.h>
  36. #include <linux/highmem.h>
  37. #include <linux/slab.h>
  38. #include <asm/byteorder.h>
  39. #include <rdma/ib_verbs.h>
  40. #include <rdma/iw_cm.h>
  41. #include <rdma/ib_user_verbs.h>
  42. #include "nes.h"
  43. #include <rdma/ib_umem.h>
  44. atomic_t mod_qp_timouts;
  45. atomic_t qps_created;
  46. atomic_t sw_qps_destroyed;
  47. static void nes_unregister_ofa_device(struct nes_ib_device *nesibdev);
  48. /**
  49. * nes_alloc_mw
  50. */
  51. static struct ib_mw *nes_alloc_mw(struct ib_pd *ibpd) {
  52. struct nes_pd *nespd = to_nespd(ibpd);
  53. struct nes_vnic *nesvnic = to_nesvnic(ibpd->device);
  54. struct nes_device *nesdev = nesvnic->nesdev;
  55. struct nes_adapter *nesadapter = nesdev->nesadapter;
  56. struct nes_cqp_request *cqp_request;
  57. struct nes_mr *nesmr;
  58. struct ib_mw *ibmw;
  59. struct nes_hw_cqp_wqe *cqp_wqe;
  60. int ret;
  61. u32 stag;
  62. u32 stag_index = 0;
  63. u32 next_stag_index = 0;
  64. u32 driver_key = 0;
  65. u8 stag_key = 0;
  66. get_random_bytes(&next_stag_index, sizeof(next_stag_index));
  67. stag_key = (u8)next_stag_index;
  68. driver_key = 0;
  69. next_stag_index >>= 8;
  70. next_stag_index %= nesadapter->max_mr;
  71. ret = nes_alloc_resource(nesadapter, nesadapter->allocated_mrs,
  72. nesadapter->max_mr, &stag_index, &next_stag_index);
  73. if (ret) {
  74. return ERR_PTR(ret);
  75. }
  76. nesmr = kzalloc(sizeof(*nesmr), GFP_KERNEL);
  77. if (!nesmr) {
  78. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  79. return ERR_PTR(-ENOMEM);
  80. }
  81. stag = stag_index << 8;
  82. stag |= driver_key;
  83. stag += (u32)stag_key;
  84. nes_debug(NES_DBG_MR, "Registering STag 0x%08X, index = 0x%08X\n",
  85. stag, stag_index);
  86. /* Register the region with the adapter */
  87. cqp_request = nes_get_cqp_request(nesdev);
  88. if (cqp_request == NULL) {
  89. kfree(nesmr);
  90. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  91. return ERR_PTR(-ENOMEM);
  92. }
  93. cqp_request->waiting = 1;
  94. cqp_wqe = &cqp_request->cqp_wqe;
  95. cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] =
  96. cpu_to_le32( NES_CQP_ALLOCATE_STAG | NES_CQP_STAG_RIGHTS_REMOTE_READ |
  97. NES_CQP_STAG_RIGHTS_REMOTE_WRITE | NES_CQP_STAG_VA_TO |
  98. NES_CQP_STAG_REM_ACC_EN);
  99. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  100. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX, (nespd->pd_id & 0x00007fff));
  101. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, stag);
  102. atomic_set(&cqp_request->refcount, 2);
  103. nes_post_cqp_request(nesdev, cqp_request);
  104. /* Wait for CQP */
  105. ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0),
  106. NES_EVENT_TIMEOUT);
  107. nes_debug(NES_DBG_MR, "Register STag 0x%08X completed, wait_event_timeout ret = %u,"
  108. " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
  109. stag, ret, cqp_request->major_code, cqp_request->minor_code);
  110. if ((!ret) || (cqp_request->major_code)) {
  111. nes_put_cqp_request(nesdev, cqp_request);
  112. kfree(nesmr);
  113. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  114. if (!ret) {
  115. return ERR_PTR(-ETIME);
  116. } else {
  117. return ERR_PTR(-ENOMEM);
  118. }
  119. }
  120. nes_put_cqp_request(nesdev, cqp_request);
  121. nesmr->ibmw.rkey = stag;
  122. nesmr->mode = IWNES_MEMREG_TYPE_MW;
  123. ibmw = &nesmr->ibmw;
  124. nesmr->pbl_4k = 0;
  125. nesmr->pbls_used = 0;
  126. return ibmw;
  127. }
  128. /**
  129. * nes_dealloc_mw
  130. */
  131. static int nes_dealloc_mw(struct ib_mw *ibmw)
  132. {
  133. struct nes_mr *nesmr = to_nesmw(ibmw);
  134. struct nes_vnic *nesvnic = to_nesvnic(ibmw->device);
  135. struct nes_device *nesdev = nesvnic->nesdev;
  136. struct nes_adapter *nesadapter = nesdev->nesadapter;
  137. struct nes_hw_cqp_wqe *cqp_wqe;
  138. struct nes_cqp_request *cqp_request;
  139. int err = 0;
  140. int ret;
  141. /* Deallocate the window with the adapter */
  142. cqp_request = nes_get_cqp_request(nesdev);
  143. if (cqp_request == NULL) {
  144. nes_debug(NES_DBG_MR, "Failed to get a cqp_request.\n");
  145. return -ENOMEM;
  146. }
  147. cqp_request->waiting = 1;
  148. cqp_wqe = &cqp_request->cqp_wqe;
  149. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  150. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, NES_CQP_DEALLOCATE_STAG);
  151. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, ibmw->rkey);
  152. atomic_set(&cqp_request->refcount, 2);
  153. nes_post_cqp_request(nesdev, cqp_request);
  154. /* Wait for CQP */
  155. nes_debug(NES_DBG_MR, "Waiting for deallocate STag 0x%08X to complete.\n",
  156. ibmw->rkey);
  157. ret = wait_event_timeout(cqp_request->waitq, (0 != cqp_request->request_done),
  158. NES_EVENT_TIMEOUT);
  159. nes_debug(NES_DBG_MR, "Deallocate STag completed, wait_event_timeout ret = %u,"
  160. " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
  161. ret, cqp_request->major_code, cqp_request->minor_code);
  162. if (!ret)
  163. err = -ETIME;
  164. else if (cqp_request->major_code)
  165. err = -EIO;
  166. nes_put_cqp_request(nesdev, cqp_request);
  167. nes_free_resource(nesadapter, nesadapter->allocated_mrs,
  168. (ibmw->rkey & 0x0fffff00) >> 8);
  169. kfree(nesmr);
  170. return err;
  171. }
  172. /**
  173. * nes_bind_mw
  174. */
  175. static int nes_bind_mw(struct ib_qp *ibqp, struct ib_mw *ibmw,
  176. struct ib_mw_bind *ibmw_bind)
  177. {
  178. u64 u64temp;
  179. struct nes_vnic *nesvnic = to_nesvnic(ibqp->device);
  180. struct nes_device *nesdev = nesvnic->nesdev;
  181. /* struct nes_mr *nesmr = to_nesmw(ibmw); */
  182. struct nes_qp *nesqp = to_nesqp(ibqp);
  183. struct nes_hw_qp_wqe *wqe;
  184. unsigned long flags = 0;
  185. u32 head;
  186. u32 wqe_misc = 0;
  187. u32 qsize;
  188. if (nesqp->ibqp_state > IB_QPS_RTS)
  189. return -EINVAL;
  190. spin_lock_irqsave(&nesqp->lock, flags);
  191. head = nesqp->hwqp.sq_head;
  192. qsize = nesqp->hwqp.sq_tail;
  193. /* Check for SQ overflow */
  194. if (((head + (2 * qsize) - nesqp->hwqp.sq_tail) % qsize) == (qsize - 1)) {
  195. spin_unlock_irqrestore(&nesqp->lock, flags);
  196. return -ENOMEM;
  197. }
  198. wqe = &nesqp->hwqp.sq_vbase[head];
  199. /* nes_debug(NES_DBG_MR, "processing sq wqe at %p, head = %u.\n", wqe, head); */
  200. nes_fill_init_qp_wqe(wqe, nesqp, head);
  201. u64temp = ibmw_bind->wr_id;
  202. set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_SCRATCH_LOW_IDX, u64temp);
  203. wqe_misc = NES_IWARP_SQ_OP_BIND;
  204. wqe_misc |= NES_IWARP_SQ_WQE_LOCAL_FENCE;
  205. if (ibmw_bind->send_flags & IB_SEND_SIGNALED)
  206. wqe_misc |= NES_IWARP_SQ_WQE_SIGNALED_COMPL;
  207. if (ibmw_bind->mw_access_flags & IB_ACCESS_REMOTE_WRITE) {
  208. wqe_misc |= NES_CQP_STAG_RIGHTS_REMOTE_WRITE;
  209. }
  210. if (ibmw_bind->mw_access_flags & IB_ACCESS_REMOTE_READ) {
  211. wqe_misc |= NES_CQP_STAG_RIGHTS_REMOTE_READ;
  212. }
  213. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_MISC_IDX, wqe_misc);
  214. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_BIND_WQE_MR_IDX, ibmw_bind->mr->lkey);
  215. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_BIND_WQE_MW_IDX, ibmw->rkey);
  216. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_BIND_WQE_LENGTH_LOW_IDX,
  217. ibmw_bind->length);
  218. wqe->wqe_words[NES_IWARP_SQ_BIND_WQE_LENGTH_HIGH_IDX] = 0;
  219. u64temp = (u64)ibmw_bind->addr;
  220. set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_BIND_WQE_VA_FBO_LOW_IDX, u64temp);
  221. head++;
  222. if (head >= qsize)
  223. head = 0;
  224. nesqp->hwqp.sq_head = head;
  225. barrier();
  226. nes_write32(nesdev->regs+NES_WQE_ALLOC,
  227. (1 << 24) | 0x00800000 | nesqp->hwqp.qp_id);
  228. spin_unlock_irqrestore(&nesqp->lock, flags);
  229. return 0;
  230. }
  231. /*
  232. * nes_alloc_fast_mr
  233. */
  234. static int alloc_fast_reg_mr(struct nes_device *nesdev, struct nes_pd *nespd,
  235. u32 stag, u32 page_count)
  236. {
  237. struct nes_hw_cqp_wqe *cqp_wqe;
  238. struct nes_cqp_request *cqp_request;
  239. unsigned long flags;
  240. int ret;
  241. struct nes_adapter *nesadapter = nesdev->nesadapter;
  242. u32 opcode = 0;
  243. u16 major_code;
  244. u64 region_length = page_count * PAGE_SIZE;
  245. cqp_request = nes_get_cqp_request(nesdev);
  246. if (cqp_request == NULL) {
  247. nes_debug(NES_DBG_MR, "Failed to get a cqp_request.\n");
  248. return -ENOMEM;
  249. }
  250. nes_debug(NES_DBG_MR, "alloc_fast_reg_mr: page_count = %d, "
  251. "region_length = %llu\n",
  252. page_count, region_length);
  253. cqp_request->waiting = 1;
  254. cqp_wqe = &cqp_request->cqp_wqe;
  255. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  256. if (nesadapter->free_4kpbl > 0) {
  257. nesadapter->free_4kpbl--;
  258. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  259. } else {
  260. /* No 4kpbl's available: */
  261. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  262. nes_debug(NES_DBG_MR, "Out of Pbls\n");
  263. nes_free_cqp_request(nesdev, cqp_request);
  264. return -ENOMEM;
  265. }
  266. opcode = NES_CQP_ALLOCATE_STAG | NES_CQP_STAG_MR |
  267. NES_CQP_STAG_PBL_BLK_SIZE | NES_CQP_STAG_VA_TO |
  268. NES_CQP_STAG_REM_ACC_EN;
  269. /*
  270. * The current OFED API does not support the zero based TO option.
  271. * If added then need to changed the NES_CQP_STAG_VA* option. Also,
  272. * the API does not support that ability to have the MR set for local
  273. * access only when created and not allow the SQ op to override. Given
  274. * this the remote enable must be set here.
  275. */
  276. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  277. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
  278. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX, 1);
  279. cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX] =
  280. cpu_to_le32((u32)(region_length >> 8) & 0xff000000);
  281. cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX] |=
  282. cpu_to_le32(nespd->pd_id & 0x00007fff);
  283. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, stag);
  284. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_VA_LOW_IDX, 0);
  285. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_LEN_LOW_IDX, 0);
  286. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PA_LOW_IDX, 0);
  287. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PBL_LEN_IDX, (page_count * 8));
  288. cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] |= cpu_to_le32(NES_CQP_STAG_PBL_BLK_SIZE);
  289. barrier();
  290. atomic_set(&cqp_request->refcount, 2);
  291. nes_post_cqp_request(nesdev, cqp_request);
  292. /* Wait for CQP */
  293. ret = wait_event_timeout(cqp_request->waitq,
  294. (0 != cqp_request->request_done),
  295. NES_EVENT_TIMEOUT);
  296. nes_debug(NES_DBG_MR, "Allocate STag 0x%08X completed, "
  297. "wait_event_timeout ret = %u, CQP Major:Minor codes = "
  298. "0x%04X:0x%04X.\n", stag, ret, cqp_request->major_code,
  299. cqp_request->minor_code);
  300. major_code = cqp_request->major_code;
  301. nes_put_cqp_request(nesdev, cqp_request);
  302. if (!ret || major_code) {
  303. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  304. nesadapter->free_4kpbl++;
  305. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  306. }
  307. if (!ret)
  308. return -ETIME;
  309. else if (major_code)
  310. return -EIO;
  311. return 0;
  312. }
  313. /*
  314. * nes_alloc_fast_reg_mr
  315. */
  316. static struct ib_mr *nes_alloc_fast_reg_mr(struct ib_pd *ibpd, int max_page_list_len)
  317. {
  318. struct nes_pd *nespd = to_nespd(ibpd);
  319. struct nes_vnic *nesvnic = to_nesvnic(ibpd->device);
  320. struct nes_device *nesdev = nesvnic->nesdev;
  321. struct nes_adapter *nesadapter = nesdev->nesadapter;
  322. u32 next_stag_index;
  323. u8 stag_key = 0;
  324. u32 driver_key = 0;
  325. int err = 0;
  326. u32 stag_index = 0;
  327. struct nes_mr *nesmr;
  328. u32 stag;
  329. int ret;
  330. struct ib_mr *ibmr;
  331. /*
  332. * Note: Set to always use a fixed length single page entry PBL. This is to allow
  333. * for the fast_reg_mr operation to always know the size of the PBL.
  334. */
  335. if (max_page_list_len > (NES_4K_PBL_CHUNK_SIZE / sizeof(u64)))
  336. return ERR_PTR(-E2BIG);
  337. get_random_bytes(&next_stag_index, sizeof(next_stag_index));
  338. stag_key = (u8)next_stag_index;
  339. next_stag_index >>= 8;
  340. next_stag_index %= nesadapter->max_mr;
  341. err = nes_alloc_resource(nesadapter, nesadapter->allocated_mrs,
  342. nesadapter->max_mr, &stag_index,
  343. &next_stag_index);
  344. if (err)
  345. return ERR_PTR(err);
  346. nesmr = kzalloc(sizeof(*nesmr), GFP_KERNEL);
  347. if (!nesmr) {
  348. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  349. return ERR_PTR(-ENOMEM);
  350. }
  351. stag = stag_index << 8;
  352. stag |= driver_key;
  353. stag += (u32)stag_key;
  354. nes_debug(NES_DBG_MR, "Allocating STag 0x%08X index = 0x%08X\n",
  355. stag, stag_index);
  356. ret = alloc_fast_reg_mr(nesdev, nespd, stag, max_page_list_len);
  357. if (ret == 0) {
  358. nesmr->ibmr.rkey = stag;
  359. nesmr->ibmr.lkey = stag;
  360. nesmr->mode = IWNES_MEMREG_TYPE_FMEM;
  361. ibmr = &nesmr->ibmr;
  362. } else {
  363. kfree(nesmr);
  364. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  365. ibmr = ERR_PTR(-ENOMEM);
  366. }
  367. return ibmr;
  368. }
  369. /*
  370. * nes_alloc_fast_reg_page_list
  371. */
  372. static struct ib_fast_reg_page_list *nes_alloc_fast_reg_page_list(
  373. struct ib_device *ibdev,
  374. int page_list_len)
  375. {
  376. struct nes_vnic *nesvnic = to_nesvnic(ibdev);
  377. struct nes_device *nesdev = nesvnic->nesdev;
  378. struct ib_fast_reg_page_list *pifrpl;
  379. struct nes_ib_fast_reg_page_list *pnesfrpl;
  380. if (page_list_len > (NES_4K_PBL_CHUNK_SIZE / sizeof(u64)))
  381. return ERR_PTR(-E2BIG);
  382. /*
  383. * Allocate the ib_fast_reg_page_list structure, the
  384. * nes_fast_bpl structure, and the PLB table.
  385. */
  386. pnesfrpl = kmalloc(sizeof(struct nes_ib_fast_reg_page_list) +
  387. page_list_len * sizeof(u64), GFP_KERNEL);
  388. if (!pnesfrpl)
  389. return ERR_PTR(-ENOMEM);
  390. pifrpl = &pnesfrpl->ibfrpl;
  391. pifrpl->page_list = &pnesfrpl->pbl;
  392. pifrpl->max_page_list_len = page_list_len;
  393. /*
  394. * Allocate the WQE PBL
  395. */
  396. pnesfrpl->nes_wqe_pbl.kva = pci_alloc_consistent(nesdev->pcidev,
  397. page_list_len * sizeof(u64),
  398. &pnesfrpl->nes_wqe_pbl.paddr);
  399. if (!pnesfrpl->nes_wqe_pbl.kva) {
  400. kfree(pnesfrpl);
  401. return ERR_PTR(-ENOMEM);
  402. }
  403. nes_debug(NES_DBG_MR, "nes_alloc_fast_reg_pbl: nes_frpl = %p, "
  404. "ibfrpl = %p, ibfrpl.page_list = %p, pbl.kva = %p, "
  405. "pbl.paddr = %llx\n", pnesfrpl, &pnesfrpl->ibfrpl,
  406. pnesfrpl->ibfrpl.page_list, pnesfrpl->nes_wqe_pbl.kva,
  407. (unsigned long long) pnesfrpl->nes_wqe_pbl.paddr);
  408. return pifrpl;
  409. }
  410. /*
  411. * nes_free_fast_reg_page_list
  412. */
  413. static void nes_free_fast_reg_page_list(struct ib_fast_reg_page_list *pifrpl)
  414. {
  415. struct nes_vnic *nesvnic = to_nesvnic(pifrpl->device);
  416. struct nes_device *nesdev = nesvnic->nesdev;
  417. struct nes_ib_fast_reg_page_list *pnesfrpl;
  418. pnesfrpl = container_of(pifrpl, struct nes_ib_fast_reg_page_list, ibfrpl);
  419. /*
  420. * Free the WQE PBL.
  421. */
  422. pci_free_consistent(nesdev->pcidev,
  423. pifrpl->max_page_list_len * sizeof(u64),
  424. pnesfrpl->nes_wqe_pbl.kva,
  425. pnesfrpl->nes_wqe_pbl.paddr);
  426. /*
  427. * Free the PBL structure
  428. */
  429. kfree(pnesfrpl);
  430. }
  431. /**
  432. * nes_query_device
  433. */
  434. static int nes_query_device(struct ib_device *ibdev, struct ib_device_attr *props)
  435. {
  436. struct nes_vnic *nesvnic = to_nesvnic(ibdev);
  437. struct nes_device *nesdev = nesvnic->nesdev;
  438. struct nes_ib_device *nesibdev = nesvnic->nesibdev;
  439. memset(props, 0, sizeof(*props));
  440. memcpy(&props->sys_image_guid, nesvnic->netdev->dev_addr, 6);
  441. props->fw_ver = nesdev->nesadapter->firmware_version;
  442. props->device_cap_flags = nesdev->nesadapter->device_cap_flags;
  443. props->vendor_id = nesdev->nesadapter->vendor_id;
  444. props->vendor_part_id = nesdev->nesadapter->vendor_part_id;
  445. props->hw_ver = nesdev->nesadapter->hw_rev;
  446. props->max_mr_size = 0x80000000;
  447. props->max_qp = nesibdev->max_qp;
  448. props->max_qp_wr = nesdev->nesadapter->max_qp_wr - 2;
  449. props->max_sge = nesdev->nesadapter->max_sge;
  450. props->max_cq = nesibdev->max_cq;
  451. props->max_cqe = nesdev->nesadapter->max_cqe;
  452. props->max_mr = nesibdev->max_mr;
  453. props->max_mw = nesibdev->max_mr;
  454. props->max_pd = nesibdev->max_pd;
  455. props->max_sge_rd = 1;
  456. switch (nesdev->nesadapter->max_irrq_wr) {
  457. case 0:
  458. props->max_qp_rd_atom = 2;
  459. break;
  460. case 1:
  461. props->max_qp_rd_atom = 8;
  462. break;
  463. case 2:
  464. props->max_qp_rd_atom = 32;
  465. break;
  466. case 3:
  467. props->max_qp_rd_atom = 64;
  468. break;
  469. default:
  470. props->max_qp_rd_atom = 0;
  471. }
  472. props->max_qp_init_rd_atom = props->max_qp_rd_atom;
  473. props->atomic_cap = IB_ATOMIC_NONE;
  474. props->max_map_per_fmr = 1;
  475. return 0;
  476. }
  477. /**
  478. * nes_query_port
  479. */
  480. static int nes_query_port(struct ib_device *ibdev, u8 port, struct ib_port_attr *props)
  481. {
  482. struct nes_vnic *nesvnic = to_nesvnic(ibdev);
  483. struct net_device *netdev = nesvnic->netdev;
  484. memset(props, 0, sizeof(*props));
  485. props->max_mtu = IB_MTU_4096;
  486. if (netdev->mtu >= 4096)
  487. props->active_mtu = IB_MTU_4096;
  488. else if (netdev->mtu >= 2048)
  489. props->active_mtu = IB_MTU_2048;
  490. else if (netdev->mtu >= 1024)
  491. props->active_mtu = IB_MTU_1024;
  492. else if (netdev->mtu >= 512)
  493. props->active_mtu = IB_MTU_512;
  494. else
  495. props->active_mtu = IB_MTU_256;
  496. props->lid = 1;
  497. props->lmc = 0;
  498. props->sm_lid = 0;
  499. props->sm_sl = 0;
  500. if (netif_queue_stopped(netdev))
  501. props->state = IB_PORT_DOWN;
  502. else if (nesvnic->linkup)
  503. props->state = IB_PORT_ACTIVE;
  504. else
  505. props->state = IB_PORT_DOWN;
  506. props->phys_state = 0;
  507. props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
  508. IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
  509. props->gid_tbl_len = 1;
  510. props->pkey_tbl_len = 1;
  511. props->qkey_viol_cntr = 0;
  512. props->active_width = IB_WIDTH_4X;
  513. props->active_speed = IB_SPEED_SDR;
  514. props->max_msg_sz = 0x80000000;
  515. return 0;
  516. }
  517. /**
  518. * nes_query_pkey
  519. */
  520. static int nes_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
  521. {
  522. *pkey = 0;
  523. return 0;
  524. }
  525. /**
  526. * nes_query_gid
  527. */
  528. static int nes_query_gid(struct ib_device *ibdev, u8 port,
  529. int index, union ib_gid *gid)
  530. {
  531. struct nes_vnic *nesvnic = to_nesvnic(ibdev);
  532. memset(&(gid->raw[0]), 0, sizeof(gid->raw));
  533. memcpy(&(gid->raw[0]), nesvnic->netdev->dev_addr, 6);
  534. return 0;
  535. }
  536. /**
  537. * nes_alloc_ucontext - Allocate the user context data structure. This keeps track
  538. * of all objects associated with a particular user-mode client.
  539. */
  540. static struct ib_ucontext *nes_alloc_ucontext(struct ib_device *ibdev,
  541. struct ib_udata *udata)
  542. {
  543. struct nes_vnic *nesvnic = to_nesvnic(ibdev);
  544. struct nes_device *nesdev = nesvnic->nesdev;
  545. struct nes_adapter *nesadapter = nesdev->nesadapter;
  546. struct nes_alloc_ucontext_req req;
  547. struct nes_alloc_ucontext_resp uresp;
  548. struct nes_ucontext *nes_ucontext;
  549. struct nes_ib_device *nesibdev = nesvnic->nesibdev;
  550. if (ib_copy_from_udata(&req, udata, sizeof(struct nes_alloc_ucontext_req))) {
  551. printk(KERN_ERR PFX "Invalid structure size on allocate user context.\n");
  552. return ERR_PTR(-EINVAL);
  553. }
  554. if (req.userspace_ver != NES_ABI_USERSPACE_VER) {
  555. printk(KERN_ERR PFX "Invalid userspace driver version detected. Detected version %d, should be %d\n",
  556. req.userspace_ver, NES_ABI_USERSPACE_VER);
  557. return ERR_PTR(-EINVAL);
  558. }
  559. memset(&uresp, 0, sizeof uresp);
  560. uresp.max_qps = nesibdev->max_qp;
  561. uresp.max_pds = nesibdev->max_pd;
  562. uresp.wq_size = nesdev->nesadapter->max_qp_wr * 2;
  563. uresp.virtwq = nesadapter->virtwq;
  564. uresp.kernel_ver = NES_ABI_KERNEL_VER;
  565. nes_ucontext = kzalloc(sizeof *nes_ucontext, GFP_KERNEL);
  566. if (!nes_ucontext)
  567. return ERR_PTR(-ENOMEM);
  568. nes_ucontext->nesdev = nesdev;
  569. nes_ucontext->mmap_wq_offset = uresp.max_pds;
  570. nes_ucontext->mmap_cq_offset = nes_ucontext->mmap_wq_offset +
  571. ((sizeof(struct nes_hw_qp_wqe) * uresp.max_qps * 2) + PAGE_SIZE-1) /
  572. PAGE_SIZE;
  573. if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
  574. kfree(nes_ucontext);
  575. return ERR_PTR(-EFAULT);
  576. }
  577. INIT_LIST_HEAD(&nes_ucontext->cq_reg_mem_list);
  578. INIT_LIST_HEAD(&nes_ucontext->qp_reg_mem_list);
  579. atomic_set(&nes_ucontext->usecnt, 1);
  580. return &nes_ucontext->ibucontext;
  581. }
  582. /**
  583. * nes_dealloc_ucontext
  584. */
  585. static int nes_dealloc_ucontext(struct ib_ucontext *context)
  586. {
  587. /* struct nes_vnic *nesvnic = to_nesvnic(context->device); */
  588. /* struct nes_device *nesdev = nesvnic->nesdev; */
  589. struct nes_ucontext *nes_ucontext = to_nesucontext(context);
  590. if (!atomic_dec_and_test(&nes_ucontext->usecnt))
  591. return 0;
  592. kfree(nes_ucontext);
  593. return 0;
  594. }
  595. /**
  596. * nes_mmap
  597. */
  598. static int nes_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
  599. {
  600. unsigned long index;
  601. struct nes_vnic *nesvnic = to_nesvnic(context->device);
  602. struct nes_device *nesdev = nesvnic->nesdev;
  603. /* struct nes_adapter *nesadapter = nesdev->nesadapter; */
  604. struct nes_ucontext *nes_ucontext;
  605. struct nes_qp *nesqp;
  606. nes_ucontext = to_nesucontext(context);
  607. if (vma->vm_pgoff >= nes_ucontext->mmap_wq_offset) {
  608. index = (vma->vm_pgoff - nes_ucontext->mmap_wq_offset) * PAGE_SIZE;
  609. index /= ((sizeof(struct nes_hw_qp_wqe) * nesdev->nesadapter->max_qp_wr * 2) +
  610. PAGE_SIZE-1) & (~(PAGE_SIZE-1));
  611. if (!test_bit(index, nes_ucontext->allocated_wqs)) {
  612. nes_debug(NES_DBG_MMAP, "wq %lu not allocated\n", index);
  613. return -EFAULT;
  614. }
  615. nesqp = nes_ucontext->mmap_nesqp[index];
  616. if (nesqp == NULL) {
  617. nes_debug(NES_DBG_MMAP, "wq %lu has a NULL QP base.\n", index);
  618. return -EFAULT;
  619. }
  620. if (remap_pfn_range(vma, vma->vm_start,
  621. virt_to_phys(nesqp->hwqp.sq_vbase) >> PAGE_SHIFT,
  622. vma->vm_end - vma->vm_start,
  623. vma->vm_page_prot)) {
  624. nes_debug(NES_DBG_MMAP, "remap_pfn_range failed.\n");
  625. return -EAGAIN;
  626. }
  627. vma->vm_private_data = nesqp;
  628. return 0;
  629. } else {
  630. index = vma->vm_pgoff;
  631. if (!test_bit(index, nes_ucontext->allocated_doorbells))
  632. return -EFAULT;
  633. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  634. if (io_remap_pfn_range(vma, vma->vm_start,
  635. (nesdev->doorbell_start +
  636. ((nes_ucontext->mmap_db_index[index] - nesdev->base_doorbell_index) * 4096))
  637. >> PAGE_SHIFT, PAGE_SIZE, vma->vm_page_prot))
  638. return -EAGAIN;
  639. vma->vm_private_data = nes_ucontext;
  640. return 0;
  641. }
  642. return -ENOSYS;
  643. }
  644. /**
  645. * nes_alloc_pd
  646. */
  647. static struct ib_pd *nes_alloc_pd(struct ib_device *ibdev,
  648. struct ib_ucontext *context, struct ib_udata *udata)
  649. {
  650. struct nes_pd *nespd;
  651. struct nes_vnic *nesvnic = to_nesvnic(ibdev);
  652. struct nes_device *nesdev = nesvnic->nesdev;
  653. struct nes_adapter *nesadapter = nesdev->nesadapter;
  654. struct nes_ucontext *nesucontext;
  655. struct nes_alloc_pd_resp uresp;
  656. u32 pd_num = 0;
  657. int err;
  658. nes_debug(NES_DBG_PD, "nesvnic=%p, netdev=%p %s, ibdev=%p, context=%p, netdev refcnt=%u\n",
  659. nesvnic, nesdev->netdev[0], nesdev->netdev[0]->name, ibdev, context,
  660. netdev_refcnt_read(nesvnic->netdev));
  661. err = nes_alloc_resource(nesadapter, nesadapter->allocated_pds,
  662. nesadapter->max_pd, &pd_num, &nesadapter->next_pd);
  663. if (err) {
  664. return ERR_PTR(err);
  665. }
  666. nespd = kzalloc(sizeof (struct nes_pd), GFP_KERNEL);
  667. if (!nespd) {
  668. nes_free_resource(nesadapter, nesadapter->allocated_pds, pd_num);
  669. return ERR_PTR(-ENOMEM);
  670. }
  671. nes_debug(NES_DBG_PD, "Allocating PD (%p) for ib device %s\n",
  672. nespd, nesvnic->nesibdev->ibdev.name);
  673. nespd->pd_id = (pd_num << (PAGE_SHIFT-12)) + nesadapter->base_pd;
  674. if (context) {
  675. nesucontext = to_nesucontext(context);
  676. nespd->mmap_db_index = find_next_zero_bit(nesucontext->allocated_doorbells,
  677. NES_MAX_USER_DB_REGIONS, nesucontext->first_free_db);
  678. nes_debug(NES_DBG_PD, "find_first_zero_biton doorbells returned %u, mapping pd_id %u.\n",
  679. nespd->mmap_db_index, nespd->pd_id);
  680. if (nespd->mmap_db_index >= NES_MAX_USER_DB_REGIONS) {
  681. nes_debug(NES_DBG_PD, "mmap_db_index > MAX\n");
  682. nes_free_resource(nesadapter, nesadapter->allocated_pds, pd_num);
  683. kfree(nespd);
  684. return ERR_PTR(-ENOMEM);
  685. }
  686. uresp.pd_id = nespd->pd_id;
  687. uresp.mmap_db_index = nespd->mmap_db_index;
  688. if (ib_copy_to_udata(udata, &uresp, sizeof (struct nes_alloc_pd_resp))) {
  689. nes_free_resource(nesadapter, nesadapter->allocated_pds, pd_num);
  690. kfree(nespd);
  691. return ERR_PTR(-EFAULT);
  692. }
  693. set_bit(nespd->mmap_db_index, nesucontext->allocated_doorbells);
  694. nesucontext->mmap_db_index[nespd->mmap_db_index] = nespd->pd_id;
  695. nesucontext->first_free_db = nespd->mmap_db_index + 1;
  696. }
  697. nes_debug(NES_DBG_PD, "PD%u structure located @%p.\n", nespd->pd_id, nespd);
  698. return &nespd->ibpd;
  699. }
  700. /**
  701. * nes_dealloc_pd
  702. */
  703. static int nes_dealloc_pd(struct ib_pd *ibpd)
  704. {
  705. struct nes_ucontext *nesucontext;
  706. struct nes_pd *nespd = to_nespd(ibpd);
  707. struct nes_vnic *nesvnic = to_nesvnic(ibpd->device);
  708. struct nes_device *nesdev = nesvnic->nesdev;
  709. struct nes_adapter *nesadapter = nesdev->nesadapter;
  710. if ((ibpd->uobject) && (ibpd->uobject->context)) {
  711. nesucontext = to_nesucontext(ibpd->uobject->context);
  712. nes_debug(NES_DBG_PD, "Clearing bit %u from allocated doorbells\n",
  713. nespd->mmap_db_index);
  714. clear_bit(nespd->mmap_db_index, nesucontext->allocated_doorbells);
  715. nesucontext->mmap_db_index[nespd->mmap_db_index] = 0;
  716. if (nesucontext->first_free_db > nespd->mmap_db_index) {
  717. nesucontext->first_free_db = nespd->mmap_db_index;
  718. }
  719. }
  720. nes_debug(NES_DBG_PD, "Deallocating PD%u structure located @%p.\n",
  721. nespd->pd_id, nespd);
  722. nes_free_resource(nesadapter, nesadapter->allocated_pds,
  723. (nespd->pd_id-nesadapter->base_pd)>>(PAGE_SHIFT-12));
  724. kfree(nespd);
  725. return 0;
  726. }
  727. /**
  728. * nes_create_ah
  729. */
  730. static struct ib_ah *nes_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr)
  731. {
  732. return ERR_PTR(-ENOSYS);
  733. }
  734. /**
  735. * nes_destroy_ah
  736. */
  737. static int nes_destroy_ah(struct ib_ah *ah)
  738. {
  739. return -ENOSYS;
  740. }
  741. /**
  742. * nes_get_encoded_size
  743. */
  744. static inline u8 nes_get_encoded_size(int *size)
  745. {
  746. u8 encoded_size = 0;
  747. if (*size <= 32) {
  748. *size = 32;
  749. encoded_size = 1;
  750. } else if (*size <= 128) {
  751. *size = 128;
  752. encoded_size = 2;
  753. } else if (*size <= 512) {
  754. *size = 512;
  755. encoded_size = 3;
  756. }
  757. return (encoded_size);
  758. }
  759. /**
  760. * nes_setup_virt_qp
  761. */
  762. static int nes_setup_virt_qp(struct nes_qp *nesqp, struct nes_pbl *nespbl,
  763. struct nes_vnic *nesvnic, int sq_size, int rq_size)
  764. {
  765. unsigned long flags;
  766. void *mem;
  767. __le64 *pbl = NULL;
  768. __le64 *tpbl;
  769. __le64 *pblbuffer;
  770. struct nes_device *nesdev = nesvnic->nesdev;
  771. struct nes_adapter *nesadapter = nesdev->nesadapter;
  772. u32 pbl_entries;
  773. u8 rq_pbl_entries;
  774. u8 sq_pbl_entries;
  775. pbl_entries = nespbl->pbl_size >> 3;
  776. nes_debug(NES_DBG_QP, "Userspace PBL, pbl_size=%u, pbl_entries = %d pbl_vbase=%p, pbl_pbase=%lx\n",
  777. nespbl->pbl_size, pbl_entries,
  778. (void *)nespbl->pbl_vbase,
  779. (unsigned long) nespbl->pbl_pbase);
  780. pbl = (__le64 *) nespbl->pbl_vbase; /* points to first pbl entry */
  781. /* now lets set the sq_vbase as well as rq_vbase addrs we will assign */
  782. /* the first pbl to be fro the rq_vbase... */
  783. rq_pbl_entries = (rq_size * sizeof(struct nes_hw_qp_wqe)) >> 12;
  784. sq_pbl_entries = (sq_size * sizeof(struct nes_hw_qp_wqe)) >> 12;
  785. nesqp->hwqp.sq_pbase = (le32_to_cpu(((__le32 *)pbl)[0])) | ((u64)((le32_to_cpu(((__le32 *)pbl)[1]))) << 32);
  786. if (!nespbl->page) {
  787. nes_debug(NES_DBG_QP, "QP nespbl->page is NULL \n");
  788. kfree(nespbl);
  789. return -ENOMEM;
  790. }
  791. nesqp->hwqp.sq_vbase = kmap(nespbl->page);
  792. nesqp->page = nespbl->page;
  793. if (!nesqp->hwqp.sq_vbase) {
  794. nes_debug(NES_DBG_QP, "QP sq_vbase kmap failed\n");
  795. kfree(nespbl);
  796. return -ENOMEM;
  797. }
  798. /* Now to get to sq.. we need to calculate how many */
  799. /* PBL entries were used by the rq.. */
  800. pbl += sq_pbl_entries;
  801. nesqp->hwqp.rq_pbase = (le32_to_cpu(((__le32 *)pbl)[0])) | ((u64)((le32_to_cpu(((__le32 *)pbl)[1]))) << 32);
  802. /* nesqp->hwqp.rq_vbase = bus_to_virt(*pbl); */
  803. /*nesqp->hwqp.rq_vbase = phys_to_virt(*pbl); */
  804. nes_debug(NES_DBG_QP, "QP sq_vbase= %p sq_pbase=%lx rq_vbase=%p rq_pbase=%lx\n",
  805. nesqp->hwqp.sq_vbase, (unsigned long) nesqp->hwqp.sq_pbase,
  806. nesqp->hwqp.rq_vbase, (unsigned long) nesqp->hwqp.rq_pbase);
  807. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  808. if (!nesadapter->free_256pbl) {
  809. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size, nespbl->pbl_vbase,
  810. nespbl->pbl_pbase);
  811. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  812. kunmap(nesqp->page);
  813. kfree(nespbl);
  814. return -ENOMEM;
  815. }
  816. nesadapter->free_256pbl--;
  817. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  818. nesqp->pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 256, &nesqp->pbl_pbase);
  819. pblbuffer = nesqp->pbl_vbase;
  820. if (!nesqp->pbl_vbase) {
  821. /* memory allocated during nes_reg_user_mr() */
  822. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size, nespbl->pbl_vbase,
  823. nespbl->pbl_pbase);
  824. kfree(nespbl);
  825. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  826. nesadapter->free_256pbl++;
  827. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  828. kunmap(nesqp->page);
  829. return -ENOMEM;
  830. }
  831. memset(nesqp->pbl_vbase, 0, 256);
  832. /* fill in the page address in the pbl buffer.. */
  833. tpbl = pblbuffer + 16;
  834. pbl = (__le64 *)nespbl->pbl_vbase;
  835. while (sq_pbl_entries--)
  836. *tpbl++ = *pbl++;
  837. tpbl = pblbuffer;
  838. while (rq_pbl_entries--)
  839. *tpbl++ = *pbl++;
  840. /* done with memory allocated during nes_reg_user_mr() */
  841. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size, nespbl->pbl_vbase,
  842. nespbl->pbl_pbase);
  843. kfree(nespbl);
  844. nesqp->qp_mem_size =
  845. max((u32)sizeof(struct nes_qp_context), ((u32)256)) + 256; /* this is Q2 */
  846. /* Round up to a multiple of a page */
  847. nesqp->qp_mem_size += PAGE_SIZE - 1;
  848. nesqp->qp_mem_size &= ~(PAGE_SIZE - 1);
  849. mem = pci_alloc_consistent(nesdev->pcidev, nesqp->qp_mem_size,
  850. &nesqp->hwqp.q2_pbase);
  851. if (!mem) {
  852. pci_free_consistent(nesdev->pcidev, 256, nesqp->pbl_vbase, nesqp->pbl_pbase);
  853. nesqp->pbl_vbase = NULL;
  854. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  855. nesadapter->free_256pbl++;
  856. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  857. kunmap(nesqp->page);
  858. return -ENOMEM;
  859. }
  860. nesqp->sq_kmapped = 1;
  861. nesqp->hwqp.q2_vbase = mem;
  862. mem += 256;
  863. memset(nesqp->hwqp.q2_vbase, 0, 256);
  864. nesqp->nesqp_context = mem;
  865. memset(nesqp->nesqp_context, 0, sizeof(*nesqp->nesqp_context));
  866. nesqp->nesqp_context_pbase = nesqp->hwqp.q2_pbase + 256;
  867. return 0;
  868. }
  869. /**
  870. * nes_setup_mmap_qp
  871. */
  872. static int nes_setup_mmap_qp(struct nes_qp *nesqp, struct nes_vnic *nesvnic,
  873. int sq_size, int rq_size)
  874. {
  875. void *mem;
  876. struct nes_device *nesdev = nesvnic->nesdev;
  877. nesqp->qp_mem_size = (sizeof(struct nes_hw_qp_wqe) * sq_size) +
  878. (sizeof(struct nes_hw_qp_wqe) * rq_size) +
  879. max((u32)sizeof(struct nes_qp_context), ((u32)256)) +
  880. 256; /* this is Q2 */
  881. /* Round up to a multiple of a page */
  882. nesqp->qp_mem_size += PAGE_SIZE - 1;
  883. nesqp->qp_mem_size &= ~(PAGE_SIZE - 1);
  884. mem = pci_alloc_consistent(nesdev->pcidev, nesqp->qp_mem_size,
  885. &nesqp->hwqp.sq_pbase);
  886. if (!mem)
  887. return -ENOMEM;
  888. nes_debug(NES_DBG_QP, "PCI consistent memory for "
  889. "host descriptor rings located @ %p (pa = 0x%08lX.) size = %u.\n",
  890. mem, (unsigned long)nesqp->hwqp.sq_pbase, nesqp->qp_mem_size);
  891. memset(mem, 0, nesqp->qp_mem_size);
  892. nesqp->hwqp.sq_vbase = mem;
  893. mem += sizeof(struct nes_hw_qp_wqe) * sq_size;
  894. nesqp->hwqp.rq_vbase = mem;
  895. nesqp->hwqp.rq_pbase = nesqp->hwqp.sq_pbase +
  896. sizeof(struct nes_hw_qp_wqe) * sq_size;
  897. mem += sizeof(struct nes_hw_qp_wqe) * rq_size;
  898. nesqp->hwqp.q2_vbase = mem;
  899. nesqp->hwqp.q2_pbase = nesqp->hwqp.rq_pbase +
  900. sizeof(struct nes_hw_qp_wqe) * rq_size;
  901. mem += 256;
  902. memset(nesqp->hwqp.q2_vbase, 0, 256);
  903. nesqp->nesqp_context = mem;
  904. nesqp->nesqp_context_pbase = nesqp->hwqp.q2_pbase + 256;
  905. memset(nesqp->nesqp_context, 0, sizeof(*nesqp->nesqp_context));
  906. return 0;
  907. }
  908. /**
  909. * nes_free_qp_mem() is to free up the qp's pci_alloc_consistent() memory.
  910. */
  911. static inline void nes_free_qp_mem(struct nes_device *nesdev,
  912. struct nes_qp *nesqp, int virt_wqs)
  913. {
  914. unsigned long flags;
  915. struct nes_adapter *nesadapter = nesdev->nesadapter;
  916. if (!virt_wqs) {
  917. pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size,
  918. nesqp->hwqp.sq_vbase, nesqp->hwqp.sq_pbase);
  919. }else {
  920. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  921. nesadapter->free_256pbl++;
  922. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  923. pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size, nesqp->hwqp.q2_vbase, nesqp->hwqp.q2_pbase);
  924. pci_free_consistent(nesdev->pcidev, 256, nesqp->pbl_vbase, nesqp->pbl_pbase );
  925. nesqp->pbl_vbase = NULL;
  926. if (nesqp->sq_kmapped) {
  927. nesqp->sq_kmapped = 0;
  928. kunmap(nesqp->page);
  929. }
  930. }
  931. }
  932. /**
  933. * nes_create_qp
  934. */
  935. static struct ib_qp *nes_create_qp(struct ib_pd *ibpd,
  936. struct ib_qp_init_attr *init_attr, struct ib_udata *udata)
  937. {
  938. u64 u64temp= 0;
  939. u64 u64nesqp = 0;
  940. struct nes_pd *nespd = to_nespd(ibpd);
  941. struct nes_vnic *nesvnic = to_nesvnic(ibpd->device);
  942. struct nes_device *nesdev = nesvnic->nesdev;
  943. struct nes_adapter *nesadapter = nesdev->nesadapter;
  944. struct nes_qp *nesqp;
  945. struct nes_cq *nescq;
  946. struct nes_ucontext *nes_ucontext;
  947. struct nes_hw_cqp_wqe *cqp_wqe;
  948. struct nes_cqp_request *cqp_request;
  949. struct nes_create_qp_req req;
  950. struct nes_create_qp_resp uresp;
  951. struct nes_pbl *nespbl = NULL;
  952. u32 qp_num = 0;
  953. u32 opcode = 0;
  954. /* u32 counter = 0; */
  955. void *mem;
  956. unsigned long flags;
  957. int ret;
  958. int err;
  959. int virt_wqs = 0;
  960. int sq_size;
  961. int rq_size;
  962. u8 sq_encoded_size;
  963. u8 rq_encoded_size;
  964. /* int counter; */
  965. if (init_attr->create_flags)
  966. return ERR_PTR(-EINVAL);
  967. atomic_inc(&qps_created);
  968. switch (init_attr->qp_type) {
  969. case IB_QPT_RC:
  970. if (nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) {
  971. init_attr->cap.max_inline_data = 0;
  972. } else {
  973. init_attr->cap.max_inline_data = 64;
  974. }
  975. sq_size = init_attr->cap.max_send_wr;
  976. rq_size = init_attr->cap.max_recv_wr;
  977. /* check if the encoded sizes are OK or not... */
  978. sq_encoded_size = nes_get_encoded_size(&sq_size);
  979. rq_encoded_size = nes_get_encoded_size(&rq_size);
  980. if ((!sq_encoded_size) || (!rq_encoded_size)) {
  981. nes_debug(NES_DBG_QP, "ERROR bad rq (%u) or sq (%u) size\n",
  982. rq_size, sq_size);
  983. return ERR_PTR(-EINVAL);
  984. }
  985. init_attr->cap.max_send_wr = sq_size -2;
  986. init_attr->cap.max_recv_wr = rq_size -1;
  987. nes_debug(NES_DBG_QP, "RQ size=%u, SQ Size=%u\n", rq_size, sq_size);
  988. ret = nes_alloc_resource(nesadapter, nesadapter->allocated_qps,
  989. nesadapter->max_qp, &qp_num, &nesadapter->next_qp);
  990. if (ret) {
  991. return ERR_PTR(ret);
  992. }
  993. /* Need 512 (actually now 1024) byte alignment on this structure */
  994. mem = kzalloc(sizeof(*nesqp)+NES_SW_CONTEXT_ALIGN-1, GFP_KERNEL);
  995. if (!mem) {
  996. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  997. nes_debug(NES_DBG_QP, "Unable to allocate QP\n");
  998. return ERR_PTR(-ENOMEM);
  999. }
  1000. u64nesqp = (unsigned long)mem;
  1001. u64nesqp += ((u64)NES_SW_CONTEXT_ALIGN) - 1;
  1002. u64temp = ((u64)NES_SW_CONTEXT_ALIGN) - 1;
  1003. u64nesqp &= ~u64temp;
  1004. nesqp = (struct nes_qp *)(unsigned long)u64nesqp;
  1005. /* nes_debug(NES_DBG_QP, "nesqp=%p, allocated buffer=%p. Rounded to closest %u\n",
  1006. nesqp, mem, NES_SW_CONTEXT_ALIGN); */
  1007. nesqp->allocated_buffer = mem;
  1008. if (udata) {
  1009. if (ib_copy_from_udata(&req, udata, sizeof(struct nes_create_qp_req))) {
  1010. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  1011. kfree(nesqp->allocated_buffer);
  1012. nes_debug(NES_DBG_QP, "ib_copy_from_udata() Failed \n");
  1013. return ERR_PTR(-EFAULT);
  1014. }
  1015. if (req.user_wqe_buffers) {
  1016. virt_wqs = 1;
  1017. }
  1018. if ((ibpd->uobject) && (ibpd->uobject->context)) {
  1019. nesqp->user_mode = 1;
  1020. nes_ucontext = to_nesucontext(ibpd->uobject->context);
  1021. if (virt_wqs) {
  1022. err = 1;
  1023. list_for_each_entry(nespbl, &nes_ucontext->qp_reg_mem_list, list) {
  1024. if (nespbl->user_base == (unsigned long )req.user_wqe_buffers) {
  1025. list_del(&nespbl->list);
  1026. err = 0;
  1027. nes_debug(NES_DBG_QP, "Found PBL for virtual QP. nespbl=%p. user_base=0x%lx\n",
  1028. nespbl, nespbl->user_base);
  1029. break;
  1030. }
  1031. }
  1032. if (err) {
  1033. nes_debug(NES_DBG_QP, "Didn't Find PBL for virtual QP. address = %llx.\n",
  1034. (long long unsigned int)req.user_wqe_buffers);
  1035. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  1036. kfree(nesqp->allocated_buffer);
  1037. return ERR_PTR(-EFAULT);
  1038. }
  1039. }
  1040. nes_ucontext = to_nesucontext(ibpd->uobject->context);
  1041. nesqp->mmap_sq_db_index =
  1042. find_next_zero_bit(nes_ucontext->allocated_wqs,
  1043. NES_MAX_USER_WQ_REGIONS, nes_ucontext->first_free_wq);
  1044. /* nes_debug(NES_DBG_QP, "find_first_zero_biton wqs returned %u\n",
  1045. nespd->mmap_db_index); */
  1046. if (nesqp->mmap_sq_db_index >= NES_MAX_USER_WQ_REGIONS) {
  1047. nes_debug(NES_DBG_QP,
  1048. "db index > max user regions, failing create QP\n");
  1049. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  1050. if (virt_wqs) {
  1051. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size, nespbl->pbl_vbase,
  1052. nespbl->pbl_pbase);
  1053. kfree(nespbl);
  1054. }
  1055. kfree(nesqp->allocated_buffer);
  1056. return ERR_PTR(-ENOMEM);
  1057. }
  1058. set_bit(nesqp->mmap_sq_db_index, nes_ucontext->allocated_wqs);
  1059. nes_ucontext->mmap_nesqp[nesqp->mmap_sq_db_index] = nesqp;
  1060. nes_ucontext->first_free_wq = nesqp->mmap_sq_db_index + 1;
  1061. } else {
  1062. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  1063. kfree(nesqp->allocated_buffer);
  1064. return ERR_PTR(-EFAULT);
  1065. }
  1066. }
  1067. err = (!virt_wqs) ? nes_setup_mmap_qp(nesqp, nesvnic, sq_size, rq_size) :
  1068. nes_setup_virt_qp(nesqp, nespbl, nesvnic, sq_size, rq_size);
  1069. if (err) {
  1070. nes_debug(NES_DBG_QP,
  1071. "error geting qp mem code = %d\n", err);
  1072. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  1073. kfree(nesqp->allocated_buffer);
  1074. return ERR_PTR(-ENOMEM);
  1075. }
  1076. nesqp->hwqp.sq_size = sq_size;
  1077. nesqp->hwqp.sq_encoded_size = sq_encoded_size;
  1078. nesqp->hwqp.sq_head = 1;
  1079. nesqp->hwqp.rq_size = rq_size;
  1080. nesqp->hwqp.rq_encoded_size = rq_encoded_size;
  1081. /* nes_debug(NES_DBG_QP, "nesqp->nesqp_context_pbase = %p\n",
  1082. (void *)nesqp->nesqp_context_pbase);
  1083. */
  1084. nesqp->hwqp.qp_id = qp_num;
  1085. nesqp->ibqp.qp_num = nesqp->hwqp.qp_id;
  1086. nesqp->nespd = nespd;
  1087. nescq = to_nescq(init_attr->send_cq);
  1088. nesqp->nesscq = nescq;
  1089. nescq = to_nescq(init_attr->recv_cq);
  1090. nesqp->nesrcq = nescq;
  1091. nesqp->nesqp_context->misc |= cpu_to_le32((u32)PCI_FUNC(nesdev->pcidev->devfn) <<
  1092. NES_QPCONTEXT_MISC_PCI_FCN_SHIFT);
  1093. nesqp->nesqp_context->misc |= cpu_to_le32((u32)nesqp->hwqp.rq_encoded_size <<
  1094. NES_QPCONTEXT_MISC_RQ_SIZE_SHIFT);
  1095. nesqp->nesqp_context->misc |= cpu_to_le32((u32)nesqp->hwqp.sq_encoded_size <<
  1096. NES_QPCONTEXT_MISC_SQ_SIZE_SHIFT);
  1097. if (!udata) {
  1098. nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_PRIV_EN);
  1099. nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_FAST_REGISTER_EN);
  1100. }
  1101. nesqp->nesqp_context->cqs = cpu_to_le32(nesqp->nesscq->hw_cq.cq_number +
  1102. ((u32)nesqp->nesrcq->hw_cq.cq_number << 16));
  1103. u64temp = (u64)nesqp->hwqp.sq_pbase;
  1104. nesqp->nesqp_context->sq_addr_low = cpu_to_le32((u32)u64temp);
  1105. nesqp->nesqp_context->sq_addr_high = cpu_to_le32((u32)(u64temp >> 32));
  1106. if (!virt_wqs) {
  1107. u64temp = (u64)nesqp->hwqp.sq_pbase;
  1108. nesqp->nesqp_context->sq_addr_low = cpu_to_le32((u32)u64temp);
  1109. nesqp->nesqp_context->sq_addr_high = cpu_to_le32((u32)(u64temp >> 32));
  1110. u64temp = (u64)nesqp->hwqp.rq_pbase;
  1111. nesqp->nesqp_context->rq_addr_low = cpu_to_le32((u32)u64temp);
  1112. nesqp->nesqp_context->rq_addr_high = cpu_to_le32((u32)(u64temp >> 32));
  1113. } else {
  1114. u64temp = (u64)nesqp->pbl_pbase;
  1115. nesqp->nesqp_context->rq_addr_low = cpu_to_le32((u32)u64temp);
  1116. nesqp->nesqp_context->rq_addr_high = cpu_to_le32((u32)(u64temp >> 32));
  1117. }
  1118. /* nes_debug(NES_DBG_QP, "next_qp_nic_index=%u, using nic_index=%d\n",
  1119. nesvnic->next_qp_nic_index,
  1120. nesvnic->qp_nic_index[nesvnic->next_qp_nic_index]); */
  1121. spin_lock_irqsave(&nesdev->cqp.lock, flags);
  1122. nesqp->nesqp_context->misc2 |= cpu_to_le32(
  1123. (u32)nesvnic->qp_nic_index[nesvnic->next_qp_nic_index] <<
  1124. NES_QPCONTEXT_MISC2_NIC_INDEX_SHIFT);
  1125. nesvnic->next_qp_nic_index++;
  1126. if ((nesvnic->next_qp_nic_index > 3) ||
  1127. (nesvnic->qp_nic_index[nesvnic->next_qp_nic_index] == 0xf)) {
  1128. nesvnic->next_qp_nic_index = 0;
  1129. }
  1130. spin_unlock_irqrestore(&nesdev->cqp.lock, flags);
  1131. nesqp->nesqp_context->pd_index_wscale |= cpu_to_le32((u32)nesqp->nespd->pd_id << 16);
  1132. u64temp = (u64)nesqp->hwqp.q2_pbase;
  1133. nesqp->nesqp_context->q2_addr_low = cpu_to_le32((u32)u64temp);
  1134. nesqp->nesqp_context->q2_addr_high = cpu_to_le32((u32)(u64temp >> 32));
  1135. nesqp->nesqp_context->aeq_token_low = cpu_to_le32((u32)((unsigned long)(nesqp)));
  1136. nesqp->nesqp_context->aeq_token_high = cpu_to_le32((u32)(upper_32_bits((unsigned long)(nesqp))));
  1137. nesqp->nesqp_context->ird_ord_sizes = cpu_to_le32(NES_QPCONTEXT_ORDIRD_ALSMM |
  1138. NES_QPCONTEXT_ORDIRD_AAH |
  1139. ((((u32)nesadapter->max_irrq_wr) <<
  1140. NES_QPCONTEXT_ORDIRD_IRDSIZE_SHIFT) & NES_QPCONTEXT_ORDIRD_IRDSIZE_MASK));
  1141. if (disable_mpa_crc) {
  1142. nes_debug(NES_DBG_QP, "Disabling MPA crc checking due to module option.\n");
  1143. nesqp->nesqp_context->ird_ord_sizes |= cpu_to_le32(NES_QPCONTEXT_ORDIRD_RNMC);
  1144. }
  1145. /* Create the QP */
  1146. cqp_request = nes_get_cqp_request(nesdev);
  1147. if (cqp_request == NULL) {
  1148. nes_debug(NES_DBG_QP, "Failed to get a cqp_request\n");
  1149. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  1150. nes_free_qp_mem(nesdev, nesqp,virt_wqs);
  1151. kfree(nesqp->allocated_buffer);
  1152. return ERR_PTR(-ENOMEM);
  1153. }
  1154. cqp_request->waiting = 1;
  1155. cqp_wqe = &cqp_request->cqp_wqe;
  1156. if (!virt_wqs) {
  1157. opcode = NES_CQP_CREATE_QP | NES_CQP_QP_TYPE_IWARP |
  1158. NES_CQP_QP_IWARP_STATE_IDLE;
  1159. } else {
  1160. opcode = NES_CQP_CREATE_QP | NES_CQP_QP_TYPE_IWARP | NES_CQP_QP_VIRT_WQS |
  1161. NES_CQP_QP_IWARP_STATE_IDLE;
  1162. }
  1163. opcode |= NES_CQP_QP_CQS_VALID;
  1164. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  1165. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
  1166. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX, nesqp->hwqp.qp_id);
  1167. u64temp = (u64)nesqp->nesqp_context_pbase;
  1168. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, u64temp);
  1169. atomic_set(&cqp_request->refcount, 2);
  1170. nes_post_cqp_request(nesdev, cqp_request);
  1171. /* Wait for CQP */
  1172. nes_debug(NES_DBG_QP, "Waiting for create iWARP QP%u to complete.\n",
  1173. nesqp->hwqp.qp_id);
  1174. ret = wait_event_timeout(cqp_request->waitq,
  1175. (cqp_request->request_done != 0), NES_EVENT_TIMEOUT);
  1176. nes_debug(NES_DBG_QP, "Create iwarp QP%u completed, wait_event_timeout ret=%u,"
  1177. " nesdev->cqp_head = %u, nesdev->cqp.sq_tail = %u,"
  1178. " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
  1179. nesqp->hwqp.qp_id, ret, nesdev->cqp.sq_head, nesdev->cqp.sq_tail,
  1180. cqp_request->major_code, cqp_request->minor_code);
  1181. if ((!ret) || (cqp_request->major_code)) {
  1182. nes_put_cqp_request(nesdev, cqp_request);
  1183. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  1184. nes_free_qp_mem(nesdev, nesqp,virt_wqs);
  1185. kfree(nesqp->allocated_buffer);
  1186. if (!ret) {
  1187. return ERR_PTR(-ETIME);
  1188. } else {
  1189. return ERR_PTR(-EIO);
  1190. }
  1191. }
  1192. nes_put_cqp_request(nesdev, cqp_request);
  1193. if (ibpd->uobject) {
  1194. uresp.mmap_sq_db_index = nesqp->mmap_sq_db_index;
  1195. uresp.actual_sq_size = sq_size;
  1196. uresp.actual_rq_size = rq_size;
  1197. uresp.qp_id = nesqp->hwqp.qp_id;
  1198. uresp.nes_drv_opt = nes_drv_opt;
  1199. if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
  1200. nes_free_resource(nesadapter, nesadapter->allocated_qps, qp_num);
  1201. nes_free_qp_mem(nesdev, nesqp,virt_wqs);
  1202. kfree(nesqp->allocated_buffer);
  1203. return ERR_PTR(-EFAULT);
  1204. }
  1205. }
  1206. nes_debug(NES_DBG_QP, "QP%u structure located @%p.Size = %u.\n",
  1207. nesqp->hwqp.qp_id, nesqp, (u32)sizeof(*nesqp));
  1208. spin_lock_init(&nesqp->lock);
  1209. nes_add_ref(&nesqp->ibqp);
  1210. break;
  1211. default:
  1212. nes_debug(NES_DBG_QP, "Invalid QP type: %d\n", init_attr->qp_type);
  1213. return ERR_PTR(-EINVAL);
  1214. }
  1215. nesqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR);
  1216. init_timer(&nesqp->terminate_timer);
  1217. nesqp->terminate_timer.function = nes_terminate_timeout;
  1218. nesqp->terminate_timer.data = (unsigned long)nesqp;
  1219. /* update the QP table */
  1220. nesdev->nesadapter->qp_table[nesqp->hwqp.qp_id-NES_FIRST_QPN] = nesqp;
  1221. nes_debug(NES_DBG_QP, "netdev refcnt=%u\n",
  1222. netdev_refcnt_read(nesvnic->netdev));
  1223. return &nesqp->ibqp;
  1224. }
  1225. /**
  1226. * nes_clean_cq
  1227. */
  1228. static void nes_clean_cq(struct nes_qp *nesqp, struct nes_cq *nescq)
  1229. {
  1230. u32 cq_head;
  1231. u32 lo;
  1232. u32 hi;
  1233. u64 u64temp;
  1234. unsigned long flags = 0;
  1235. spin_lock_irqsave(&nescq->lock, flags);
  1236. cq_head = nescq->hw_cq.cq_head;
  1237. while (le32_to_cpu(nescq->hw_cq.cq_vbase[cq_head].cqe_words[NES_CQE_OPCODE_IDX]) & NES_CQE_VALID) {
  1238. rmb();
  1239. lo = le32_to_cpu(nescq->hw_cq.cq_vbase[cq_head].cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX]);
  1240. hi = le32_to_cpu(nescq->hw_cq.cq_vbase[cq_head].cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX]);
  1241. u64temp = (((u64)hi) << 32) | ((u64)lo);
  1242. u64temp &= ~(NES_SW_CONTEXT_ALIGN-1);
  1243. if (u64temp == (u64)(unsigned long)nesqp) {
  1244. /* Zero the context value so cqe will be ignored */
  1245. nescq->hw_cq.cq_vbase[cq_head].cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX] = 0;
  1246. nescq->hw_cq.cq_vbase[cq_head].cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX] = 0;
  1247. }
  1248. if (++cq_head >= nescq->hw_cq.cq_size)
  1249. cq_head = 0;
  1250. }
  1251. spin_unlock_irqrestore(&nescq->lock, flags);
  1252. }
  1253. /**
  1254. * nes_destroy_qp
  1255. */
  1256. static int nes_destroy_qp(struct ib_qp *ibqp)
  1257. {
  1258. struct nes_qp *nesqp = to_nesqp(ibqp);
  1259. struct nes_ucontext *nes_ucontext;
  1260. struct ib_qp_attr attr;
  1261. struct iw_cm_id *cm_id;
  1262. struct iw_cm_event cm_event;
  1263. int ret = 0;
  1264. atomic_inc(&sw_qps_destroyed);
  1265. nesqp->destroyed = 1;
  1266. /* Blow away the connection if it exists. */
  1267. if (nesqp->ibqp_state >= IB_QPS_INIT && nesqp->ibqp_state <= IB_QPS_RTS) {
  1268. /* if (nesqp->ibqp_state == IB_QPS_RTS) { */
  1269. attr.qp_state = IB_QPS_ERR;
  1270. nes_modify_qp(&nesqp->ibqp, &attr, IB_QP_STATE, NULL);
  1271. }
  1272. if (((nesqp->ibqp_state == IB_QPS_INIT) ||
  1273. (nesqp->ibqp_state == IB_QPS_RTR)) && (nesqp->cm_id)) {
  1274. cm_id = nesqp->cm_id;
  1275. cm_event.event = IW_CM_EVENT_CONNECT_REPLY;
  1276. cm_event.status = -ETIMEDOUT;
  1277. cm_event.local_addr = cm_id->local_addr;
  1278. cm_event.remote_addr = cm_id->remote_addr;
  1279. cm_event.private_data = NULL;
  1280. cm_event.private_data_len = 0;
  1281. nes_debug(NES_DBG_QP, "Generating a CM Timeout Event for "
  1282. "QP%u. cm_id = %p, refcount = %u. \n",
  1283. nesqp->hwqp.qp_id, cm_id, atomic_read(&nesqp->refcount));
  1284. cm_id->rem_ref(cm_id);
  1285. ret = cm_id->event_handler(cm_id, &cm_event);
  1286. if (ret)
  1287. nes_debug(NES_DBG_QP, "OFA CM event_handler returned, ret=%d\n", ret);
  1288. }
  1289. if (nesqp->user_mode) {
  1290. if ((ibqp->uobject)&&(ibqp->uobject->context)) {
  1291. nes_ucontext = to_nesucontext(ibqp->uobject->context);
  1292. clear_bit(nesqp->mmap_sq_db_index, nes_ucontext->allocated_wqs);
  1293. nes_ucontext->mmap_nesqp[nesqp->mmap_sq_db_index] = NULL;
  1294. if (nes_ucontext->first_free_wq > nesqp->mmap_sq_db_index) {
  1295. nes_ucontext->first_free_wq = nesqp->mmap_sq_db_index;
  1296. }
  1297. }
  1298. if (nesqp->pbl_pbase && nesqp->sq_kmapped) {
  1299. nesqp->sq_kmapped = 0;
  1300. kunmap(nesqp->page);
  1301. }
  1302. } else {
  1303. /* Clean any pending completions from the cq(s) */
  1304. if (nesqp->nesscq)
  1305. nes_clean_cq(nesqp, nesqp->nesscq);
  1306. if ((nesqp->nesrcq) && (nesqp->nesrcq != nesqp->nesscq))
  1307. nes_clean_cq(nesqp, nesqp->nesrcq);
  1308. }
  1309. nes_rem_ref(&nesqp->ibqp);
  1310. return 0;
  1311. }
  1312. /**
  1313. * nes_create_cq
  1314. */
  1315. static struct ib_cq *nes_create_cq(struct ib_device *ibdev, int entries,
  1316. int comp_vector,
  1317. struct ib_ucontext *context, struct ib_udata *udata)
  1318. {
  1319. u64 u64temp;
  1320. struct nes_vnic *nesvnic = to_nesvnic(ibdev);
  1321. struct nes_device *nesdev = nesvnic->nesdev;
  1322. struct nes_adapter *nesadapter = nesdev->nesadapter;
  1323. struct nes_cq *nescq;
  1324. struct nes_ucontext *nes_ucontext = NULL;
  1325. struct nes_cqp_request *cqp_request;
  1326. void *mem = NULL;
  1327. struct nes_hw_cqp_wqe *cqp_wqe;
  1328. struct nes_pbl *nespbl = NULL;
  1329. struct nes_create_cq_req req;
  1330. struct nes_create_cq_resp resp;
  1331. u32 cq_num = 0;
  1332. u32 opcode = 0;
  1333. u32 pbl_entries = 1;
  1334. int err;
  1335. unsigned long flags;
  1336. int ret;
  1337. if (entries > nesadapter->max_cqe)
  1338. return ERR_PTR(-EINVAL);
  1339. err = nes_alloc_resource(nesadapter, nesadapter->allocated_cqs,
  1340. nesadapter->max_cq, &cq_num, &nesadapter->next_cq);
  1341. if (err) {
  1342. return ERR_PTR(err);
  1343. }
  1344. nescq = kzalloc(sizeof(struct nes_cq), GFP_KERNEL);
  1345. if (!nescq) {
  1346. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1347. nes_debug(NES_DBG_CQ, "Unable to allocate nes_cq struct\n");
  1348. return ERR_PTR(-ENOMEM);
  1349. }
  1350. nescq->hw_cq.cq_size = max(entries + 1, 5);
  1351. nescq->hw_cq.cq_number = cq_num;
  1352. nescq->ibcq.cqe = nescq->hw_cq.cq_size - 1;
  1353. if (context) {
  1354. nes_ucontext = to_nesucontext(context);
  1355. if (ib_copy_from_udata(&req, udata, sizeof (struct nes_create_cq_req))) {
  1356. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1357. kfree(nescq);
  1358. return ERR_PTR(-EFAULT);
  1359. }
  1360. nesvnic->mcrq_ucontext = nes_ucontext;
  1361. nes_ucontext->mcrqf = req.mcrqf;
  1362. if (nes_ucontext->mcrqf) {
  1363. if (nes_ucontext->mcrqf & 0x80000000)
  1364. nescq->hw_cq.cq_number = nesvnic->nic.qp_id + 28 + 2 * ((nes_ucontext->mcrqf & 0xf) - 1);
  1365. else if (nes_ucontext->mcrqf & 0x40000000)
  1366. nescq->hw_cq.cq_number = nes_ucontext->mcrqf & 0xffff;
  1367. else
  1368. nescq->hw_cq.cq_number = nesvnic->mcrq_qp_id + nes_ucontext->mcrqf-1;
  1369. nescq->mcrqf = nes_ucontext->mcrqf;
  1370. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1371. }
  1372. nes_debug(NES_DBG_CQ, "CQ Virtual Address = %08lX, size = %u.\n",
  1373. (unsigned long)req.user_cq_buffer, entries);
  1374. err = 1;
  1375. list_for_each_entry(nespbl, &nes_ucontext->cq_reg_mem_list, list) {
  1376. if (nespbl->user_base == (unsigned long )req.user_cq_buffer) {
  1377. list_del(&nespbl->list);
  1378. err = 0;
  1379. nes_debug(NES_DBG_CQ, "Found PBL for virtual CQ. nespbl=%p.\n",
  1380. nespbl);
  1381. break;
  1382. }
  1383. }
  1384. if (err) {
  1385. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1386. kfree(nescq);
  1387. return ERR_PTR(-EFAULT);
  1388. }
  1389. pbl_entries = nespbl->pbl_size >> 3;
  1390. nescq->cq_mem_size = 0;
  1391. } else {
  1392. nescq->cq_mem_size = nescq->hw_cq.cq_size * sizeof(struct nes_hw_cqe);
  1393. nes_debug(NES_DBG_CQ, "Attempting to allocate pci memory (%u entries, %u bytes) for CQ%u.\n",
  1394. entries, nescq->cq_mem_size, nescq->hw_cq.cq_number);
  1395. /* allocate the physical buffer space */
  1396. mem = pci_alloc_consistent(nesdev->pcidev, nescq->cq_mem_size,
  1397. &nescq->hw_cq.cq_pbase);
  1398. if (!mem) {
  1399. printk(KERN_ERR PFX "Unable to allocate pci memory for cq\n");
  1400. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1401. kfree(nescq);
  1402. return ERR_PTR(-ENOMEM);
  1403. }
  1404. memset(mem, 0, nescq->cq_mem_size);
  1405. nescq->hw_cq.cq_vbase = mem;
  1406. nescq->hw_cq.cq_head = 0;
  1407. nes_debug(NES_DBG_CQ, "CQ%u virtual address @ %p, phys = 0x%08X\n",
  1408. nescq->hw_cq.cq_number, nescq->hw_cq.cq_vbase,
  1409. (u32)nescq->hw_cq.cq_pbase);
  1410. }
  1411. nescq->hw_cq.ce_handler = nes_iwarp_ce_handler;
  1412. spin_lock_init(&nescq->lock);
  1413. /* send CreateCQ request to CQP */
  1414. cqp_request = nes_get_cqp_request(nesdev);
  1415. if (cqp_request == NULL) {
  1416. nes_debug(NES_DBG_CQ, "Failed to get a cqp_request.\n");
  1417. if (!context)
  1418. pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size, mem,
  1419. nescq->hw_cq.cq_pbase);
  1420. else {
  1421. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size,
  1422. nespbl->pbl_vbase, nespbl->pbl_pbase);
  1423. kfree(nespbl);
  1424. }
  1425. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1426. kfree(nescq);
  1427. return ERR_PTR(-ENOMEM);
  1428. }
  1429. cqp_request->waiting = 1;
  1430. cqp_wqe = &cqp_request->cqp_wqe;
  1431. opcode = NES_CQP_CREATE_CQ | NES_CQP_CQ_CEQ_VALID |
  1432. NES_CQP_CQ_CHK_OVERFLOW |
  1433. NES_CQP_CQ_CEQE_MASK | ((u32)nescq->hw_cq.cq_size << 16);
  1434. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  1435. if (pbl_entries != 1) {
  1436. if (pbl_entries > 32) {
  1437. /* use 4k pbl */
  1438. nes_debug(NES_DBG_CQ, "pbl_entries=%u, use a 4k PBL\n", pbl_entries);
  1439. if (nesadapter->free_4kpbl == 0) {
  1440. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  1441. nes_free_cqp_request(nesdev, cqp_request);
  1442. if (!context)
  1443. pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size, mem,
  1444. nescq->hw_cq.cq_pbase);
  1445. else {
  1446. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size,
  1447. nespbl->pbl_vbase, nespbl->pbl_pbase);
  1448. kfree(nespbl);
  1449. }
  1450. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1451. kfree(nescq);
  1452. return ERR_PTR(-ENOMEM);
  1453. } else {
  1454. opcode |= (NES_CQP_CQ_VIRT | NES_CQP_CQ_4KB_CHUNK);
  1455. nescq->virtual_cq = 2;
  1456. nesadapter->free_4kpbl--;
  1457. }
  1458. } else {
  1459. /* use 256 byte pbl */
  1460. nes_debug(NES_DBG_CQ, "pbl_entries=%u, use a 256 byte PBL\n", pbl_entries);
  1461. if (nesadapter->free_256pbl == 0) {
  1462. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  1463. nes_free_cqp_request(nesdev, cqp_request);
  1464. if (!context)
  1465. pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size, mem,
  1466. nescq->hw_cq.cq_pbase);
  1467. else {
  1468. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size,
  1469. nespbl->pbl_vbase, nespbl->pbl_pbase);
  1470. kfree(nespbl);
  1471. }
  1472. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1473. kfree(nescq);
  1474. return ERR_PTR(-ENOMEM);
  1475. } else {
  1476. opcode |= NES_CQP_CQ_VIRT;
  1477. nescq->virtual_cq = 1;
  1478. nesadapter->free_256pbl--;
  1479. }
  1480. }
  1481. }
  1482. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  1483. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  1484. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
  1485. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX,
  1486. (nescq->hw_cq.cq_number | ((u32)nesdev->ceq_index << 16)));
  1487. if (context) {
  1488. if (pbl_entries != 1)
  1489. u64temp = (u64)nespbl->pbl_pbase;
  1490. else
  1491. u64temp = le64_to_cpu(nespbl->pbl_vbase[0]);
  1492. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_CQ_WQE_DOORBELL_INDEX_HIGH_IDX,
  1493. nes_ucontext->mmap_db_index[0]);
  1494. } else {
  1495. u64temp = (u64)nescq->hw_cq.cq_pbase;
  1496. cqp_wqe->wqe_words[NES_CQP_CQ_WQE_DOORBELL_INDEX_HIGH_IDX] = 0;
  1497. }
  1498. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_CQ_WQE_PBL_LOW_IDX, u64temp);
  1499. cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_HIGH_IDX] = 0;
  1500. u64temp = (u64)(unsigned long)&nescq->hw_cq;
  1501. cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_LOW_IDX] =
  1502. cpu_to_le32((u32)(u64temp >> 1));
  1503. cqp_wqe->wqe_words[NES_CQP_CQ_WQE_CQ_CONTEXT_HIGH_IDX] =
  1504. cpu_to_le32(((u32)((u64temp) >> 33)) & 0x7FFFFFFF);
  1505. atomic_set(&cqp_request->refcount, 2);
  1506. nes_post_cqp_request(nesdev, cqp_request);
  1507. /* Wait for CQP */
  1508. nes_debug(NES_DBG_CQ, "Waiting for create iWARP CQ%u to complete.\n",
  1509. nescq->hw_cq.cq_number);
  1510. ret = wait_event_timeout(cqp_request->waitq, (0 != cqp_request->request_done),
  1511. NES_EVENT_TIMEOUT * 2);
  1512. nes_debug(NES_DBG_CQ, "Create iWARP CQ%u completed, wait_event_timeout ret = %d.\n",
  1513. nescq->hw_cq.cq_number, ret);
  1514. if ((!ret) || (cqp_request->major_code)) {
  1515. nes_put_cqp_request(nesdev, cqp_request);
  1516. if (!context)
  1517. pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size, mem,
  1518. nescq->hw_cq.cq_pbase);
  1519. else {
  1520. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size,
  1521. nespbl->pbl_vbase, nespbl->pbl_pbase);
  1522. kfree(nespbl);
  1523. }
  1524. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1525. kfree(nescq);
  1526. return ERR_PTR(-EIO);
  1527. }
  1528. nes_put_cqp_request(nesdev, cqp_request);
  1529. if (context) {
  1530. /* free the nespbl */
  1531. pci_free_consistent(nesdev->pcidev, nespbl->pbl_size, nespbl->pbl_vbase,
  1532. nespbl->pbl_pbase);
  1533. kfree(nespbl);
  1534. resp.cq_id = nescq->hw_cq.cq_number;
  1535. resp.cq_size = nescq->hw_cq.cq_size;
  1536. resp.mmap_db_index = 0;
  1537. if (ib_copy_to_udata(udata, &resp, sizeof resp)) {
  1538. nes_free_resource(nesadapter, nesadapter->allocated_cqs, cq_num);
  1539. kfree(nescq);
  1540. return ERR_PTR(-EFAULT);
  1541. }
  1542. }
  1543. return &nescq->ibcq;
  1544. }
  1545. /**
  1546. * nes_destroy_cq
  1547. */
  1548. static int nes_destroy_cq(struct ib_cq *ib_cq)
  1549. {
  1550. struct nes_cq *nescq;
  1551. struct nes_device *nesdev;
  1552. struct nes_vnic *nesvnic;
  1553. struct nes_adapter *nesadapter;
  1554. struct nes_hw_cqp_wqe *cqp_wqe;
  1555. struct nes_cqp_request *cqp_request;
  1556. unsigned long flags;
  1557. u32 opcode = 0;
  1558. int ret;
  1559. if (ib_cq == NULL)
  1560. return 0;
  1561. nescq = to_nescq(ib_cq);
  1562. nesvnic = to_nesvnic(ib_cq->device);
  1563. nesdev = nesvnic->nesdev;
  1564. nesadapter = nesdev->nesadapter;
  1565. nes_debug(NES_DBG_CQ, "Destroy CQ%u\n", nescq->hw_cq.cq_number);
  1566. /* Send DestroyCQ request to CQP */
  1567. cqp_request = nes_get_cqp_request(nesdev);
  1568. if (cqp_request == NULL) {
  1569. nes_debug(NES_DBG_CQ, "Failed to get a cqp_request.\n");
  1570. return -ENOMEM;
  1571. }
  1572. cqp_request->waiting = 1;
  1573. cqp_wqe = &cqp_request->cqp_wqe;
  1574. opcode = NES_CQP_DESTROY_CQ | (nescq->hw_cq.cq_size << 16);
  1575. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  1576. if (nescq->virtual_cq == 1) {
  1577. nesadapter->free_256pbl++;
  1578. if (nesadapter->free_256pbl > nesadapter->max_256pbl) {
  1579. printk(KERN_ERR PFX "%s: free 256B PBLs(%u) has exceeded the max(%u)\n",
  1580. __func__, nesadapter->free_256pbl, nesadapter->max_256pbl);
  1581. }
  1582. } else if (nescq->virtual_cq == 2) {
  1583. nesadapter->free_4kpbl++;
  1584. if (nesadapter->free_4kpbl > nesadapter->max_4kpbl) {
  1585. printk(KERN_ERR PFX "%s: free 4K PBLs(%u) has exceeded the max(%u)\n",
  1586. __func__, nesadapter->free_4kpbl, nesadapter->max_4kpbl);
  1587. }
  1588. opcode |= NES_CQP_CQ_4KB_CHUNK;
  1589. }
  1590. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  1591. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  1592. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
  1593. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX,
  1594. (nescq->hw_cq.cq_number | ((u32)PCI_FUNC(nesdev->pcidev->devfn) << 16)));
  1595. if (!nescq->mcrqf)
  1596. nes_free_resource(nesadapter, nesadapter->allocated_cqs, nescq->hw_cq.cq_number);
  1597. atomic_set(&cqp_request->refcount, 2);
  1598. nes_post_cqp_request(nesdev, cqp_request);
  1599. /* Wait for CQP */
  1600. nes_debug(NES_DBG_CQ, "Waiting for destroy iWARP CQ%u to complete.\n",
  1601. nescq->hw_cq.cq_number);
  1602. ret = wait_event_timeout(cqp_request->waitq, (0 != cqp_request->request_done),
  1603. NES_EVENT_TIMEOUT);
  1604. nes_debug(NES_DBG_CQ, "Destroy iWARP CQ%u completed, wait_event_timeout ret = %u,"
  1605. " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
  1606. nescq->hw_cq.cq_number, ret, cqp_request->major_code,
  1607. cqp_request->minor_code);
  1608. if (!ret) {
  1609. nes_debug(NES_DBG_CQ, "iWARP CQ%u destroy timeout expired\n",
  1610. nescq->hw_cq.cq_number);
  1611. ret = -ETIME;
  1612. } else if (cqp_request->major_code) {
  1613. nes_debug(NES_DBG_CQ, "iWARP CQ%u destroy failed\n",
  1614. nescq->hw_cq.cq_number);
  1615. ret = -EIO;
  1616. } else {
  1617. ret = 0;
  1618. }
  1619. nes_put_cqp_request(nesdev, cqp_request);
  1620. if (nescq->cq_mem_size)
  1621. pci_free_consistent(nesdev->pcidev, nescq->cq_mem_size,
  1622. nescq->hw_cq.cq_vbase, nescq->hw_cq.cq_pbase);
  1623. kfree(nescq);
  1624. return ret;
  1625. }
  1626. /**
  1627. * root_256
  1628. */
  1629. static u32 root_256(struct nes_device *nesdev,
  1630. struct nes_root_vpbl *root_vpbl,
  1631. struct nes_root_vpbl *new_root,
  1632. u16 pbl_count_4k)
  1633. {
  1634. u64 leaf_pbl;
  1635. int i, j, k;
  1636. if (pbl_count_4k == 1) {
  1637. new_root->pbl_vbase = pci_alloc_consistent(nesdev->pcidev,
  1638. 512, &new_root->pbl_pbase);
  1639. if (new_root->pbl_vbase == NULL)
  1640. return 0;
  1641. leaf_pbl = (u64)root_vpbl->pbl_pbase;
  1642. for (i = 0; i < 16; i++) {
  1643. new_root->pbl_vbase[i].pa_low =
  1644. cpu_to_le32((u32)leaf_pbl);
  1645. new_root->pbl_vbase[i].pa_high =
  1646. cpu_to_le32((u32)((((u64)leaf_pbl) >> 32)));
  1647. leaf_pbl += 256;
  1648. }
  1649. } else {
  1650. for (i = 3; i >= 0; i--) {
  1651. j = i * 16;
  1652. root_vpbl->pbl_vbase[j] = root_vpbl->pbl_vbase[i];
  1653. leaf_pbl = le32_to_cpu(root_vpbl->pbl_vbase[j].pa_low) +
  1654. (((u64)le32_to_cpu(root_vpbl->pbl_vbase[j].pa_high))
  1655. << 32);
  1656. for (k = 1; k < 16; k++) {
  1657. leaf_pbl += 256;
  1658. root_vpbl->pbl_vbase[j + k].pa_low =
  1659. cpu_to_le32((u32)leaf_pbl);
  1660. root_vpbl->pbl_vbase[j + k].pa_high =
  1661. cpu_to_le32((u32)((((u64)leaf_pbl) >> 32)));
  1662. }
  1663. }
  1664. }
  1665. return 1;
  1666. }
  1667. /**
  1668. * nes_reg_mr
  1669. */
  1670. static int nes_reg_mr(struct nes_device *nesdev, struct nes_pd *nespd,
  1671. u32 stag, u64 region_length, struct nes_root_vpbl *root_vpbl,
  1672. dma_addr_t single_buffer, u16 pbl_count_4k,
  1673. u16 residual_page_count_4k, int acc, u64 *iova_start,
  1674. u16 *actual_pbl_cnt, u8 *used_4k_pbls)
  1675. {
  1676. struct nes_hw_cqp_wqe *cqp_wqe;
  1677. struct nes_cqp_request *cqp_request;
  1678. unsigned long flags;
  1679. int ret;
  1680. struct nes_adapter *nesadapter = nesdev->nesadapter;
  1681. uint pg_cnt = 0;
  1682. u16 pbl_count_256 = 0;
  1683. u16 pbl_count = 0;
  1684. u8 use_256_pbls = 0;
  1685. u8 use_4k_pbls = 0;
  1686. u16 use_two_level = (pbl_count_4k > 1) ? 1 : 0;
  1687. struct nes_root_vpbl new_root = { 0, NULL, NULL };
  1688. u32 opcode = 0;
  1689. u16 major_code;
  1690. /* Register the region with the adapter */
  1691. cqp_request = nes_get_cqp_request(nesdev);
  1692. if (cqp_request == NULL) {
  1693. nes_debug(NES_DBG_MR, "Failed to get a cqp_request.\n");
  1694. return -ENOMEM;
  1695. }
  1696. cqp_request->waiting = 1;
  1697. cqp_wqe = &cqp_request->cqp_wqe;
  1698. if (pbl_count_4k) {
  1699. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  1700. pg_cnt = ((pbl_count_4k - 1) * 512) + residual_page_count_4k;
  1701. pbl_count_256 = (pg_cnt + 31) / 32;
  1702. if (pg_cnt <= 32) {
  1703. if (pbl_count_256 <= nesadapter->free_256pbl)
  1704. use_256_pbls = 1;
  1705. else if (pbl_count_4k <= nesadapter->free_4kpbl)
  1706. use_4k_pbls = 1;
  1707. } else if (pg_cnt <= 2048) {
  1708. if (((pbl_count_4k + use_two_level) <= nesadapter->free_4kpbl) &&
  1709. (nesadapter->free_4kpbl > (nesadapter->max_4kpbl >> 1))) {
  1710. use_4k_pbls = 1;
  1711. } else if ((pbl_count_256 + 1) <= nesadapter->free_256pbl) {
  1712. use_256_pbls = 1;
  1713. use_two_level = 1;
  1714. } else if ((pbl_count_4k + use_two_level) <= nesadapter->free_4kpbl) {
  1715. use_4k_pbls = 1;
  1716. }
  1717. } else {
  1718. if ((pbl_count_4k + 1) <= nesadapter->free_4kpbl)
  1719. use_4k_pbls = 1;
  1720. }
  1721. if (use_256_pbls) {
  1722. pbl_count = pbl_count_256;
  1723. nesadapter->free_256pbl -= pbl_count + use_two_level;
  1724. } else if (use_4k_pbls) {
  1725. pbl_count = pbl_count_4k;
  1726. nesadapter->free_4kpbl -= pbl_count + use_two_level;
  1727. } else {
  1728. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  1729. nes_debug(NES_DBG_MR, "Out of Pbls\n");
  1730. nes_free_cqp_request(nesdev, cqp_request);
  1731. return -ENOMEM;
  1732. }
  1733. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  1734. }
  1735. if (use_256_pbls && use_two_level) {
  1736. if (root_256(nesdev, root_vpbl, &new_root, pbl_count_4k) == 1) {
  1737. if (new_root.pbl_pbase != 0)
  1738. root_vpbl = &new_root;
  1739. } else {
  1740. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  1741. nesadapter->free_256pbl += pbl_count_256 + use_two_level;
  1742. use_256_pbls = 0;
  1743. if (pbl_count_4k == 1)
  1744. use_two_level = 0;
  1745. pbl_count = pbl_count_4k;
  1746. if ((pbl_count_4k + use_two_level) <= nesadapter->free_4kpbl) {
  1747. nesadapter->free_4kpbl -= pbl_count + use_two_level;
  1748. use_4k_pbls = 1;
  1749. }
  1750. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  1751. if (use_4k_pbls == 0)
  1752. return -ENOMEM;
  1753. }
  1754. }
  1755. opcode = NES_CQP_REGISTER_STAG | NES_CQP_STAG_RIGHTS_LOCAL_READ |
  1756. NES_CQP_STAG_VA_TO | NES_CQP_STAG_MR;
  1757. if (acc & IB_ACCESS_LOCAL_WRITE)
  1758. opcode |= NES_CQP_STAG_RIGHTS_LOCAL_WRITE;
  1759. if (acc & IB_ACCESS_REMOTE_WRITE)
  1760. opcode |= NES_CQP_STAG_RIGHTS_REMOTE_WRITE | NES_CQP_STAG_REM_ACC_EN;
  1761. if (acc & IB_ACCESS_REMOTE_READ)
  1762. opcode |= NES_CQP_STAG_RIGHTS_REMOTE_READ | NES_CQP_STAG_REM_ACC_EN;
  1763. if (acc & IB_ACCESS_MW_BIND)
  1764. opcode |= NES_CQP_STAG_RIGHTS_WINDOW_BIND | NES_CQP_STAG_REM_ACC_EN;
  1765. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  1766. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
  1767. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_VA_LOW_IDX, *iova_start);
  1768. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_LEN_LOW_IDX, region_length);
  1769. cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX] =
  1770. cpu_to_le32((u32)(region_length >> 8) & 0xff000000);
  1771. cqp_wqe->wqe_words[NES_CQP_STAG_WQE_LEN_HIGH_PD_IDX] |=
  1772. cpu_to_le32(nespd->pd_id & 0x00007fff);
  1773. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, stag);
  1774. if (pbl_count == 0) {
  1775. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PA_LOW_IDX, single_buffer);
  1776. } else {
  1777. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PA_LOW_IDX, root_vpbl->pbl_pbase);
  1778. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PBL_BLK_COUNT_IDX, pbl_count);
  1779. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_PBL_LEN_IDX, (pg_cnt * 8));
  1780. if (use_4k_pbls)
  1781. cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX] |= cpu_to_le32(NES_CQP_STAG_PBL_BLK_SIZE);
  1782. }
  1783. barrier();
  1784. atomic_set(&cqp_request->refcount, 2);
  1785. nes_post_cqp_request(nesdev, cqp_request);
  1786. /* Wait for CQP */
  1787. ret = wait_event_timeout(cqp_request->waitq, (0 != cqp_request->request_done),
  1788. NES_EVENT_TIMEOUT);
  1789. nes_debug(NES_DBG_MR, "Register STag 0x%08X completed, wait_event_timeout ret = %u,"
  1790. " CQP Major:Minor codes = 0x%04X:0x%04X.\n",
  1791. stag, ret, cqp_request->major_code, cqp_request->minor_code);
  1792. major_code = cqp_request->major_code;
  1793. nes_put_cqp_request(nesdev, cqp_request);
  1794. if ((!ret || major_code) && pbl_count != 0) {
  1795. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  1796. if (use_256_pbls)
  1797. nesadapter->free_256pbl += pbl_count + use_two_level;
  1798. else if (use_4k_pbls)
  1799. nesadapter->free_4kpbl += pbl_count + use_two_level;
  1800. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  1801. }
  1802. if (new_root.pbl_pbase)
  1803. pci_free_consistent(nesdev->pcidev, 512, new_root.pbl_vbase,
  1804. new_root.pbl_pbase);
  1805. if (!ret)
  1806. return -ETIME;
  1807. else if (major_code)
  1808. return -EIO;
  1809. *actual_pbl_cnt = pbl_count + use_two_level;
  1810. *used_4k_pbls = use_4k_pbls;
  1811. return 0;
  1812. }
  1813. /**
  1814. * nes_reg_phys_mr
  1815. */
  1816. static struct ib_mr *nes_reg_phys_mr(struct ib_pd *ib_pd,
  1817. struct ib_phys_buf *buffer_list, int num_phys_buf, int acc,
  1818. u64 * iova_start)
  1819. {
  1820. u64 region_length;
  1821. struct nes_pd *nespd = to_nespd(ib_pd);
  1822. struct nes_vnic *nesvnic = to_nesvnic(ib_pd->device);
  1823. struct nes_device *nesdev = nesvnic->nesdev;
  1824. struct nes_adapter *nesadapter = nesdev->nesadapter;
  1825. struct nes_mr *nesmr;
  1826. struct ib_mr *ibmr;
  1827. struct nes_vpbl vpbl;
  1828. struct nes_root_vpbl root_vpbl;
  1829. u32 stag;
  1830. u32 i;
  1831. unsigned long mask;
  1832. u32 stag_index = 0;
  1833. u32 next_stag_index = 0;
  1834. u32 driver_key = 0;
  1835. u32 root_pbl_index = 0;
  1836. u32 cur_pbl_index = 0;
  1837. int err = 0;
  1838. int ret = 0;
  1839. u16 pbl_count = 0;
  1840. u8 single_page = 1;
  1841. u8 stag_key = 0;
  1842. region_length = 0;
  1843. vpbl.pbl_vbase = NULL;
  1844. root_vpbl.pbl_vbase = NULL;
  1845. root_vpbl.pbl_pbase = 0;
  1846. get_random_bytes(&next_stag_index, sizeof(next_stag_index));
  1847. stag_key = (u8)next_stag_index;
  1848. driver_key = 0;
  1849. next_stag_index >>= 8;
  1850. next_stag_index %= nesadapter->max_mr;
  1851. if (num_phys_buf > (1024*512)) {
  1852. return ERR_PTR(-E2BIG);
  1853. }
  1854. if ((buffer_list[0].addr ^ *iova_start) & ~PAGE_MASK)
  1855. return ERR_PTR(-EINVAL);
  1856. err = nes_alloc_resource(nesadapter, nesadapter->allocated_mrs, nesadapter->max_mr,
  1857. &stag_index, &next_stag_index);
  1858. if (err) {
  1859. return ERR_PTR(err);
  1860. }
  1861. nesmr = kzalloc(sizeof(*nesmr), GFP_KERNEL);
  1862. if (!nesmr) {
  1863. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  1864. return ERR_PTR(-ENOMEM);
  1865. }
  1866. for (i = 0; i < num_phys_buf; i++) {
  1867. if ((i & 0x01FF) == 0) {
  1868. if (root_pbl_index == 1) {
  1869. /* Allocate the root PBL */
  1870. root_vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 8192,
  1871. &root_vpbl.pbl_pbase);
  1872. nes_debug(NES_DBG_MR, "Allocating root PBL, va = %p, pa = 0x%08X\n",
  1873. root_vpbl.pbl_vbase, (unsigned int)root_vpbl.pbl_pbase);
  1874. if (!root_vpbl.pbl_vbase) {
  1875. pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase,
  1876. vpbl.pbl_pbase);
  1877. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  1878. kfree(nesmr);
  1879. return ERR_PTR(-ENOMEM);
  1880. }
  1881. root_vpbl.leaf_vpbl = kzalloc(sizeof(*root_vpbl.leaf_vpbl)*1024, GFP_KERNEL);
  1882. if (!root_vpbl.leaf_vpbl) {
  1883. pci_free_consistent(nesdev->pcidev, 8192, root_vpbl.pbl_vbase,
  1884. root_vpbl.pbl_pbase);
  1885. pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase,
  1886. vpbl.pbl_pbase);
  1887. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  1888. kfree(nesmr);
  1889. return ERR_PTR(-ENOMEM);
  1890. }
  1891. root_vpbl.pbl_vbase[0].pa_low = cpu_to_le32((u32)vpbl.pbl_pbase);
  1892. root_vpbl.pbl_vbase[0].pa_high =
  1893. cpu_to_le32((u32)((((u64)vpbl.pbl_pbase) >> 32)));
  1894. root_vpbl.leaf_vpbl[0] = vpbl;
  1895. }
  1896. /* Allocate a 4K buffer for the PBL */
  1897. vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 4096,
  1898. &vpbl.pbl_pbase);
  1899. nes_debug(NES_DBG_MR, "Allocating leaf PBL, va = %p, pa = 0x%016lX\n",
  1900. vpbl.pbl_vbase, (unsigned long)vpbl.pbl_pbase);
  1901. if (!vpbl.pbl_vbase) {
  1902. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  1903. ibmr = ERR_PTR(-ENOMEM);
  1904. kfree(nesmr);
  1905. goto reg_phys_err;
  1906. }
  1907. /* Fill in the root table */
  1908. if (1 <= root_pbl_index) {
  1909. root_vpbl.pbl_vbase[root_pbl_index].pa_low =
  1910. cpu_to_le32((u32)vpbl.pbl_pbase);
  1911. root_vpbl.pbl_vbase[root_pbl_index].pa_high =
  1912. cpu_to_le32((u32)((((u64)vpbl.pbl_pbase) >> 32)));
  1913. root_vpbl.leaf_vpbl[root_pbl_index] = vpbl;
  1914. }
  1915. root_pbl_index++;
  1916. cur_pbl_index = 0;
  1917. }
  1918. mask = !buffer_list[i].size;
  1919. if (i != 0)
  1920. mask |= buffer_list[i].addr;
  1921. if (i != num_phys_buf - 1)
  1922. mask |= buffer_list[i].addr + buffer_list[i].size;
  1923. if (mask & ~PAGE_MASK) {
  1924. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  1925. nes_debug(NES_DBG_MR, "Invalid buffer addr or size\n");
  1926. ibmr = ERR_PTR(-EINVAL);
  1927. kfree(nesmr);
  1928. goto reg_phys_err;
  1929. }
  1930. region_length += buffer_list[i].size;
  1931. if ((i != 0) && (single_page)) {
  1932. if ((buffer_list[i-1].addr+PAGE_SIZE) != buffer_list[i].addr)
  1933. single_page = 0;
  1934. }
  1935. vpbl.pbl_vbase[cur_pbl_index].pa_low = cpu_to_le32((u32)buffer_list[i].addr & PAGE_MASK);
  1936. vpbl.pbl_vbase[cur_pbl_index++].pa_high =
  1937. cpu_to_le32((u32)((((u64)buffer_list[i].addr) >> 32)));
  1938. }
  1939. stag = stag_index << 8;
  1940. stag |= driver_key;
  1941. stag += (u32)stag_key;
  1942. nes_debug(NES_DBG_MR, "Registering STag 0x%08X, VA = 0x%016lX,"
  1943. " length = 0x%016lX, index = 0x%08X\n",
  1944. stag, (unsigned long)*iova_start, (unsigned long)region_length, stag_index);
  1945. /* Make the leaf PBL the root if only one PBL */
  1946. if (root_pbl_index == 1) {
  1947. root_vpbl.pbl_pbase = vpbl.pbl_pbase;
  1948. }
  1949. if (single_page) {
  1950. pbl_count = 0;
  1951. } else {
  1952. pbl_count = root_pbl_index;
  1953. }
  1954. ret = nes_reg_mr(nesdev, nespd, stag, region_length, &root_vpbl,
  1955. buffer_list[0].addr, pbl_count, (u16)cur_pbl_index, acc, iova_start,
  1956. &nesmr->pbls_used, &nesmr->pbl_4k);
  1957. if (ret == 0) {
  1958. nesmr->ibmr.rkey = stag;
  1959. nesmr->ibmr.lkey = stag;
  1960. nesmr->mode = IWNES_MEMREG_TYPE_MEM;
  1961. ibmr = &nesmr->ibmr;
  1962. } else {
  1963. kfree(nesmr);
  1964. ibmr = ERR_PTR(-ENOMEM);
  1965. }
  1966. reg_phys_err:
  1967. /* free the resources */
  1968. if (root_pbl_index == 1) {
  1969. /* single PBL case */
  1970. pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase, vpbl.pbl_pbase);
  1971. } else {
  1972. for (i=0; i<root_pbl_index; i++) {
  1973. pci_free_consistent(nesdev->pcidev, 4096, root_vpbl.leaf_vpbl[i].pbl_vbase,
  1974. root_vpbl.leaf_vpbl[i].pbl_pbase);
  1975. }
  1976. kfree(root_vpbl.leaf_vpbl);
  1977. pci_free_consistent(nesdev->pcidev, 8192, root_vpbl.pbl_vbase,
  1978. root_vpbl.pbl_pbase);
  1979. }
  1980. return ibmr;
  1981. }
  1982. /**
  1983. * nes_get_dma_mr
  1984. */
  1985. static struct ib_mr *nes_get_dma_mr(struct ib_pd *pd, int acc)
  1986. {
  1987. struct ib_phys_buf bl;
  1988. u64 kva = 0;
  1989. nes_debug(NES_DBG_MR, "\n");
  1990. bl.size = (u64)0xffffffffffULL;
  1991. bl.addr = 0;
  1992. return nes_reg_phys_mr(pd, &bl, 1, acc, &kva);
  1993. }
  1994. /**
  1995. * nes_reg_user_mr
  1996. */
  1997. static struct ib_mr *nes_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
  1998. u64 virt, int acc, struct ib_udata *udata)
  1999. {
  2000. u64 iova_start;
  2001. __le64 *pbl;
  2002. u64 region_length;
  2003. dma_addr_t last_dma_addr = 0;
  2004. dma_addr_t first_dma_addr = 0;
  2005. struct nes_pd *nespd = to_nespd(pd);
  2006. struct nes_vnic *nesvnic = to_nesvnic(pd->device);
  2007. struct nes_device *nesdev = nesvnic->nesdev;
  2008. struct nes_adapter *nesadapter = nesdev->nesadapter;
  2009. struct ib_mr *ibmr = ERR_PTR(-EINVAL);
  2010. struct ib_umem_chunk *chunk;
  2011. struct nes_ucontext *nes_ucontext;
  2012. struct nes_pbl *nespbl;
  2013. struct nes_mr *nesmr;
  2014. struct ib_umem *region;
  2015. struct nes_mem_reg_req req;
  2016. struct nes_vpbl vpbl;
  2017. struct nes_root_vpbl root_vpbl;
  2018. int nmap_index, page_index;
  2019. int page_count = 0;
  2020. int err, pbl_depth = 0;
  2021. int chunk_pages;
  2022. int ret;
  2023. u32 stag;
  2024. u32 stag_index = 0;
  2025. u32 next_stag_index;
  2026. u32 driver_key;
  2027. u32 root_pbl_index = 0;
  2028. u32 cur_pbl_index = 0;
  2029. u32 skip_pages;
  2030. u16 pbl_count;
  2031. u8 single_page = 1;
  2032. u8 stag_key;
  2033. region = ib_umem_get(pd->uobject->context, start, length, acc, 0);
  2034. if (IS_ERR(region)) {
  2035. return (struct ib_mr *)region;
  2036. }
  2037. nes_debug(NES_DBG_MR, "User base = 0x%lX, Virt base = 0x%lX, length = %u,"
  2038. " offset = %u, page size = %u.\n",
  2039. (unsigned long int)start, (unsigned long int)virt, (u32)length,
  2040. region->offset, region->page_size);
  2041. skip_pages = ((u32)region->offset) >> 12;
  2042. if (ib_copy_from_udata(&req, udata, sizeof(req))) {
  2043. ib_umem_release(region);
  2044. return ERR_PTR(-EFAULT);
  2045. }
  2046. nes_debug(NES_DBG_MR, "Memory Registration type = %08X.\n", req.reg_type);
  2047. switch (req.reg_type) {
  2048. case IWNES_MEMREG_TYPE_MEM:
  2049. pbl_depth = 0;
  2050. region_length = 0;
  2051. vpbl.pbl_vbase = NULL;
  2052. root_vpbl.pbl_vbase = NULL;
  2053. root_vpbl.pbl_pbase = 0;
  2054. get_random_bytes(&next_stag_index, sizeof(next_stag_index));
  2055. stag_key = (u8)next_stag_index;
  2056. driver_key = next_stag_index & 0x70000000;
  2057. next_stag_index >>= 8;
  2058. next_stag_index %= nesadapter->max_mr;
  2059. err = nes_alloc_resource(nesadapter, nesadapter->allocated_mrs,
  2060. nesadapter->max_mr, &stag_index, &next_stag_index);
  2061. if (err) {
  2062. ib_umem_release(region);
  2063. return ERR_PTR(err);
  2064. }
  2065. nesmr = kzalloc(sizeof(*nesmr), GFP_KERNEL);
  2066. if (!nesmr) {
  2067. ib_umem_release(region);
  2068. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  2069. return ERR_PTR(-ENOMEM);
  2070. }
  2071. nesmr->region = region;
  2072. list_for_each_entry(chunk, &region->chunk_list, list) {
  2073. nes_debug(NES_DBG_MR, "Chunk: nents = %u, nmap = %u .\n",
  2074. chunk->nents, chunk->nmap);
  2075. for (nmap_index = 0; nmap_index < chunk->nmap; ++nmap_index) {
  2076. if (sg_dma_address(&chunk->page_list[nmap_index]) & ~PAGE_MASK) {
  2077. ib_umem_release(region);
  2078. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  2079. nes_debug(NES_DBG_MR, "Unaligned Memory Buffer: 0x%x\n",
  2080. (unsigned int) sg_dma_address(&chunk->page_list[nmap_index]));
  2081. ibmr = ERR_PTR(-EINVAL);
  2082. kfree(nesmr);
  2083. goto reg_user_mr_err;
  2084. }
  2085. if (!sg_dma_len(&chunk->page_list[nmap_index])) {
  2086. ib_umem_release(region);
  2087. nes_free_resource(nesadapter, nesadapter->allocated_mrs,
  2088. stag_index);
  2089. nes_debug(NES_DBG_MR, "Invalid Buffer Size\n");
  2090. ibmr = ERR_PTR(-EINVAL);
  2091. kfree(nesmr);
  2092. goto reg_user_mr_err;
  2093. }
  2094. region_length += sg_dma_len(&chunk->page_list[nmap_index]);
  2095. chunk_pages = sg_dma_len(&chunk->page_list[nmap_index]) >> 12;
  2096. region_length -= skip_pages << 12;
  2097. for (page_index=skip_pages; page_index < chunk_pages; page_index++) {
  2098. skip_pages = 0;
  2099. if ((page_count!=0)&&(page_count<<12)-(region->offset&(4096-1))>=region->length)
  2100. goto enough_pages;
  2101. if ((page_count&0x01FF) == 0) {
  2102. if (page_count >= 1024 * 512) {
  2103. ib_umem_release(region);
  2104. nes_free_resource(nesadapter,
  2105. nesadapter->allocated_mrs, stag_index);
  2106. kfree(nesmr);
  2107. ibmr = ERR_PTR(-E2BIG);
  2108. goto reg_user_mr_err;
  2109. }
  2110. if (root_pbl_index == 1) {
  2111. root_vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev,
  2112. 8192, &root_vpbl.pbl_pbase);
  2113. nes_debug(NES_DBG_MR, "Allocating root PBL, va = %p, pa = 0x%08X\n",
  2114. root_vpbl.pbl_vbase, (unsigned int)root_vpbl.pbl_pbase);
  2115. if (!root_vpbl.pbl_vbase) {
  2116. ib_umem_release(region);
  2117. pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase,
  2118. vpbl.pbl_pbase);
  2119. nes_free_resource(nesadapter, nesadapter->allocated_mrs,
  2120. stag_index);
  2121. kfree(nesmr);
  2122. ibmr = ERR_PTR(-ENOMEM);
  2123. goto reg_user_mr_err;
  2124. }
  2125. root_vpbl.leaf_vpbl = kzalloc(sizeof(*root_vpbl.leaf_vpbl)*1024,
  2126. GFP_KERNEL);
  2127. if (!root_vpbl.leaf_vpbl) {
  2128. ib_umem_release(region);
  2129. pci_free_consistent(nesdev->pcidev, 8192, root_vpbl.pbl_vbase,
  2130. root_vpbl.pbl_pbase);
  2131. pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase,
  2132. vpbl.pbl_pbase);
  2133. nes_free_resource(nesadapter, nesadapter->allocated_mrs,
  2134. stag_index);
  2135. kfree(nesmr);
  2136. ibmr = ERR_PTR(-ENOMEM);
  2137. goto reg_user_mr_err;
  2138. }
  2139. root_vpbl.pbl_vbase[0].pa_low =
  2140. cpu_to_le32((u32)vpbl.pbl_pbase);
  2141. root_vpbl.pbl_vbase[0].pa_high =
  2142. cpu_to_le32((u32)((((u64)vpbl.pbl_pbase) >> 32)));
  2143. root_vpbl.leaf_vpbl[0] = vpbl;
  2144. }
  2145. vpbl.pbl_vbase = pci_alloc_consistent(nesdev->pcidev, 4096,
  2146. &vpbl.pbl_pbase);
  2147. nes_debug(NES_DBG_MR, "Allocating leaf PBL, va = %p, pa = 0x%08X\n",
  2148. vpbl.pbl_vbase, (unsigned int)vpbl.pbl_pbase);
  2149. if (!vpbl.pbl_vbase) {
  2150. ib_umem_release(region);
  2151. nes_free_resource(nesadapter, nesadapter->allocated_mrs, stag_index);
  2152. ibmr = ERR_PTR(-ENOMEM);
  2153. kfree(nesmr);
  2154. goto reg_user_mr_err;
  2155. }
  2156. if (1 <= root_pbl_index) {
  2157. root_vpbl.pbl_vbase[root_pbl_index].pa_low =
  2158. cpu_to_le32((u32)vpbl.pbl_pbase);
  2159. root_vpbl.pbl_vbase[root_pbl_index].pa_high =
  2160. cpu_to_le32((u32)((((u64)vpbl.pbl_pbase)>>32)));
  2161. root_vpbl.leaf_vpbl[root_pbl_index] = vpbl;
  2162. }
  2163. root_pbl_index++;
  2164. cur_pbl_index = 0;
  2165. }
  2166. if (single_page) {
  2167. if (page_count != 0) {
  2168. if ((last_dma_addr+4096) !=
  2169. (sg_dma_address(&chunk->page_list[nmap_index])+
  2170. (page_index*4096)))
  2171. single_page = 0;
  2172. last_dma_addr = sg_dma_address(&chunk->page_list[nmap_index])+
  2173. (page_index*4096);
  2174. } else {
  2175. first_dma_addr = sg_dma_address(&chunk->page_list[nmap_index])+
  2176. (page_index*4096);
  2177. last_dma_addr = first_dma_addr;
  2178. }
  2179. }
  2180. vpbl.pbl_vbase[cur_pbl_index].pa_low =
  2181. cpu_to_le32((u32)(sg_dma_address(&chunk->page_list[nmap_index])+
  2182. (page_index*4096)));
  2183. vpbl.pbl_vbase[cur_pbl_index].pa_high =
  2184. cpu_to_le32((u32)((((u64)(sg_dma_address(&chunk->page_list[nmap_index])+
  2185. (page_index*4096))) >> 32)));
  2186. cur_pbl_index++;
  2187. page_count++;
  2188. }
  2189. }
  2190. }
  2191. enough_pages:
  2192. nes_debug(NES_DBG_MR, "calculating stag, stag_index=0x%08x, driver_key=0x%08x,"
  2193. " stag_key=0x%08x\n",
  2194. stag_index, driver_key, stag_key);
  2195. stag = stag_index << 8;
  2196. stag |= driver_key;
  2197. stag += (u32)stag_key;
  2198. iova_start = virt;
  2199. /* Make the leaf PBL the root if only one PBL */
  2200. if (root_pbl_index == 1) {
  2201. root_vpbl.pbl_pbase = vpbl.pbl_pbase;
  2202. }
  2203. if (single_page) {
  2204. pbl_count = 0;
  2205. } else {
  2206. pbl_count = root_pbl_index;
  2207. first_dma_addr = 0;
  2208. }
  2209. nes_debug(NES_DBG_MR, "Registering STag 0x%08X, VA = 0x%08X, length = 0x%08X,"
  2210. " index = 0x%08X, region->length=0x%08llx, pbl_count = %u\n",
  2211. stag, (unsigned int)iova_start,
  2212. (unsigned int)region_length, stag_index,
  2213. (unsigned long long)region->length, pbl_count);
  2214. ret = nes_reg_mr(nesdev, nespd, stag, region->length, &root_vpbl,
  2215. first_dma_addr, pbl_count, (u16)cur_pbl_index, acc,
  2216. &iova_start, &nesmr->pbls_used, &nesmr->pbl_4k);
  2217. nes_debug(NES_DBG_MR, "ret=%d\n", ret);
  2218. if (ret == 0) {
  2219. nesmr->ibmr.rkey = stag;
  2220. nesmr->ibmr.lkey = stag;
  2221. nesmr->mode = IWNES_MEMREG_TYPE_MEM;
  2222. ibmr = &nesmr->ibmr;
  2223. } else {
  2224. ib_umem_release(region);
  2225. kfree(nesmr);
  2226. ibmr = ERR_PTR(-ENOMEM);
  2227. }
  2228. reg_user_mr_err:
  2229. /* free the resources */
  2230. if (root_pbl_index == 1) {
  2231. pci_free_consistent(nesdev->pcidev, 4096, vpbl.pbl_vbase,
  2232. vpbl.pbl_pbase);
  2233. } else {
  2234. for (page_index=0; page_index<root_pbl_index; page_index++) {
  2235. pci_free_consistent(nesdev->pcidev, 4096,
  2236. root_vpbl.leaf_vpbl[page_index].pbl_vbase,
  2237. root_vpbl.leaf_vpbl[page_index].pbl_pbase);
  2238. }
  2239. kfree(root_vpbl.leaf_vpbl);
  2240. pci_free_consistent(nesdev->pcidev, 8192, root_vpbl.pbl_vbase,
  2241. root_vpbl.pbl_pbase);
  2242. }
  2243. nes_debug(NES_DBG_MR, "Leaving, ibmr=%p", ibmr);
  2244. return ibmr;
  2245. case IWNES_MEMREG_TYPE_QP:
  2246. case IWNES_MEMREG_TYPE_CQ:
  2247. if (!region->length) {
  2248. nes_debug(NES_DBG_MR, "Unable to register zero length region for CQ\n");
  2249. ib_umem_release(region);
  2250. return ERR_PTR(-EINVAL);
  2251. }
  2252. nespbl = kzalloc(sizeof(*nespbl), GFP_KERNEL);
  2253. if (!nespbl) {
  2254. nes_debug(NES_DBG_MR, "Unable to allocate PBL\n");
  2255. ib_umem_release(region);
  2256. return ERR_PTR(-ENOMEM);
  2257. }
  2258. nesmr = kzalloc(sizeof(*nesmr), GFP_KERNEL);
  2259. if (!nesmr) {
  2260. ib_umem_release(region);
  2261. kfree(nespbl);
  2262. nes_debug(NES_DBG_MR, "Unable to allocate nesmr\n");
  2263. return ERR_PTR(-ENOMEM);
  2264. }
  2265. nesmr->region = region;
  2266. nes_ucontext = to_nesucontext(pd->uobject->context);
  2267. pbl_depth = region->length >> 12;
  2268. pbl_depth += (region->length & (4096-1)) ? 1 : 0;
  2269. nespbl->pbl_size = pbl_depth*sizeof(u64);
  2270. if (req.reg_type == IWNES_MEMREG_TYPE_QP) {
  2271. nes_debug(NES_DBG_MR, "Attempting to allocate QP PBL memory");
  2272. } else {
  2273. nes_debug(NES_DBG_MR, "Attempting to allocate CP PBL memory");
  2274. }
  2275. nes_debug(NES_DBG_MR, " %u bytes, %u entries.\n",
  2276. nespbl->pbl_size, pbl_depth);
  2277. pbl = pci_alloc_consistent(nesdev->pcidev, nespbl->pbl_size,
  2278. &nespbl->pbl_pbase);
  2279. if (!pbl) {
  2280. ib_umem_release(region);
  2281. kfree(nesmr);
  2282. kfree(nespbl);
  2283. nes_debug(NES_DBG_MR, "Unable to allocate PBL memory\n");
  2284. return ERR_PTR(-ENOMEM);
  2285. }
  2286. nespbl->pbl_vbase = (u64 *)pbl;
  2287. nespbl->user_base = start;
  2288. nes_debug(NES_DBG_MR, "Allocated PBL memory, %u bytes, pbl_pbase=%lx,"
  2289. " pbl_vbase=%p user_base=0x%lx\n",
  2290. nespbl->pbl_size, (unsigned long) nespbl->pbl_pbase,
  2291. (void *) nespbl->pbl_vbase, nespbl->user_base);
  2292. list_for_each_entry(chunk, &region->chunk_list, list) {
  2293. for (nmap_index = 0; nmap_index < chunk->nmap; ++nmap_index) {
  2294. chunk_pages = sg_dma_len(&chunk->page_list[nmap_index]) >> 12;
  2295. chunk_pages += (sg_dma_len(&chunk->page_list[nmap_index]) & (4096-1)) ? 1 : 0;
  2296. nespbl->page = sg_page(&chunk->page_list[0]);
  2297. for (page_index=0; page_index<chunk_pages; page_index++) {
  2298. ((__le32 *)pbl)[0] = cpu_to_le32((u32)
  2299. (sg_dma_address(&chunk->page_list[nmap_index])+
  2300. (page_index*4096)));
  2301. ((__le32 *)pbl)[1] = cpu_to_le32(((u64)
  2302. (sg_dma_address(&chunk->page_list[nmap_index])+
  2303. (page_index*4096)))>>32);
  2304. nes_debug(NES_DBG_MR, "pbl=%p, *pbl=0x%016llx, 0x%08x%08x\n", pbl,
  2305. (unsigned long long)*pbl,
  2306. le32_to_cpu(((__le32 *)pbl)[1]), le32_to_cpu(((__le32 *)pbl)[0]));
  2307. pbl++;
  2308. }
  2309. }
  2310. }
  2311. if (req.reg_type == IWNES_MEMREG_TYPE_QP) {
  2312. list_add_tail(&nespbl->list, &nes_ucontext->qp_reg_mem_list);
  2313. } else {
  2314. list_add_tail(&nespbl->list, &nes_ucontext->cq_reg_mem_list);
  2315. }
  2316. nesmr->ibmr.rkey = -1;
  2317. nesmr->ibmr.lkey = -1;
  2318. nesmr->mode = req.reg_type;
  2319. return &nesmr->ibmr;
  2320. }
  2321. ib_umem_release(region);
  2322. return ERR_PTR(-ENOSYS);
  2323. }
  2324. /**
  2325. * nes_dereg_mr
  2326. */
  2327. static int nes_dereg_mr(struct ib_mr *ib_mr)
  2328. {
  2329. struct nes_mr *nesmr = to_nesmr(ib_mr);
  2330. struct nes_vnic *nesvnic = to_nesvnic(ib_mr->device);
  2331. struct nes_device *nesdev = nesvnic->nesdev;
  2332. struct nes_adapter *nesadapter = nesdev->nesadapter;
  2333. struct nes_hw_cqp_wqe *cqp_wqe;
  2334. struct nes_cqp_request *cqp_request;
  2335. unsigned long flags;
  2336. int ret;
  2337. u16 major_code;
  2338. u16 minor_code;
  2339. if (nesmr->region) {
  2340. ib_umem_release(nesmr->region);
  2341. }
  2342. if (nesmr->mode != IWNES_MEMREG_TYPE_MEM) {
  2343. kfree(nesmr);
  2344. return 0;
  2345. }
  2346. /* Deallocate the region with the adapter */
  2347. cqp_request = nes_get_cqp_request(nesdev);
  2348. if (cqp_request == NULL) {
  2349. nes_debug(NES_DBG_MR, "Failed to get a cqp_request.\n");
  2350. return -ENOMEM;
  2351. }
  2352. cqp_request->waiting = 1;
  2353. cqp_wqe = &cqp_request->cqp_wqe;
  2354. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  2355. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX,
  2356. NES_CQP_DEALLOCATE_STAG | NES_CQP_STAG_VA_TO |
  2357. NES_CQP_STAG_DEALLOC_PBLS | NES_CQP_STAG_MR);
  2358. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_STAG_WQE_STAG_IDX, ib_mr->rkey);
  2359. atomic_set(&cqp_request->refcount, 2);
  2360. nes_post_cqp_request(nesdev, cqp_request);
  2361. /* Wait for CQP */
  2362. nes_debug(NES_DBG_MR, "Waiting for deallocate STag 0x%08X completed\n", ib_mr->rkey);
  2363. ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0),
  2364. NES_EVENT_TIMEOUT);
  2365. nes_debug(NES_DBG_MR, "Deallocate STag 0x%08X completed, wait_event_timeout ret = %u,"
  2366. " CQP Major:Minor codes = 0x%04X:0x%04X\n",
  2367. ib_mr->rkey, ret, cqp_request->major_code, cqp_request->minor_code);
  2368. major_code = cqp_request->major_code;
  2369. minor_code = cqp_request->minor_code;
  2370. nes_put_cqp_request(nesdev, cqp_request);
  2371. if (!ret) {
  2372. nes_debug(NES_DBG_MR, "Timeout waiting to destroy STag,"
  2373. " ib_mr=%p, rkey = 0x%08X\n",
  2374. ib_mr, ib_mr->rkey);
  2375. return -ETIME;
  2376. } else if (major_code) {
  2377. nes_debug(NES_DBG_MR, "Error (0x%04X:0x%04X) while attempting"
  2378. " to destroy STag, ib_mr=%p, rkey = 0x%08X\n",
  2379. major_code, minor_code, ib_mr, ib_mr->rkey);
  2380. return -EIO;
  2381. }
  2382. if (nesmr->pbls_used != 0) {
  2383. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  2384. if (nesmr->pbl_4k) {
  2385. nesadapter->free_4kpbl += nesmr->pbls_used;
  2386. if (nesadapter->free_4kpbl > nesadapter->max_4kpbl)
  2387. printk(KERN_ERR PFX "free 4KB PBLs(%u) has "
  2388. "exceeded the max(%u)\n",
  2389. nesadapter->free_4kpbl,
  2390. nesadapter->max_4kpbl);
  2391. } else {
  2392. nesadapter->free_256pbl += nesmr->pbls_used;
  2393. if (nesadapter->free_256pbl > nesadapter->max_256pbl)
  2394. printk(KERN_ERR PFX "free 256B PBLs(%u) has "
  2395. "exceeded the max(%u)\n",
  2396. nesadapter->free_256pbl,
  2397. nesadapter->max_256pbl);
  2398. }
  2399. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  2400. }
  2401. nes_free_resource(nesadapter, nesadapter->allocated_mrs,
  2402. (ib_mr->rkey & 0x0fffff00) >> 8);
  2403. kfree(nesmr);
  2404. return 0;
  2405. }
  2406. /**
  2407. * show_rev
  2408. */
  2409. static ssize_t show_rev(struct device *dev, struct device_attribute *attr,
  2410. char *buf)
  2411. {
  2412. struct nes_ib_device *nesibdev =
  2413. container_of(dev, struct nes_ib_device, ibdev.dev);
  2414. struct nes_vnic *nesvnic = nesibdev->nesvnic;
  2415. nes_debug(NES_DBG_INIT, "\n");
  2416. return sprintf(buf, "%x\n", nesvnic->nesdev->nesadapter->hw_rev);
  2417. }
  2418. /**
  2419. * show_fw_ver
  2420. */
  2421. static ssize_t show_fw_ver(struct device *dev, struct device_attribute *attr,
  2422. char *buf)
  2423. {
  2424. struct nes_ib_device *nesibdev =
  2425. container_of(dev, struct nes_ib_device, ibdev.dev);
  2426. struct nes_vnic *nesvnic = nesibdev->nesvnic;
  2427. nes_debug(NES_DBG_INIT, "\n");
  2428. return sprintf(buf, "%u.%u\n",
  2429. (nesvnic->nesdev->nesadapter->firmware_version >> 16),
  2430. (nesvnic->nesdev->nesadapter->firmware_version & 0x000000ff));
  2431. }
  2432. /**
  2433. * show_hca
  2434. */
  2435. static ssize_t show_hca(struct device *dev, struct device_attribute *attr,
  2436. char *buf)
  2437. {
  2438. nes_debug(NES_DBG_INIT, "\n");
  2439. return sprintf(buf, "NES020\n");
  2440. }
  2441. /**
  2442. * show_board
  2443. */
  2444. static ssize_t show_board(struct device *dev, struct device_attribute *attr,
  2445. char *buf)
  2446. {
  2447. nes_debug(NES_DBG_INIT, "\n");
  2448. return sprintf(buf, "%.*s\n", 32, "NES020 Board ID");
  2449. }
  2450. static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  2451. static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  2452. static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  2453. static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  2454. static struct device_attribute *nes_dev_attributes[] = {
  2455. &dev_attr_hw_rev,
  2456. &dev_attr_fw_ver,
  2457. &dev_attr_hca_type,
  2458. &dev_attr_board_id
  2459. };
  2460. /**
  2461. * nes_query_qp
  2462. */
  2463. static int nes_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  2464. int attr_mask, struct ib_qp_init_attr *init_attr)
  2465. {
  2466. struct nes_qp *nesqp = to_nesqp(ibqp);
  2467. nes_debug(NES_DBG_QP, "\n");
  2468. attr->qp_access_flags = 0;
  2469. attr->cap.max_send_wr = nesqp->hwqp.sq_size;
  2470. attr->cap.max_recv_wr = nesqp->hwqp.rq_size;
  2471. attr->cap.max_recv_sge = 1;
  2472. if (nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA)
  2473. attr->cap.max_inline_data = 0;
  2474. else
  2475. attr->cap.max_inline_data = 64;
  2476. init_attr->event_handler = nesqp->ibqp.event_handler;
  2477. init_attr->qp_context = nesqp->ibqp.qp_context;
  2478. init_attr->send_cq = nesqp->ibqp.send_cq;
  2479. init_attr->recv_cq = nesqp->ibqp.recv_cq;
  2480. init_attr->srq = nesqp->ibqp.srq = nesqp->ibqp.srq;
  2481. init_attr->cap = attr->cap;
  2482. return 0;
  2483. }
  2484. /**
  2485. * nes_hw_modify_qp
  2486. */
  2487. int nes_hw_modify_qp(struct nes_device *nesdev, struct nes_qp *nesqp,
  2488. u32 next_iwarp_state, u32 termlen, u32 wait_completion)
  2489. {
  2490. struct nes_hw_cqp_wqe *cqp_wqe;
  2491. /* struct iw_cm_id *cm_id = nesqp->cm_id; */
  2492. /* struct iw_cm_event cm_event; */
  2493. struct nes_cqp_request *cqp_request;
  2494. int ret;
  2495. u16 major_code;
  2496. nes_debug(NES_DBG_MOD_QP, "QP%u, refcount=%d\n",
  2497. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount));
  2498. cqp_request = nes_get_cqp_request(nesdev);
  2499. if (cqp_request == NULL) {
  2500. nes_debug(NES_DBG_MOD_QP, "Failed to get a cqp_request.\n");
  2501. return -ENOMEM;
  2502. }
  2503. if (wait_completion) {
  2504. cqp_request->waiting = 1;
  2505. } else {
  2506. cqp_request->waiting = 0;
  2507. }
  2508. cqp_wqe = &cqp_request->cqp_wqe;
  2509. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX,
  2510. NES_CQP_MODIFY_QP | NES_CQP_QP_TYPE_IWARP | next_iwarp_state);
  2511. nes_debug(NES_DBG_MOD_QP, "using next_iwarp_state=%08x, wqe_words=%08x\n",
  2512. next_iwarp_state, le32_to_cpu(cqp_wqe->wqe_words[NES_CQP_WQE_OPCODE_IDX]));
  2513. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  2514. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX, nesqp->hwqp.qp_id);
  2515. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, (u64)nesqp->nesqp_context_pbase);
  2516. /* If sending a terminate message, fill in the length (in words) */
  2517. if (((next_iwarp_state & NES_CQP_QP_IWARP_STATE_MASK) == NES_CQP_QP_IWARP_STATE_TERMINATE) &&
  2518. !(next_iwarp_state & NES_CQP_QP_TERM_DONT_SEND_TERM_MSG)) {
  2519. termlen = ((termlen + 3) >> 2) << NES_CQP_OP_TERMLEN_SHIFT;
  2520. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_NEW_MSS_IDX, termlen);
  2521. }
  2522. atomic_set(&cqp_request->refcount, 2);
  2523. nes_post_cqp_request(nesdev, cqp_request);
  2524. /* Wait for CQP */
  2525. if (wait_completion) {
  2526. /* nes_debug(NES_DBG_MOD_QP, "Waiting for modify iWARP QP%u to complete.\n",
  2527. nesqp->hwqp.qp_id); */
  2528. ret = wait_event_timeout(cqp_request->waitq, (cqp_request->request_done != 0),
  2529. NES_EVENT_TIMEOUT);
  2530. nes_debug(NES_DBG_MOD_QP, "Modify iwarp QP%u completed, wait_event_timeout ret=%u, "
  2531. "CQP Major:Minor codes = 0x%04X:0x%04X.\n",
  2532. nesqp->hwqp.qp_id, ret, cqp_request->major_code, cqp_request->minor_code);
  2533. major_code = cqp_request->major_code;
  2534. if (major_code) {
  2535. nes_debug(NES_DBG_MOD_QP, "Modify iwarp QP%u failed"
  2536. "CQP Major:Minor codes = 0x%04X:0x%04X, intended next state = 0x%08X.\n",
  2537. nesqp->hwqp.qp_id, cqp_request->major_code,
  2538. cqp_request->minor_code, next_iwarp_state);
  2539. }
  2540. nes_put_cqp_request(nesdev, cqp_request);
  2541. if (!ret)
  2542. return -ETIME;
  2543. else if (major_code)
  2544. return -EIO;
  2545. else
  2546. return 0;
  2547. } else {
  2548. return 0;
  2549. }
  2550. }
  2551. /**
  2552. * nes_modify_qp
  2553. */
  2554. int nes_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  2555. int attr_mask, struct ib_udata *udata)
  2556. {
  2557. struct nes_qp *nesqp = to_nesqp(ibqp);
  2558. struct nes_vnic *nesvnic = to_nesvnic(ibqp->device);
  2559. struct nes_device *nesdev = nesvnic->nesdev;
  2560. /* u32 cqp_head; */
  2561. /* u32 counter; */
  2562. u32 next_iwarp_state = 0;
  2563. int err;
  2564. unsigned long qplockflags;
  2565. int ret;
  2566. u16 original_last_aeq;
  2567. u8 issue_modify_qp = 0;
  2568. u8 dont_wait = 0;
  2569. nes_debug(NES_DBG_MOD_QP, "QP%u: QP State=%u, cur QP State=%u,"
  2570. " iwarp_state=0x%X, refcount=%d\n",
  2571. nesqp->hwqp.qp_id, attr->qp_state, nesqp->ibqp_state,
  2572. nesqp->iwarp_state, atomic_read(&nesqp->refcount));
  2573. spin_lock_irqsave(&nesqp->lock, qplockflags);
  2574. nes_debug(NES_DBG_MOD_QP, "QP%u: hw_iwarp_state=0x%X, hw_tcp_state=0x%X,"
  2575. " QP Access Flags=0x%X, attr_mask = 0x%0x\n",
  2576. nesqp->hwqp.qp_id, nesqp->hw_iwarp_state,
  2577. nesqp->hw_tcp_state, attr->qp_access_flags, attr_mask);
  2578. if (attr_mask & IB_QP_STATE) {
  2579. switch (attr->qp_state) {
  2580. case IB_QPS_INIT:
  2581. nes_debug(NES_DBG_MOD_QP, "QP%u: new state = init\n",
  2582. nesqp->hwqp.qp_id);
  2583. if (nesqp->iwarp_state > (u32)NES_CQP_QP_IWARP_STATE_IDLE) {
  2584. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2585. return -EINVAL;
  2586. }
  2587. next_iwarp_state = NES_CQP_QP_IWARP_STATE_IDLE;
  2588. issue_modify_qp = 1;
  2589. break;
  2590. case IB_QPS_RTR:
  2591. nes_debug(NES_DBG_MOD_QP, "QP%u: new state = rtr\n",
  2592. nesqp->hwqp.qp_id);
  2593. if (nesqp->iwarp_state>(u32)NES_CQP_QP_IWARP_STATE_IDLE) {
  2594. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2595. return -EINVAL;
  2596. }
  2597. next_iwarp_state = NES_CQP_QP_IWARP_STATE_IDLE;
  2598. issue_modify_qp = 1;
  2599. break;
  2600. case IB_QPS_RTS:
  2601. nes_debug(NES_DBG_MOD_QP, "QP%u: new state = rts\n",
  2602. nesqp->hwqp.qp_id);
  2603. if (nesqp->iwarp_state>(u32)NES_CQP_QP_IWARP_STATE_RTS) {
  2604. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2605. return -EINVAL;
  2606. }
  2607. if (nesqp->cm_id == NULL) {
  2608. nes_debug(NES_DBG_MOD_QP, "QP%u: Failing attempt to move QP to RTS without a CM_ID. \n",
  2609. nesqp->hwqp.qp_id );
  2610. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2611. return -EINVAL;
  2612. }
  2613. next_iwarp_state = NES_CQP_QP_IWARP_STATE_RTS;
  2614. if (nesqp->iwarp_state != NES_CQP_QP_IWARP_STATE_RTS)
  2615. next_iwarp_state |= NES_CQP_QP_CONTEXT_VALID |
  2616. NES_CQP_QP_ARP_VALID | NES_CQP_QP_ORD_VALID;
  2617. issue_modify_qp = 1;
  2618. nesqp->hw_tcp_state = NES_AEQE_TCP_STATE_ESTABLISHED;
  2619. nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_RTS;
  2620. nesqp->hte_added = 1;
  2621. break;
  2622. case IB_QPS_SQD:
  2623. issue_modify_qp = 1;
  2624. nes_debug(NES_DBG_MOD_QP, "QP%u: new state=closing. SQ head=%u, SQ tail=%u\n",
  2625. nesqp->hwqp.qp_id, nesqp->hwqp.sq_head, nesqp->hwqp.sq_tail);
  2626. if (nesqp->iwarp_state == (u32)NES_CQP_QP_IWARP_STATE_CLOSING) {
  2627. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2628. return 0;
  2629. } else {
  2630. if (nesqp->iwarp_state > (u32)NES_CQP_QP_IWARP_STATE_CLOSING) {
  2631. nes_debug(NES_DBG_MOD_QP, "QP%u: State change to closing"
  2632. " ignored due to current iWARP state\n",
  2633. nesqp->hwqp.qp_id);
  2634. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2635. return -EINVAL;
  2636. }
  2637. if (nesqp->hw_iwarp_state != NES_AEQE_IWARP_STATE_RTS) {
  2638. nes_debug(NES_DBG_MOD_QP, "QP%u: State change to closing"
  2639. " already done based on hw state.\n",
  2640. nesqp->hwqp.qp_id);
  2641. issue_modify_qp = 0;
  2642. }
  2643. switch (nesqp->hw_iwarp_state) {
  2644. case NES_AEQE_IWARP_STATE_CLOSING:
  2645. next_iwarp_state = NES_CQP_QP_IWARP_STATE_CLOSING;
  2646. case NES_AEQE_IWARP_STATE_TERMINATE:
  2647. next_iwarp_state = NES_CQP_QP_IWARP_STATE_TERMINATE;
  2648. break;
  2649. case NES_AEQE_IWARP_STATE_ERROR:
  2650. next_iwarp_state = NES_CQP_QP_IWARP_STATE_ERROR;
  2651. break;
  2652. default:
  2653. next_iwarp_state = NES_CQP_QP_IWARP_STATE_CLOSING;
  2654. nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_CLOSING;
  2655. break;
  2656. }
  2657. }
  2658. break;
  2659. case IB_QPS_SQE:
  2660. nes_debug(NES_DBG_MOD_QP, "QP%u: new state = terminate\n",
  2661. nesqp->hwqp.qp_id);
  2662. if (nesqp->iwarp_state>=(u32)NES_CQP_QP_IWARP_STATE_TERMINATE) {
  2663. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2664. return -EINVAL;
  2665. }
  2666. /* next_iwarp_state = (NES_CQP_QP_IWARP_STATE_TERMINATE | 0x02000000); */
  2667. next_iwarp_state = NES_CQP_QP_IWARP_STATE_TERMINATE;
  2668. nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_TERMINATE;
  2669. issue_modify_qp = 1;
  2670. break;
  2671. case IB_QPS_ERR:
  2672. case IB_QPS_RESET:
  2673. if (nesqp->iwarp_state == (u32)NES_CQP_QP_IWARP_STATE_ERROR) {
  2674. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2675. return -EINVAL;
  2676. }
  2677. nes_debug(NES_DBG_MOD_QP, "QP%u: new state = error\n",
  2678. nesqp->hwqp.qp_id);
  2679. if (nesqp->term_flags)
  2680. del_timer(&nesqp->terminate_timer);
  2681. next_iwarp_state = NES_CQP_QP_IWARP_STATE_ERROR;
  2682. /* next_iwarp_state = (NES_CQP_QP_IWARP_STATE_TERMINATE | 0x02000000); */
  2683. if (nesqp->hte_added) {
  2684. nes_debug(NES_DBG_MOD_QP, "set CQP_QP_DEL_HTE\n");
  2685. next_iwarp_state |= NES_CQP_QP_DEL_HTE;
  2686. nesqp->hte_added = 0;
  2687. }
  2688. if ((nesqp->hw_tcp_state > NES_AEQE_TCP_STATE_CLOSED) &&
  2689. (nesdev->iw_status) &&
  2690. (nesqp->hw_tcp_state != NES_AEQE_TCP_STATE_TIME_WAIT)) {
  2691. next_iwarp_state |= NES_CQP_QP_RESET;
  2692. } else {
  2693. nes_debug(NES_DBG_MOD_QP, "QP%u NOT setting NES_CQP_QP_RESET since TCP state = %u\n",
  2694. nesqp->hwqp.qp_id, nesqp->hw_tcp_state);
  2695. dont_wait = 1;
  2696. }
  2697. issue_modify_qp = 1;
  2698. nesqp->hw_iwarp_state = NES_AEQE_IWARP_STATE_ERROR;
  2699. break;
  2700. default:
  2701. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2702. return -EINVAL;
  2703. break;
  2704. }
  2705. nesqp->ibqp_state = attr->qp_state;
  2706. if (((nesqp->iwarp_state & NES_CQP_QP_IWARP_STATE_MASK) ==
  2707. (u32)NES_CQP_QP_IWARP_STATE_RTS) &&
  2708. ((next_iwarp_state & NES_CQP_QP_IWARP_STATE_MASK) >
  2709. (u32)NES_CQP_QP_IWARP_STATE_RTS)) {
  2710. nesqp->iwarp_state = next_iwarp_state & NES_CQP_QP_IWARP_STATE_MASK;
  2711. nes_debug(NES_DBG_MOD_QP, "Change nesqp->iwarp_state=%08x\n",
  2712. nesqp->iwarp_state);
  2713. } else {
  2714. nesqp->iwarp_state = next_iwarp_state & NES_CQP_QP_IWARP_STATE_MASK;
  2715. nes_debug(NES_DBG_MOD_QP, "Change nesqp->iwarp_state=%08x\n",
  2716. nesqp->iwarp_state);
  2717. }
  2718. }
  2719. if (attr_mask & IB_QP_ACCESS_FLAGS) {
  2720. if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE) {
  2721. nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_RDMA_WRITE_EN |
  2722. NES_QPCONTEXT_MISC_RDMA_READ_EN);
  2723. issue_modify_qp = 1;
  2724. }
  2725. if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE) {
  2726. nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_RDMA_WRITE_EN);
  2727. issue_modify_qp = 1;
  2728. }
  2729. if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ) {
  2730. nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_RDMA_READ_EN);
  2731. issue_modify_qp = 1;
  2732. }
  2733. if (attr->qp_access_flags & IB_ACCESS_MW_BIND) {
  2734. nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_WBIND_EN);
  2735. issue_modify_qp = 1;
  2736. }
  2737. if (nesqp->user_mode) {
  2738. nesqp->nesqp_context->misc |= cpu_to_le32(NES_QPCONTEXT_MISC_RDMA_WRITE_EN |
  2739. NES_QPCONTEXT_MISC_RDMA_READ_EN);
  2740. issue_modify_qp = 1;
  2741. }
  2742. }
  2743. original_last_aeq = nesqp->last_aeq;
  2744. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2745. nes_debug(NES_DBG_MOD_QP, "issue_modify_qp=%u\n", issue_modify_qp);
  2746. ret = 0;
  2747. if (issue_modify_qp) {
  2748. nes_debug(NES_DBG_MOD_QP, "call nes_hw_modify_qp\n");
  2749. ret = nes_hw_modify_qp(nesdev, nesqp, next_iwarp_state, 0, 1);
  2750. if (ret)
  2751. nes_debug(NES_DBG_MOD_QP, "nes_hw_modify_qp (next_iwarp_state = 0x%08X)"
  2752. " failed for QP%u.\n",
  2753. next_iwarp_state, nesqp->hwqp.qp_id);
  2754. }
  2755. if ((issue_modify_qp) && (nesqp->ibqp_state > IB_QPS_RTS)) {
  2756. nes_debug(NES_DBG_MOD_QP, "QP%u Issued ModifyQP refcount (%d),"
  2757. " original_last_aeq = 0x%04X. last_aeq = 0x%04X.\n",
  2758. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
  2759. original_last_aeq, nesqp->last_aeq);
  2760. if ((!ret) ||
  2761. ((original_last_aeq != NES_AEQE_AEID_RDMAP_ROE_BAD_LLP_CLOSE) &&
  2762. (ret))) {
  2763. if (dont_wait) {
  2764. if (nesqp->cm_id && nesqp->hw_tcp_state != 0) {
  2765. nes_debug(NES_DBG_MOD_QP, "QP%u Queuing fake disconnect for QP refcount (%d),"
  2766. " original_last_aeq = 0x%04X. last_aeq = 0x%04X.\n",
  2767. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
  2768. original_last_aeq, nesqp->last_aeq);
  2769. /* this one is for the cm_disconnect thread */
  2770. spin_lock_irqsave(&nesqp->lock, qplockflags);
  2771. nesqp->hw_tcp_state = NES_AEQE_TCP_STATE_CLOSED;
  2772. nesqp->last_aeq = NES_AEQE_AEID_RESET_SENT;
  2773. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2774. nes_cm_disconn(nesqp);
  2775. } else {
  2776. nes_debug(NES_DBG_MOD_QP, "QP%u No fake disconnect, QP refcount=%d\n",
  2777. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount));
  2778. }
  2779. } else {
  2780. spin_lock_irqsave(&nesqp->lock, qplockflags);
  2781. if (nesqp->cm_id) {
  2782. /* These two are for the timer thread */
  2783. if (atomic_inc_return(&nesqp->close_timer_started) == 1) {
  2784. nesqp->cm_id->add_ref(nesqp->cm_id);
  2785. nes_debug(NES_DBG_MOD_QP, "QP%u Not decrementing QP refcount (%d),"
  2786. " need ae to finish up, original_last_aeq = 0x%04X."
  2787. " last_aeq = 0x%04X, scheduling timer.\n",
  2788. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
  2789. original_last_aeq, nesqp->last_aeq);
  2790. schedule_nes_timer(nesqp->cm_node, (struct sk_buff *) nesqp, NES_TIMER_TYPE_CLOSE, 1, 0);
  2791. }
  2792. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2793. } else {
  2794. spin_unlock_irqrestore(&nesqp->lock, qplockflags);
  2795. nes_debug(NES_DBG_MOD_QP, "QP%u Not decrementing QP refcount (%d),"
  2796. " need ae to finish up, original_last_aeq = 0x%04X."
  2797. " last_aeq = 0x%04X.\n",
  2798. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
  2799. original_last_aeq, nesqp->last_aeq);
  2800. }
  2801. }
  2802. } else {
  2803. nes_debug(NES_DBG_MOD_QP, "QP%u Decrementing QP refcount (%d), No ae to finish up,"
  2804. " original_last_aeq = 0x%04X. last_aeq = 0x%04X.\n",
  2805. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
  2806. original_last_aeq, nesqp->last_aeq);
  2807. }
  2808. } else {
  2809. nes_debug(NES_DBG_MOD_QP, "QP%u Decrementing QP refcount (%d), No ae to finish up,"
  2810. " original_last_aeq = 0x%04X. last_aeq = 0x%04X.\n",
  2811. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount),
  2812. original_last_aeq, nesqp->last_aeq);
  2813. }
  2814. err = 0;
  2815. nes_debug(NES_DBG_MOD_QP, "QP%u Leaving, refcount=%d\n",
  2816. nesqp->hwqp.qp_id, atomic_read(&nesqp->refcount));
  2817. return err;
  2818. }
  2819. /**
  2820. * nes_muticast_attach
  2821. */
  2822. static int nes_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  2823. {
  2824. nes_debug(NES_DBG_INIT, "\n");
  2825. return -ENOSYS;
  2826. }
  2827. /**
  2828. * nes_multicast_detach
  2829. */
  2830. static int nes_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  2831. {
  2832. nes_debug(NES_DBG_INIT, "\n");
  2833. return -ENOSYS;
  2834. }
  2835. /**
  2836. * nes_process_mad
  2837. */
  2838. static int nes_process_mad(struct ib_device *ibdev, int mad_flags,
  2839. u8 port_num, struct ib_wc *in_wc, struct ib_grh *in_grh,
  2840. struct ib_mad *in_mad, struct ib_mad *out_mad)
  2841. {
  2842. nes_debug(NES_DBG_INIT, "\n");
  2843. return -ENOSYS;
  2844. }
  2845. static inline void
  2846. fill_wqe_sg_send(struct nes_hw_qp_wqe *wqe, struct ib_send_wr *ib_wr, u32 uselkey)
  2847. {
  2848. int sge_index;
  2849. int total_payload_length = 0;
  2850. for (sge_index = 0; sge_index < ib_wr->num_sge; sge_index++) {
  2851. set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_FRAG0_LOW_IDX+(sge_index*4),
  2852. ib_wr->sg_list[sge_index].addr);
  2853. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_LENGTH0_IDX + (sge_index*4),
  2854. ib_wr->sg_list[sge_index].length);
  2855. if (uselkey)
  2856. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_STAG0_IDX + (sge_index*4),
  2857. (ib_wr->sg_list[sge_index].lkey));
  2858. else
  2859. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_STAG0_IDX + (sge_index*4), 0);
  2860. total_payload_length += ib_wr->sg_list[sge_index].length;
  2861. }
  2862. nes_debug(NES_DBG_IW_TX, "UC UC UC, sending total_payload_length=%u \n",
  2863. total_payload_length);
  2864. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
  2865. total_payload_length);
  2866. }
  2867. /**
  2868. * nes_post_send
  2869. */
  2870. static int nes_post_send(struct ib_qp *ibqp, struct ib_send_wr *ib_wr,
  2871. struct ib_send_wr **bad_wr)
  2872. {
  2873. u64 u64temp;
  2874. unsigned long flags = 0;
  2875. struct nes_vnic *nesvnic = to_nesvnic(ibqp->device);
  2876. struct nes_device *nesdev = nesvnic->nesdev;
  2877. struct nes_qp *nesqp = to_nesqp(ibqp);
  2878. struct nes_hw_qp_wqe *wqe;
  2879. int err = 0;
  2880. u32 qsize = nesqp->hwqp.sq_size;
  2881. u32 head;
  2882. u32 wqe_misc = 0;
  2883. u32 wqe_count = 0;
  2884. u32 counter;
  2885. if (nesqp->ibqp_state > IB_QPS_RTS) {
  2886. err = -EINVAL;
  2887. goto out;
  2888. }
  2889. spin_lock_irqsave(&nesqp->lock, flags);
  2890. head = nesqp->hwqp.sq_head;
  2891. while (ib_wr) {
  2892. /* Check for QP error */
  2893. if (nesqp->term_flags) {
  2894. err = -EINVAL;
  2895. break;
  2896. }
  2897. /* Check for SQ overflow */
  2898. if (((head + (2 * qsize) - nesqp->hwqp.sq_tail) % qsize) == (qsize - 1)) {
  2899. err = -ENOMEM;
  2900. break;
  2901. }
  2902. wqe = &nesqp->hwqp.sq_vbase[head];
  2903. /* nes_debug(NES_DBG_IW_TX, "processing sq wqe for QP%u at %p, head = %u.\n",
  2904. nesqp->hwqp.qp_id, wqe, head); */
  2905. nes_fill_init_qp_wqe(wqe, nesqp, head);
  2906. u64temp = (u64)(ib_wr->wr_id);
  2907. set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_SCRATCH_LOW_IDX,
  2908. u64temp);
  2909. switch (ib_wr->opcode) {
  2910. case IB_WR_SEND:
  2911. case IB_WR_SEND_WITH_INV:
  2912. if (IB_WR_SEND == ib_wr->opcode) {
  2913. if (ib_wr->send_flags & IB_SEND_SOLICITED)
  2914. wqe_misc = NES_IWARP_SQ_OP_SENDSE;
  2915. else
  2916. wqe_misc = NES_IWARP_SQ_OP_SEND;
  2917. } else {
  2918. if (ib_wr->send_flags & IB_SEND_SOLICITED)
  2919. wqe_misc = NES_IWARP_SQ_OP_SENDSEINV;
  2920. else
  2921. wqe_misc = NES_IWARP_SQ_OP_SENDINV;
  2922. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_INV_STAG_LOW_IDX,
  2923. ib_wr->ex.invalidate_rkey);
  2924. }
  2925. if (ib_wr->num_sge > nesdev->nesadapter->max_sge) {
  2926. err = -EINVAL;
  2927. break;
  2928. }
  2929. if (ib_wr->send_flags & IB_SEND_FENCE)
  2930. wqe_misc |= NES_IWARP_SQ_WQE_LOCAL_FENCE;
  2931. if ((ib_wr->send_flags & IB_SEND_INLINE) &&
  2932. ((nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) == 0) &&
  2933. (ib_wr->sg_list[0].length <= 64)) {
  2934. memcpy(&wqe->wqe_words[NES_IWARP_SQ_WQE_IMM_DATA_START_IDX],
  2935. (void *)(unsigned long)ib_wr->sg_list[0].addr, ib_wr->sg_list[0].length);
  2936. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
  2937. ib_wr->sg_list[0].length);
  2938. wqe_misc |= NES_IWARP_SQ_WQE_IMM_DATA;
  2939. } else {
  2940. fill_wqe_sg_send(wqe, ib_wr, 1);
  2941. }
  2942. break;
  2943. case IB_WR_RDMA_WRITE:
  2944. wqe_misc = NES_IWARP_SQ_OP_RDMAW;
  2945. if (ib_wr->num_sge > nesdev->nesadapter->max_sge) {
  2946. nes_debug(NES_DBG_IW_TX, "Exceeded max sge, ib_wr=%u, max=%u\n",
  2947. ib_wr->num_sge, nesdev->nesadapter->max_sge);
  2948. err = -EINVAL;
  2949. break;
  2950. }
  2951. if (ib_wr->send_flags & IB_SEND_FENCE)
  2952. wqe_misc |= NES_IWARP_SQ_WQE_LOCAL_FENCE;
  2953. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_STAG_IDX,
  2954. ib_wr->wr.rdma.rkey);
  2955. set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_TO_LOW_IDX,
  2956. ib_wr->wr.rdma.remote_addr);
  2957. if ((ib_wr->send_flags & IB_SEND_INLINE) &&
  2958. ((nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) == 0) &&
  2959. (ib_wr->sg_list[0].length <= 64)) {
  2960. memcpy(&wqe->wqe_words[NES_IWARP_SQ_WQE_IMM_DATA_START_IDX],
  2961. (void *)(unsigned long)ib_wr->sg_list[0].addr, ib_wr->sg_list[0].length);
  2962. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX,
  2963. ib_wr->sg_list[0].length);
  2964. wqe_misc |= NES_IWARP_SQ_WQE_IMM_DATA;
  2965. } else {
  2966. fill_wqe_sg_send(wqe, ib_wr, 1);
  2967. }
  2968. wqe->wqe_words[NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX] =
  2969. wqe->wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX];
  2970. break;
  2971. case IB_WR_RDMA_READ:
  2972. case IB_WR_RDMA_READ_WITH_INV:
  2973. /* iWARP only supports 1 sge for RDMA reads */
  2974. if (ib_wr->num_sge > 1) {
  2975. nes_debug(NES_DBG_IW_TX, "Exceeded max sge, ib_wr=%u, max=1\n",
  2976. ib_wr->num_sge);
  2977. err = -EINVAL;
  2978. break;
  2979. }
  2980. if (ib_wr->opcode == IB_WR_RDMA_READ) {
  2981. wqe_misc = NES_IWARP_SQ_OP_RDMAR;
  2982. } else {
  2983. wqe_misc = NES_IWARP_SQ_OP_RDMAR_LOCINV;
  2984. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_INV_STAG_LOW_IDX,
  2985. ib_wr->ex.invalidate_rkey);
  2986. }
  2987. set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_TO_LOW_IDX,
  2988. ib_wr->wr.rdma.remote_addr);
  2989. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_STAG_IDX,
  2990. ib_wr->wr.rdma.rkey);
  2991. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX,
  2992. ib_wr->sg_list->length);
  2993. set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_FRAG0_LOW_IDX,
  2994. ib_wr->sg_list->addr);
  2995. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_STAG0_IDX,
  2996. ib_wr->sg_list->lkey);
  2997. break;
  2998. case IB_WR_LOCAL_INV:
  2999. wqe_misc = NES_IWARP_SQ_OP_LOCINV;
  3000. set_wqe_32bit_value(wqe->wqe_words,
  3001. NES_IWARP_SQ_LOCINV_WQE_INV_STAG_IDX,
  3002. ib_wr->ex.invalidate_rkey);
  3003. break;
  3004. case IB_WR_FAST_REG_MR:
  3005. {
  3006. int i;
  3007. int flags = ib_wr->wr.fast_reg.access_flags;
  3008. struct nes_ib_fast_reg_page_list *pnesfrpl =
  3009. container_of(ib_wr->wr.fast_reg.page_list,
  3010. struct nes_ib_fast_reg_page_list,
  3011. ibfrpl);
  3012. u64 *src_page_list = pnesfrpl->ibfrpl.page_list;
  3013. u64 *dst_page_list = pnesfrpl->nes_wqe_pbl.kva;
  3014. if (ib_wr->wr.fast_reg.page_list_len >
  3015. (NES_4K_PBL_CHUNK_SIZE / sizeof(u64))) {
  3016. nes_debug(NES_DBG_IW_TX, "SQ_FMR: bad page_list_len\n");
  3017. err = -EINVAL;
  3018. break;
  3019. }
  3020. wqe_misc = NES_IWARP_SQ_OP_FAST_REG;
  3021. set_wqe_64bit_value(wqe->wqe_words,
  3022. NES_IWARP_SQ_FMR_WQE_VA_FBO_LOW_IDX,
  3023. ib_wr->wr.fast_reg.iova_start);
  3024. set_wqe_32bit_value(wqe->wqe_words,
  3025. NES_IWARP_SQ_FMR_WQE_LENGTH_LOW_IDX,
  3026. ib_wr->wr.fast_reg.length);
  3027. set_wqe_32bit_value(wqe->wqe_words,
  3028. NES_IWARP_SQ_FMR_WQE_LENGTH_HIGH_IDX, 0);
  3029. set_wqe_32bit_value(wqe->wqe_words,
  3030. NES_IWARP_SQ_FMR_WQE_MR_STAG_IDX,
  3031. ib_wr->wr.fast_reg.rkey);
  3032. /* Set page size: */
  3033. if (ib_wr->wr.fast_reg.page_shift == 12) {
  3034. wqe_misc |= NES_IWARP_SQ_FMR_WQE_PAGE_SIZE_4K;
  3035. } else if (ib_wr->wr.fast_reg.page_shift == 21) {
  3036. wqe_misc |= NES_IWARP_SQ_FMR_WQE_PAGE_SIZE_2M;
  3037. } else {
  3038. nes_debug(NES_DBG_IW_TX, "Invalid page shift,"
  3039. " ib_wr=%u, max=1\n", ib_wr->num_sge);
  3040. err = -EINVAL;
  3041. break;
  3042. }
  3043. /* Set access_flags */
  3044. wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_LOCAL_READ;
  3045. if (flags & IB_ACCESS_LOCAL_WRITE)
  3046. wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_LOCAL_WRITE;
  3047. if (flags & IB_ACCESS_REMOTE_WRITE)
  3048. wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_REMOTE_WRITE;
  3049. if (flags & IB_ACCESS_REMOTE_READ)
  3050. wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_REMOTE_READ;
  3051. if (flags & IB_ACCESS_MW_BIND)
  3052. wqe_misc |= NES_IWARP_SQ_FMR_WQE_RIGHTS_ENABLE_WINDOW_BIND;
  3053. /* Fill in PBL info: */
  3054. if (ib_wr->wr.fast_reg.page_list_len >
  3055. pnesfrpl->ibfrpl.max_page_list_len) {
  3056. nes_debug(NES_DBG_IW_TX, "Invalid page list length,"
  3057. " ib_wr=%p, value=%u, max=%u\n",
  3058. ib_wr, ib_wr->wr.fast_reg.page_list_len,
  3059. pnesfrpl->ibfrpl.max_page_list_len);
  3060. err = -EINVAL;
  3061. break;
  3062. }
  3063. set_wqe_64bit_value(wqe->wqe_words,
  3064. NES_IWARP_SQ_FMR_WQE_PBL_ADDR_LOW_IDX,
  3065. pnesfrpl->nes_wqe_pbl.paddr);
  3066. set_wqe_32bit_value(wqe->wqe_words,
  3067. NES_IWARP_SQ_FMR_WQE_PBL_LENGTH_IDX,
  3068. ib_wr->wr.fast_reg.page_list_len * 8);
  3069. for (i = 0; i < ib_wr->wr.fast_reg.page_list_len; i++)
  3070. dst_page_list[i] = cpu_to_le64(src_page_list[i]);
  3071. nes_debug(NES_DBG_IW_TX, "SQ_FMR: iova_start: %llx, "
  3072. "length: %d, rkey: %0x, pgl_paddr: %llx, "
  3073. "page_list_len: %u, wqe_misc: %x\n",
  3074. (unsigned long long) ib_wr->wr.fast_reg.iova_start,
  3075. ib_wr->wr.fast_reg.length,
  3076. ib_wr->wr.fast_reg.rkey,
  3077. (unsigned long long) pnesfrpl->nes_wqe_pbl.paddr,
  3078. ib_wr->wr.fast_reg.page_list_len,
  3079. wqe_misc);
  3080. break;
  3081. }
  3082. default:
  3083. /* error */
  3084. err = -EINVAL;
  3085. break;
  3086. }
  3087. if (err)
  3088. break;
  3089. if ((ib_wr->send_flags & IB_SEND_SIGNALED) || nesqp->sig_all)
  3090. wqe_misc |= NES_IWARP_SQ_WQE_SIGNALED_COMPL;
  3091. wqe->wqe_words[NES_IWARP_SQ_WQE_MISC_IDX] = cpu_to_le32(wqe_misc);
  3092. ib_wr = ib_wr->next;
  3093. head++;
  3094. wqe_count++;
  3095. if (head >= qsize)
  3096. head = 0;
  3097. }
  3098. nesqp->hwqp.sq_head = head;
  3099. barrier();
  3100. while (wqe_count) {
  3101. counter = min(wqe_count, ((u32)255));
  3102. wqe_count -= counter;
  3103. nes_write32(nesdev->regs + NES_WQE_ALLOC,
  3104. (counter << 24) | 0x00800000 | nesqp->hwqp.qp_id);
  3105. }
  3106. spin_unlock_irqrestore(&nesqp->lock, flags);
  3107. out:
  3108. if (err)
  3109. *bad_wr = ib_wr;
  3110. return err;
  3111. }
  3112. /**
  3113. * nes_post_recv
  3114. */
  3115. static int nes_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *ib_wr,
  3116. struct ib_recv_wr **bad_wr)
  3117. {
  3118. u64 u64temp;
  3119. unsigned long flags = 0;
  3120. struct nes_vnic *nesvnic = to_nesvnic(ibqp->device);
  3121. struct nes_device *nesdev = nesvnic->nesdev;
  3122. struct nes_qp *nesqp = to_nesqp(ibqp);
  3123. struct nes_hw_qp_wqe *wqe;
  3124. int err = 0;
  3125. int sge_index;
  3126. u32 qsize = nesqp->hwqp.rq_size;
  3127. u32 head;
  3128. u32 wqe_count = 0;
  3129. u32 counter;
  3130. u32 total_payload_length;
  3131. if (nesqp->ibqp_state > IB_QPS_RTS) {
  3132. err = -EINVAL;
  3133. goto out;
  3134. }
  3135. spin_lock_irqsave(&nesqp->lock, flags);
  3136. head = nesqp->hwqp.rq_head;
  3137. while (ib_wr) {
  3138. /* Check for QP error */
  3139. if (nesqp->term_flags) {
  3140. err = -EINVAL;
  3141. break;
  3142. }
  3143. if (ib_wr->num_sge > nesdev->nesadapter->max_sge) {
  3144. err = -EINVAL;
  3145. break;
  3146. }
  3147. /* Check for RQ overflow */
  3148. if (((head + (2 * qsize) - nesqp->hwqp.rq_tail) % qsize) == (qsize - 1)) {
  3149. err = -ENOMEM;
  3150. break;
  3151. }
  3152. nes_debug(NES_DBG_IW_RX, "ibwr sge count = %u.\n", ib_wr->num_sge);
  3153. wqe = &nesqp->hwqp.rq_vbase[head];
  3154. /* nes_debug(NES_DBG_IW_RX, "QP%u:processing rq wqe at %p, head = %u.\n",
  3155. nesqp->hwqp.qp_id, wqe, head); */
  3156. nes_fill_init_qp_wqe(wqe, nesqp, head);
  3157. u64temp = (u64)(ib_wr->wr_id);
  3158. set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_SQ_WQE_COMP_SCRATCH_LOW_IDX,
  3159. u64temp);
  3160. total_payload_length = 0;
  3161. for (sge_index=0; sge_index < ib_wr->num_sge; sge_index++) {
  3162. set_wqe_64bit_value(wqe->wqe_words, NES_IWARP_RQ_WQE_FRAG0_LOW_IDX+(sge_index*4),
  3163. ib_wr->sg_list[sge_index].addr);
  3164. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_RQ_WQE_LENGTH0_IDX+(sge_index*4),
  3165. ib_wr->sg_list[sge_index].length);
  3166. set_wqe_32bit_value(wqe->wqe_words,NES_IWARP_RQ_WQE_STAG0_IDX+(sge_index*4),
  3167. ib_wr->sg_list[sge_index].lkey);
  3168. total_payload_length += ib_wr->sg_list[sge_index].length;
  3169. }
  3170. set_wqe_32bit_value(wqe->wqe_words, NES_IWARP_RQ_WQE_TOTAL_PAYLOAD_IDX,
  3171. total_payload_length);
  3172. ib_wr = ib_wr->next;
  3173. head++;
  3174. wqe_count++;
  3175. if (head >= qsize)
  3176. head = 0;
  3177. }
  3178. nesqp->hwqp.rq_head = head;
  3179. barrier();
  3180. while (wqe_count) {
  3181. counter = min(wqe_count, ((u32)255));
  3182. wqe_count -= counter;
  3183. nes_write32(nesdev->regs+NES_WQE_ALLOC, (counter<<24) | nesqp->hwqp.qp_id);
  3184. }
  3185. spin_unlock_irqrestore(&nesqp->lock, flags);
  3186. out:
  3187. if (err)
  3188. *bad_wr = ib_wr;
  3189. return err;
  3190. }
  3191. /**
  3192. * nes_poll_cq
  3193. */
  3194. static int nes_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *entry)
  3195. {
  3196. u64 u64temp;
  3197. u64 wrid;
  3198. unsigned long flags = 0;
  3199. struct nes_vnic *nesvnic = to_nesvnic(ibcq->device);
  3200. struct nes_device *nesdev = nesvnic->nesdev;
  3201. struct nes_cq *nescq = to_nescq(ibcq);
  3202. struct nes_qp *nesqp;
  3203. struct nes_hw_cqe cqe;
  3204. u32 head;
  3205. u32 wq_tail = 0;
  3206. u32 cq_size;
  3207. u32 cqe_count = 0;
  3208. u32 wqe_index;
  3209. u32 u32temp;
  3210. u32 move_cq_head = 1;
  3211. u32 err_code;
  3212. nes_debug(NES_DBG_CQ, "\n");
  3213. spin_lock_irqsave(&nescq->lock, flags);
  3214. head = nescq->hw_cq.cq_head;
  3215. cq_size = nescq->hw_cq.cq_size;
  3216. while (cqe_count < num_entries) {
  3217. if ((le32_to_cpu(nescq->hw_cq.cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX]) &
  3218. NES_CQE_VALID) == 0)
  3219. break;
  3220. /*
  3221. * Make sure we read CQ entry contents *after*
  3222. * we've checked the valid bit.
  3223. */
  3224. rmb();
  3225. cqe = nescq->hw_cq.cq_vbase[head];
  3226. u32temp = le32_to_cpu(cqe.cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX]);
  3227. wqe_index = u32temp & (nesdev->nesadapter->max_qp_wr - 1);
  3228. u32temp &= ~(NES_SW_CONTEXT_ALIGN-1);
  3229. /* parse CQE, get completion context from WQE (either rq or sq) */
  3230. u64temp = (((u64)(le32_to_cpu(cqe.cqe_words[NES_CQE_COMP_COMP_CTX_HIGH_IDX])))<<32) |
  3231. ((u64)u32temp);
  3232. if (u64temp) {
  3233. nesqp = (struct nes_qp *)(unsigned long)u64temp;
  3234. memset(entry, 0, sizeof *entry);
  3235. if (cqe.cqe_words[NES_CQE_ERROR_CODE_IDX] == 0) {
  3236. entry->status = IB_WC_SUCCESS;
  3237. } else {
  3238. err_code = le32_to_cpu(cqe.cqe_words[NES_CQE_ERROR_CODE_IDX]);
  3239. if (NES_IWARP_CQE_MAJOR_DRV == (err_code >> 16)) {
  3240. entry->status = err_code & 0x0000ffff;
  3241. /* The rest of the cqe's will be marked as flushed */
  3242. nescq->hw_cq.cq_vbase[head].cqe_words[NES_CQE_ERROR_CODE_IDX] =
  3243. cpu_to_le32((NES_IWARP_CQE_MAJOR_FLUSH << 16) |
  3244. NES_IWARP_CQE_MINOR_FLUSH);
  3245. } else
  3246. entry->status = IB_WC_WR_FLUSH_ERR;
  3247. }
  3248. entry->qp = &nesqp->ibqp;
  3249. entry->src_qp = nesqp->hwqp.qp_id;
  3250. if (le32_to_cpu(cqe.cqe_words[NES_CQE_OPCODE_IDX]) & NES_CQE_SQ) {
  3251. if (nesqp->skip_lsmm) {
  3252. nesqp->skip_lsmm = 0;
  3253. nesqp->hwqp.sq_tail++;
  3254. }
  3255. /* Working on a SQ Completion*/
  3256. wrid = (((u64)(cpu_to_le32((u32)nesqp->hwqp.sq_vbase[wqe_index].
  3257. wqe_words[NES_IWARP_SQ_WQE_COMP_SCRATCH_HIGH_IDX]))) << 32) |
  3258. ((u64)(cpu_to_le32((u32)nesqp->hwqp.sq_vbase[wqe_index].
  3259. wqe_words[NES_IWARP_SQ_WQE_COMP_SCRATCH_LOW_IDX])));
  3260. entry->byte_len = le32_to_cpu(nesqp->hwqp.sq_vbase[wqe_index].
  3261. wqe_words[NES_IWARP_SQ_WQE_TOTAL_PAYLOAD_IDX]);
  3262. switch (le32_to_cpu(nesqp->hwqp.sq_vbase[wqe_index].
  3263. wqe_words[NES_IWARP_SQ_WQE_MISC_IDX]) & 0x3f) {
  3264. case NES_IWARP_SQ_OP_RDMAW:
  3265. nes_debug(NES_DBG_CQ, "Operation = RDMA WRITE.\n");
  3266. entry->opcode = IB_WC_RDMA_WRITE;
  3267. break;
  3268. case NES_IWARP_SQ_OP_RDMAR:
  3269. nes_debug(NES_DBG_CQ, "Operation = RDMA READ.\n");
  3270. entry->opcode = IB_WC_RDMA_READ;
  3271. entry->byte_len = le32_to_cpu(nesqp->hwqp.sq_vbase[wqe_index].
  3272. wqe_words[NES_IWARP_SQ_WQE_RDMA_LENGTH_IDX]);
  3273. break;
  3274. case NES_IWARP_SQ_OP_SENDINV:
  3275. case NES_IWARP_SQ_OP_SENDSEINV:
  3276. case NES_IWARP_SQ_OP_SEND:
  3277. case NES_IWARP_SQ_OP_SENDSE:
  3278. nes_debug(NES_DBG_CQ, "Operation = Send.\n");
  3279. entry->opcode = IB_WC_SEND;
  3280. break;
  3281. case NES_IWARP_SQ_OP_LOCINV:
  3282. entry->opcode = IB_WC_LOCAL_INV;
  3283. break;
  3284. case NES_IWARP_SQ_OP_FAST_REG:
  3285. entry->opcode = IB_WC_FAST_REG_MR;
  3286. break;
  3287. }
  3288. nesqp->hwqp.sq_tail = (wqe_index+1)&(nesqp->hwqp.sq_size - 1);
  3289. if ((entry->status != IB_WC_SUCCESS) && (nesqp->hwqp.sq_tail != nesqp->hwqp.sq_head)) {
  3290. move_cq_head = 0;
  3291. wq_tail = nesqp->hwqp.sq_tail;
  3292. }
  3293. } else {
  3294. /* Working on a RQ Completion*/
  3295. entry->byte_len = le32_to_cpu(cqe.cqe_words[NES_CQE_PAYLOAD_LENGTH_IDX]);
  3296. wrid = ((u64)(le32_to_cpu(nesqp->hwqp.rq_vbase[wqe_index].wqe_words[NES_IWARP_RQ_WQE_COMP_SCRATCH_LOW_IDX]))) |
  3297. ((u64)(le32_to_cpu(nesqp->hwqp.rq_vbase[wqe_index].wqe_words[NES_IWARP_RQ_WQE_COMP_SCRATCH_HIGH_IDX]))<<32);
  3298. entry->opcode = IB_WC_RECV;
  3299. nesqp->hwqp.rq_tail = (wqe_index+1)&(nesqp->hwqp.rq_size - 1);
  3300. if ((entry->status != IB_WC_SUCCESS) && (nesqp->hwqp.rq_tail != nesqp->hwqp.rq_head)) {
  3301. move_cq_head = 0;
  3302. wq_tail = nesqp->hwqp.rq_tail;
  3303. }
  3304. }
  3305. entry->wr_id = wrid;
  3306. entry++;
  3307. cqe_count++;
  3308. }
  3309. if (move_cq_head) {
  3310. nescq->hw_cq.cq_vbase[head].cqe_words[NES_CQE_OPCODE_IDX] = 0;
  3311. if (++head >= cq_size)
  3312. head = 0;
  3313. nescq->polled_completions++;
  3314. if ((nescq->polled_completions > (cq_size / 2)) ||
  3315. (nescq->polled_completions == 255)) {
  3316. nes_debug(NES_DBG_CQ, "CQ%u Issuing CQE Allocate since more than half of cqes"
  3317. " are pending %u of %u.\n",
  3318. nescq->hw_cq.cq_number, nescq->polled_completions, cq_size);
  3319. nes_write32(nesdev->regs+NES_CQE_ALLOC,
  3320. nescq->hw_cq.cq_number | (nescq->polled_completions << 16));
  3321. nescq->polled_completions = 0;
  3322. }
  3323. } else {
  3324. /* Update the wqe index and set status to flush */
  3325. wqe_index = le32_to_cpu(cqe.cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX]);
  3326. wqe_index = (wqe_index & (~(nesdev->nesadapter->max_qp_wr - 1))) | wq_tail;
  3327. nescq->hw_cq.cq_vbase[head].cqe_words[NES_CQE_COMP_COMP_CTX_LOW_IDX] =
  3328. cpu_to_le32(wqe_index);
  3329. move_cq_head = 1; /* ready for next pass */
  3330. }
  3331. }
  3332. if (nescq->polled_completions) {
  3333. nes_write32(nesdev->regs+NES_CQE_ALLOC,
  3334. nescq->hw_cq.cq_number | (nescq->polled_completions << 16));
  3335. nescq->polled_completions = 0;
  3336. }
  3337. nescq->hw_cq.cq_head = head;
  3338. nes_debug(NES_DBG_CQ, "Reporting %u completions for CQ%u.\n",
  3339. cqe_count, nescq->hw_cq.cq_number);
  3340. spin_unlock_irqrestore(&nescq->lock, flags);
  3341. return cqe_count;
  3342. }
  3343. /**
  3344. * nes_req_notify_cq
  3345. */
  3346. static int nes_req_notify_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags notify_flags)
  3347. {
  3348. struct nes_vnic *nesvnic = to_nesvnic(ibcq->device);
  3349. struct nes_device *nesdev = nesvnic->nesdev;
  3350. struct nes_cq *nescq = to_nescq(ibcq);
  3351. u32 cq_arm;
  3352. nes_debug(NES_DBG_CQ, "Requesting notification for CQ%u.\n",
  3353. nescq->hw_cq.cq_number);
  3354. cq_arm = nescq->hw_cq.cq_number;
  3355. if ((notify_flags & IB_CQ_SOLICITED_MASK) == IB_CQ_NEXT_COMP)
  3356. cq_arm |= NES_CQE_ALLOC_NOTIFY_NEXT;
  3357. else if ((notify_flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED)
  3358. cq_arm |= NES_CQE_ALLOC_NOTIFY_SE;
  3359. else
  3360. return -EINVAL;
  3361. nes_write32(nesdev->regs+NES_CQE_ALLOC, cq_arm);
  3362. nes_read32(nesdev->regs+NES_CQE_ALLOC);
  3363. return 0;
  3364. }
  3365. /**
  3366. * nes_init_ofa_device
  3367. */
  3368. struct nes_ib_device *nes_init_ofa_device(struct net_device *netdev)
  3369. {
  3370. struct nes_ib_device *nesibdev;
  3371. struct nes_vnic *nesvnic = netdev_priv(netdev);
  3372. struct nes_device *nesdev = nesvnic->nesdev;
  3373. nesibdev = (struct nes_ib_device *)ib_alloc_device(sizeof(struct nes_ib_device));
  3374. if (nesibdev == NULL) {
  3375. return NULL;
  3376. }
  3377. strlcpy(nesibdev->ibdev.name, "nes%d", IB_DEVICE_NAME_MAX);
  3378. nesibdev->ibdev.owner = THIS_MODULE;
  3379. nesibdev->ibdev.node_type = RDMA_NODE_RNIC;
  3380. memset(&nesibdev->ibdev.node_guid, 0, sizeof(nesibdev->ibdev.node_guid));
  3381. memcpy(&nesibdev->ibdev.node_guid, netdev->dev_addr, 6);
  3382. nesibdev->ibdev.uverbs_cmd_mask =
  3383. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  3384. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  3385. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  3386. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  3387. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  3388. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  3389. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  3390. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  3391. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  3392. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  3393. (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
  3394. (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
  3395. (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
  3396. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  3397. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  3398. (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
  3399. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  3400. (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
  3401. (1ull << IB_USER_VERBS_CMD_BIND_MW) |
  3402. (1ull << IB_USER_VERBS_CMD_DEALLOC_MW) |
  3403. (1ull << IB_USER_VERBS_CMD_POST_RECV) |
  3404. (1ull << IB_USER_VERBS_CMD_POST_SEND);
  3405. nesibdev->ibdev.phys_port_cnt = 1;
  3406. nesibdev->ibdev.num_comp_vectors = 1;
  3407. nesibdev->ibdev.dma_device = &nesdev->pcidev->dev;
  3408. nesibdev->ibdev.dev.parent = &nesdev->pcidev->dev;
  3409. nesibdev->ibdev.query_device = nes_query_device;
  3410. nesibdev->ibdev.query_port = nes_query_port;
  3411. nesibdev->ibdev.query_pkey = nes_query_pkey;
  3412. nesibdev->ibdev.query_gid = nes_query_gid;
  3413. nesibdev->ibdev.alloc_ucontext = nes_alloc_ucontext;
  3414. nesibdev->ibdev.dealloc_ucontext = nes_dealloc_ucontext;
  3415. nesibdev->ibdev.mmap = nes_mmap;
  3416. nesibdev->ibdev.alloc_pd = nes_alloc_pd;
  3417. nesibdev->ibdev.dealloc_pd = nes_dealloc_pd;
  3418. nesibdev->ibdev.create_ah = nes_create_ah;
  3419. nesibdev->ibdev.destroy_ah = nes_destroy_ah;
  3420. nesibdev->ibdev.create_qp = nes_create_qp;
  3421. nesibdev->ibdev.modify_qp = nes_modify_qp;
  3422. nesibdev->ibdev.query_qp = nes_query_qp;
  3423. nesibdev->ibdev.destroy_qp = nes_destroy_qp;
  3424. nesibdev->ibdev.create_cq = nes_create_cq;
  3425. nesibdev->ibdev.destroy_cq = nes_destroy_cq;
  3426. nesibdev->ibdev.poll_cq = nes_poll_cq;
  3427. nesibdev->ibdev.get_dma_mr = nes_get_dma_mr;
  3428. nesibdev->ibdev.reg_phys_mr = nes_reg_phys_mr;
  3429. nesibdev->ibdev.reg_user_mr = nes_reg_user_mr;
  3430. nesibdev->ibdev.dereg_mr = nes_dereg_mr;
  3431. nesibdev->ibdev.alloc_mw = nes_alloc_mw;
  3432. nesibdev->ibdev.dealloc_mw = nes_dealloc_mw;
  3433. nesibdev->ibdev.bind_mw = nes_bind_mw;
  3434. nesibdev->ibdev.alloc_fast_reg_mr = nes_alloc_fast_reg_mr;
  3435. nesibdev->ibdev.alloc_fast_reg_page_list = nes_alloc_fast_reg_page_list;
  3436. nesibdev->ibdev.free_fast_reg_page_list = nes_free_fast_reg_page_list;
  3437. nesibdev->ibdev.attach_mcast = nes_multicast_attach;
  3438. nesibdev->ibdev.detach_mcast = nes_multicast_detach;
  3439. nesibdev->ibdev.process_mad = nes_process_mad;
  3440. nesibdev->ibdev.req_notify_cq = nes_req_notify_cq;
  3441. nesibdev->ibdev.post_send = nes_post_send;
  3442. nesibdev->ibdev.post_recv = nes_post_recv;
  3443. nesibdev->ibdev.iwcm = kzalloc(sizeof(*nesibdev->ibdev.iwcm), GFP_KERNEL);
  3444. if (nesibdev->ibdev.iwcm == NULL) {
  3445. ib_dealloc_device(&nesibdev->ibdev);
  3446. return NULL;
  3447. }
  3448. nesibdev->ibdev.iwcm->add_ref = nes_add_ref;
  3449. nesibdev->ibdev.iwcm->rem_ref = nes_rem_ref;
  3450. nesibdev->ibdev.iwcm->get_qp = nes_get_qp;
  3451. nesibdev->ibdev.iwcm->connect = nes_connect;
  3452. nesibdev->ibdev.iwcm->accept = nes_accept;
  3453. nesibdev->ibdev.iwcm->reject = nes_reject;
  3454. nesibdev->ibdev.iwcm->create_listen = nes_create_listen;
  3455. nesibdev->ibdev.iwcm->destroy_listen = nes_destroy_listen;
  3456. return nesibdev;
  3457. }
  3458. /**
  3459. * nes_handle_delayed_event
  3460. */
  3461. static void nes_handle_delayed_event(unsigned long data)
  3462. {
  3463. struct nes_vnic *nesvnic = (void *) data;
  3464. if (nesvnic->delayed_event != nesvnic->last_dispatched_event) {
  3465. struct ib_event event;
  3466. event.device = &nesvnic->nesibdev->ibdev;
  3467. if (!event.device)
  3468. goto stop_timer;
  3469. event.event = nesvnic->delayed_event;
  3470. event.element.port_num = nesvnic->logical_port + 1;
  3471. ib_dispatch_event(&event);
  3472. }
  3473. stop_timer:
  3474. nesvnic->event_timer.function = NULL;
  3475. }
  3476. void nes_port_ibevent(struct nes_vnic *nesvnic)
  3477. {
  3478. struct nes_ib_device *nesibdev = nesvnic->nesibdev;
  3479. struct nes_device *nesdev = nesvnic->nesdev;
  3480. struct ib_event event;
  3481. event.device = &nesibdev->ibdev;
  3482. event.element.port_num = nesvnic->logical_port + 1;
  3483. event.event = nesdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
  3484. if (!nesvnic->event_timer.function) {
  3485. ib_dispatch_event(&event);
  3486. nesvnic->last_dispatched_event = event.event;
  3487. nesvnic->event_timer.function = nes_handle_delayed_event;
  3488. nesvnic->event_timer.data = (unsigned long) nesvnic;
  3489. nesvnic->event_timer.expires = jiffies + NES_EVENT_DELAY;
  3490. add_timer(&nesvnic->event_timer);
  3491. } else {
  3492. mod_timer(&nesvnic->event_timer, jiffies + NES_EVENT_DELAY);
  3493. }
  3494. nesvnic->delayed_event = event.event;
  3495. }
  3496. /**
  3497. * nes_destroy_ofa_device
  3498. */
  3499. void nes_destroy_ofa_device(struct nes_ib_device *nesibdev)
  3500. {
  3501. if (nesibdev == NULL)
  3502. return;
  3503. nes_unregister_ofa_device(nesibdev);
  3504. kfree(nesibdev->ibdev.iwcm);
  3505. ib_dealloc_device(&nesibdev->ibdev);
  3506. }
  3507. /**
  3508. * nes_register_ofa_device
  3509. */
  3510. int nes_register_ofa_device(struct nes_ib_device *nesibdev)
  3511. {
  3512. struct nes_vnic *nesvnic = nesibdev->nesvnic;
  3513. struct nes_device *nesdev = nesvnic->nesdev;
  3514. struct nes_adapter *nesadapter = nesdev->nesadapter;
  3515. int i, ret;
  3516. ret = ib_register_device(&nesvnic->nesibdev->ibdev, NULL);
  3517. if (ret) {
  3518. return ret;
  3519. }
  3520. /* Get the resources allocated to this device */
  3521. nesibdev->max_cq = (nesadapter->max_cq-NES_FIRST_QPN) / nesadapter->port_count;
  3522. nesibdev->max_mr = nesadapter->max_mr / nesadapter->port_count;
  3523. nesibdev->max_qp = (nesadapter->max_qp-NES_FIRST_QPN) / nesadapter->port_count;
  3524. nesibdev->max_pd = nesadapter->max_pd / nesadapter->port_count;
  3525. for (i = 0; i < ARRAY_SIZE(nes_dev_attributes); ++i) {
  3526. ret = device_create_file(&nesibdev->ibdev.dev, nes_dev_attributes[i]);
  3527. if (ret) {
  3528. while (i > 0) {
  3529. i--;
  3530. device_remove_file(&nesibdev->ibdev.dev,
  3531. nes_dev_attributes[i]);
  3532. }
  3533. ib_unregister_device(&nesibdev->ibdev);
  3534. return ret;
  3535. }
  3536. }
  3537. nesvnic->of_device_registered = 1;
  3538. return 0;
  3539. }
  3540. /**
  3541. * nes_unregister_ofa_device
  3542. */
  3543. static void nes_unregister_ofa_device(struct nes_ib_device *nesibdev)
  3544. {
  3545. struct nes_vnic *nesvnic = nesibdev->nesvnic;
  3546. int i;
  3547. for (i = 0; i < ARRAY_SIZE(nes_dev_attributes); ++i) {
  3548. device_remove_file(&nesibdev->ibdev.dev, nes_dev_attributes[i]);
  3549. }
  3550. if (nesvnic->of_device_registered) {
  3551. ib_unregister_device(&nesibdev->ibdev);
  3552. }
  3553. nesvnic->of_device_registered = 0;
  3554. }