mthca_mr.c 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966
  1. /*
  2. * Copyright (c) 2004 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/slab.h>
  34. #include <linux/errno.h>
  35. #include "mthca_dev.h"
  36. #include "mthca_cmd.h"
  37. #include "mthca_memfree.h"
  38. struct mthca_mtt {
  39. struct mthca_buddy *buddy;
  40. int order;
  41. u32 first_seg;
  42. };
  43. /*
  44. * Must be packed because mtt_seg is 64 bits but only aligned to 32 bits.
  45. */
  46. struct mthca_mpt_entry {
  47. __be32 flags;
  48. __be32 page_size;
  49. __be32 key;
  50. __be32 pd;
  51. __be64 start;
  52. __be64 length;
  53. __be32 lkey;
  54. __be32 window_count;
  55. __be32 window_count_limit;
  56. __be64 mtt_seg;
  57. __be32 mtt_sz; /* Arbel only */
  58. u32 reserved[2];
  59. } __attribute__((packed));
  60. #define MTHCA_MPT_FLAG_SW_OWNS (0xfUL << 28)
  61. #define MTHCA_MPT_FLAG_MIO (1 << 17)
  62. #define MTHCA_MPT_FLAG_BIND_ENABLE (1 << 15)
  63. #define MTHCA_MPT_FLAG_PHYSICAL (1 << 9)
  64. #define MTHCA_MPT_FLAG_REGION (1 << 8)
  65. #define MTHCA_MTT_FLAG_PRESENT 1
  66. #define MTHCA_MPT_STATUS_SW 0xF0
  67. #define MTHCA_MPT_STATUS_HW 0x00
  68. #define SINAI_FMR_KEY_INC 0x1000000
  69. /*
  70. * Buddy allocator for MTT segments (currently not very efficient
  71. * since it doesn't keep a free list and just searches linearly
  72. * through the bitmaps)
  73. */
  74. static u32 mthca_buddy_alloc(struct mthca_buddy *buddy, int order)
  75. {
  76. int o;
  77. int m;
  78. u32 seg;
  79. spin_lock(&buddy->lock);
  80. for (o = order; o <= buddy->max_order; ++o)
  81. if (buddy->num_free[o]) {
  82. m = 1 << (buddy->max_order - o);
  83. seg = find_first_bit(buddy->bits[o], m);
  84. if (seg < m)
  85. goto found;
  86. }
  87. spin_unlock(&buddy->lock);
  88. return -1;
  89. found:
  90. clear_bit(seg, buddy->bits[o]);
  91. --buddy->num_free[o];
  92. while (o > order) {
  93. --o;
  94. seg <<= 1;
  95. set_bit(seg ^ 1, buddy->bits[o]);
  96. ++buddy->num_free[o];
  97. }
  98. spin_unlock(&buddy->lock);
  99. seg <<= order;
  100. return seg;
  101. }
  102. static void mthca_buddy_free(struct mthca_buddy *buddy, u32 seg, int order)
  103. {
  104. seg >>= order;
  105. spin_lock(&buddy->lock);
  106. while (test_bit(seg ^ 1, buddy->bits[order])) {
  107. clear_bit(seg ^ 1, buddy->bits[order]);
  108. --buddy->num_free[order];
  109. seg >>= 1;
  110. ++order;
  111. }
  112. set_bit(seg, buddy->bits[order]);
  113. ++buddy->num_free[order];
  114. spin_unlock(&buddy->lock);
  115. }
  116. static int mthca_buddy_init(struct mthca_buddy *buddy, int max_order)
  117. {
  118. int i, s;
  119. buddy->max_order = max_order;
  120. spin_lock_init(&buddy->lock);
  121. buddy->bits = kzalloc((buddy->max_order + 1) * sizeof (long *),
  122. GFP_KERNEL);
  123. buddy->num_free = kcalloc((buddy->max_order + 1), sizeof *buddy->num_free,
  124. GFP_KERNEL);
  125. if (!buddy->bits || !buddy->num_free)
  126. goto err_out;
  127. for (i = 0; i <= buddy->max_order; ++i) {
  128. s = BITS_TO_LONGS(1 << (buddy->max_order - i));
  129. buddy->bits[i] = kmalloc(s * sizeof (long), GFP_KERNEL);
  130. if (!buddy->bits[i])
  131. goto err_out_free;
  132. bitmap_zero(buddy->bits[i],
  133. 1 << (buddy->max_order - i));
  134. }
  135. set_bit(0, buddy->bits[buddy->max_order]);
  136. buddy->num_free[buddy->max_order] = 1;
  137. return 0;
  138. err_out_free:
  139. for (i = 0; i <= buddy->max_order; ++i)
  140. kfree(buddy->bits[i]);
  141. err_out:
  142. kfree(buddy->bits);
  143. kfree(buddy->num_free);
  144. return -ENOMEM;
  145. }
  146. static void mthca_buddy_cleanup(struct mthca_buddy *buddy)
  147. {
  148. int i;
  149. for (i = 0; i <= buddy->max_order; ++i)
  150. kfree(buddy->bits[i]);
  151. kfree(buddy->bits);
  152. kfree(buddy->num_free);
  153. }
  154. static u32 mthca_alloc_mtt_range(struct mthca_dev *dev, int order,
  155. struct mthca_buddy *buddy)
  156. {
  157. u32 seg = mthca_buddy_alloc(buddy, order);
  158. if (seg == -1)
  159. return -1;
  160. if (mthca_is_memfree(dev))
  161. if (mthca_table_get_range(dev, dev->mr_table.mtt_table, seg,
  162. seg + (1 << order) - 1)) {
  163. mthca_buddy_free(buddy, seg, order);
  164. seg = -1;
  165. }
  166. return seg;
  167. }
  168. static struct mthca_mtt *__mthca_alloc_mtt(struct mthca_dev *dev, int size,
  169. struct mthca_buddy *buddy)
  170. {
  171. struct mthca_mtt *mtt;
  172. int i;
  173. if (size <= 0)
  174. return ERR_PTR(-EINVAL);
  175. mtt = kmalloc(sizeof *mtt, GFP_KERNEL);
  176. if (!mtt)
  177. return ERR_PTR(-ENOMEM);
  178. mtt->buddy = buddy;
  179. mtt->order = 0;
  180. for (i = dev->limits.mtt_seg_size / 8; i < size; i <<= 1)
  181. ++mtt->order;
  182. mtt->first_seg = mthca_alloc_mtt_range(dev, mtt->order, buddy);
  183. if (mtt->first_seg == -1) {
  184. kfree(mtt);
  185. return ERR_PTR(-ENOMEM);
  186. }
  187. return mtt;
  188. }
  189. struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size)
  190. {
  191. return __mthca_alloc_mtt(dev, size, &dev->mr_table.mtt_buddy);
  192. }
  193. void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt)
  194. {
  195. if (!mtt)
  196. return;
  197. mthca_buddy_free(mtt->buddy, mtt->first_seg, mtt->order);
  198. mthca_table_put_range(dev, dev->mr_table.mtt_table,
  199. mtt->first_seg,
  200. mtt->first_seg + (1 << mtt->order) - 1);
  201. kfree(mtt);
  202. }
  203. static int __mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
  204. int start_index, u64 *buffer_list, int list_len)
  205. {
  206. struct mthca_mailbox *mailbox;
  207. __be64 *mtt_entry;
  208. int err = 0;
  209. int i;
  210. mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
  211. if (IS_ERR(mailbox))
  212. return PTR_ERR(mailbox);
  213. mtt_entry = mailbox->buf;
  214. while (list_len > 0) {
  215. mtt_entry[0] = cpu_to_be64(dev->mr_table.mtt_base +
  216. mtt->first_seg * dev->limits.mtt_seg_size +
  217. start_index * 8);
  218. mtt_entry[1] = 0;
  219. for (i = 0; i < list_len && i < MTHCA_MAILBOX_SIZE / 8 - 2; ++i)
  220. mtt_entry[i + 2] = cpu_to_be64(buffer_list[i] |
  221. MTHCA_MTT_FLAG_PRESENT);
  222. /*
  223. * If we have an odd number of entries to write, add
  224. * one more dummy entry for firmware efficiency.
  225. */
  226. if (i & 1)
  227. mtt_entry[i + 2] = 0;
  228. err = mthca_WRITE_MTT(dev, mailbox, (i + 1) & ~1);
  229. if (err) {
  230. mthca_warn(dev, "WRITE_MTT failed (%d)\n", err);
  231. goto out;
  232. }
  233. list_len -= i;
  234. start_index += i;
  235. buffer_list += i;
  236. }
  237. out:
  238. mthca_free_mailbox(dev, mailbox);
  239. return err;
  240. }
  241. int mthca_write_mtt_size(struct mthca_dev *dev)
  242. {
  243. if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy ||
  244. !(dev->mthca_flags & MTHCA_FLAG_FMR))
  245. /*
  246. * Be friendly to WRITE_MTT command
  247. * and leave two empty slots for the
  248. * index and reserved fields of the
  249. * mailbox.
  250. */
  251. return PAGE_SIZE / sizeof (u64) - 2;
  252. /* For Arbel, all MTTs must fit in the same page. */
  253. return mthca_is_memfree(dev) ? (PAGE_SIZE / sizeof (u64)) : 0x7ffffff;
  254. }
  255. static void mthca_tavor_write_mtt_seg(struct mthca_dev *dev,
  256. struct mthca_mtt *mtt, int start_index,
  257. u64 *buffer_list, int list_len)
  258. {
  259. u64 __iomem *mtts;
  260. int i;
  261. mtts = dev->mr_table.tavor_fmr.mtt_base + mtt->first_seg * dev->limits.mtt_seg_size +
  262. start_index * sizeof (u64);
  263. for (i = 0; i < list_len; ++i)
  264. mthca_write64_raw(cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT),
  265. mtts + i);
  266. }
  267. static void mthca_arbel_write_mtt_seg(struct mthca_dev *dev,
  268. struct mthca_mtt *mtt, int start_index,
  269. u64 *buffer_list, int list_len)
  270. {
  271. __be64 *mtts;
  272. dma_addr_t dma_handle;
  273. int i;
  274. int s = start_index * sizeof (u64);
  275. /* For Arbel, all MTTs must fit in the same page. */
  276. BUG_ON(s / PAGE_SIZE != (s + list_len * sizeof(u64) - 1) / PAGE_SIZE);
  277. /* Require full segments */
  278. BUG_ON(s % dev->limits.mtt_seg_size);
  279. mtts = mthca_table_find(dev->mr_table.mtt_table, mtt->first_seg +
  280. s / dev->limits.mtt_seg_size, &dma_handle);
  281. BUG_ON(!mtts);
  282. dma_sync_single_for_cpu(&dev->pdev->dev, dma_handle,
  283. list_len * sizeof (u64), DMA_TO_DEVICE);
  284. for (i = 0; i < list_len; ++i)
  285. mtts[i] = cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT);
  286. dma_sync_single_for_device(&dev->pdev->dev, dma_handle,
  287. list_len * sizeof (u64), DMA_TO_DEVICE);
  288. }
  289. int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
  290. int start_index, u64 *buffer_list, int list_len)
  291. {
  292. int size = mthca_write_mtt_size(dev);
  293. int chunk;
  294. if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy ||
  295. !(dev->mthca_flags & MTHCA_FLAG_FMR))
  296. return __mthca_write_mtt(dev, mtt, start_index, buffer_list, list_len);
  297. while (list_len > 0) {
  298. chunk = min(size, list_len);
  299. if (mthca_is_memfree(dev))
  300. mthca_arbel_write_mtt_seg(dev, mtt, start_index,
  301. buffer_list, chunk);
  302. else
  303. mthca_tavor_write_mtt_seg(dev, mtt, start_index,
  304. buffer_list, chunk);
  305. list_len -= chunk;
  306. start_index += chunk;
  307. buffer_list += chunk;
  308. }
  309. return 0;
  310. }
  311. static inline u32 tavor_hw_index_to_key(u32 ind)
  312. {
  313. return ind;
  314. }
  315. static inline u32 tavor_key_to_hw_index(u32 key)
  316. {
  317. return key;
  318. }
  319. static inline u32 arbel_hw_index_to_key(u32 ind)
  320. {
  321. return (ind >> 24) | (ind << 8);
  322. }
  323. static inline u32 arbel_key_to_hw_index(u32 key)
  324. {
  325. return (key << 24) | (key >> 8);
  326. }
  327. static inline u32 hw_index_to_key(struct mthca_dev *dev, u32 ind)
  328. {
  329. if (mthca_is_memfree(dev))
  330. return arbel_hw_index_to_key(ind);
  331. else
  332. return tavor_hw_index_to_key(ind);
  333. }
  334. static inline u32 key_to_hw_index(struct mthca_dev *dev, u32 key)
  335. {
  336. if (mthca_is_memfree(dev))
  337. return arbel_key_to_hw_index(key);
  338. else
  339. return tavor_key_to_hw_index(key);
  340. }
  341. static inline u32 adjust_key(struct mthca_dev *dev, u32 key)
  342. {
  343. if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  344. return ((key << 20) & 0x800000) | (key & 0x7fffff);
  345. else
  346. return key;
  347. }
  348. int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
  349. u64 iova, u64 total_size, u32 access, struct mthca_mr *mr)
  350. {
  351. struct mthca_mailbox *mailbox;
  352. struct mthca_mpt_entry *mpt_entry;
  353. u32 key;
  354. int i;
  355. int err;
  356. WARN_ON(buffer_size_shift >= 32);
  357. key = mthca_alloc(&dev->mr_table.mpt_alloc);
  358. if (key == -1)
  359. return -ENOMEM;
  360. key = adjust_key(dev, key);
  361. mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key);
  362. if (mthca_is_memfree(dev)) {
  363. err = mthca_table_get(dev, dev->mr_table.mpt_table, key);
  364. if (err)
  365. goto err_out_mpt_free;
  366. }
  367. mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
  368. if (IS_ERR(mailbox)) {
  369. err = PTR_ERR(mailbox);
  370. goto err_out_table;
  371. }
  372. mpt_entry = mailbox->buf;
  373. mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS |
  374. MTHCA_MPT_FLAG_MIO |
  375. MTHCA_MPT_FLAG_REGION |
  376. access);
  377. if (!mr->mtt)
  378. mpt_entry->flags |= cpu_to_be32(MTHCA_MPT_FLAG_PHYSICAL);
  379. mpt_entry->page_size = cpu_to_be32(buffer_size_shift - 12);
  380. mpt_entry->key = cpu_to_be32(key);
  381. mpt_entry->pd = cpu_to_be32(pd);
  382. mpt_entry->start = cpu_to_be64(iova);
  383. mpt_entry->length = cpu_to_be64(total_size);
  384. memset(&mpt_entry->lkey, 0,
  385. sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, lkey));
  386. if (mr->mtt)
  387. mpt_entry->mtt_seg =
  388. cpu_to_be64(dev->mr_table.mtt_base +
  389. mr->mtt->first_seg * dev->limits.mtt_seg_size);
  390. if (0) {
  391. mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey);
  392. for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) {
  393. if (i % 4 == 0)
  394. printk("[%02x] ", i * 4);
  395. printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i]));
  396. if ((i + 1) % 4 == 0)
  397. printk("\n");
  398. }
  399. }
  400. err = mthca_SW2HW_MPT(dev, mailbox,
  401. key & (dev->limits.num_mpts - 1));
  402. if (err) {
  403. mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err);
  404. goto err_out_mailbox;
  405. }
  406. mthca_free_mailbox(dev, mailbox);
  407. return err;
  408. err_out_mailbox:
  409. mthca_free_mailbox(dev, mailbox);
  410. err_out_table:
  411. mthca_table_put(dev, dev->mr_table.mpt_table, key);
  412. err_out_mpt_free:
  413. mthca_free(&dev->mr_table.mpt_alloc, key);
  414. return err;
  415. }
  416. int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
  417. u32 access, struct mthca_mr *mr)
  418. {
  419. mr->mtt = NULL;
  420. return mthca_mr_alloc(dev, pd, 12, 0, ~0ULL, access, mr);
  421. }
  422. int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
  423. u64 *buffer_list, int buffer_size_shift,
  424. int list_len, u64 iova, u64 total_size,
  425. u32 access, struct mthca_mr *mr)
  426. {
  427. int err;
  428. mr->mtt = mthca_alloc_mtt(dev, list_len);
  429. if (IS_ERR(mr->mtt))
  430. return PTR_ERR(mr->mtt);
  431. err = mthca_write_mtt(dev, mr->mtt, 0, buffer_list, list_len);
  432. if (err) {
  433. mthca_free_mtt(dev, mr->mtt);
  434. return err;
  435. }
  436. err = mthca_mr_alloc(dev, pd, buffer_size_shift, iova,
  437. total_size, access, mr);
  438. if (err)
  439. mthca_free_mtt(dev, mr->mtt);
  440. return err;
  441. }
  442. /* Free mr or fmr */
  443. static void mthca_free_region(struct mthca_dev *dev, u32 lkey)
  444. {
  445. mthca_table_put(dev, dev->mr_table.mpt_table,
  446. key_to_hw_index(dev, lkey));
  447. mthca_free(&dev->mr_table.mpt_alloc, key_to_hw_index(dev, lkey));
  448. }
  449. void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr)
  450. {
  451. int err;
  452. err = mthca_HW2SW_MPT(dev, NULL,
  453. key_to_hw_index(dev, mr->ibmr.lkey) &
  454. (dev->limits.num_mpts - 1));
  455. if (err)
  456. mthca_warn(dev, "HW2SW_MPT failed (%d)\n", err);
  457. mthca_free_region(dev, mr->ibmr.lkey);
  458. mthca_free_mtt(dev, mr->mtt);
  459. }
  460. int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
  461. u32 access, struct mthca_fmr *mr)
  462. {
  463. struct mthca_mpt_entry *mpt_entry;
  464. struct mthca_mailbox *mailbox;
  465. u64 mtt_seg;
  466. u32 key, idx;
  467. int list_len = mr->attr.max_pages;
  468. int err = -ENOMEM;
  469. int i;
  470. if (mr->attr.page_shift < 12 || mr->attr.page_shift >= 32)
  471. return -EINVAL;
  472. /* For Arbel, all MTTs must fit in the same page. */
  473. if (mthca_is_memfree(dev) &&
  474. mr->attr.max_pages * sizeof *mr->mem.arbel.mtts > PAGE_SIZE)
  475. return -EINVAL;
  476. mr->maps = 0;
  477. key = mthca_alloc(&dev->mr_table.mpt_alloc);
  478. if (key == -1)
  479. return -ENOMEM;
  480. key = adjust_key(dev, key);
  481. idx = key & (dev->limits.num_mpts - 1);
  482. mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key);
  483. if (mthca_is_memfree(dev)) {
  484. err = mthca_table_get(dev, dev->mr_table.mpt_table, key);
  485. if (err)
  486. goto err_out_mpt_free;
  487. mr->mem.arbel.mpt = mthca_table_find(dev->mr_table.mpt_table, key, NULL);
  488. BUG_ON(!mr->mem.arbel.mpt);
  489. } else
  490. mr->mem.tavor.mpt = dev->mr_table.tavor_fmr.mpt_base +
  491. sizeof *(mr->mem.tavor.mpt) * idx;
  492. mr->mtt = __mthca_alloc_mtt(dev, list_len, dev->mr_table.fmr_mtt_buddy);
  493. if (IS_ERR(mr->mtt)) {
  494. err = PTR_ERR(mr->mtt);
  495. goto err_out_table;
  496. }
  497. mtt_seg = mr->mtt->first_seg * dev->limits.mtt_seg_size;
  498. if (mthca_is_memfree(dev)) {
  499. mr->mem.arbel.mtts = mthca_table_find(dev->mr_table.mtt_table,
  500. mr->mtt->first_seg,
  501. &mr->mem.arbel.dma_handle);
  502. BUG_ON(!mr->mem.arbel.mtts);
  503. } else
  504. mr->mem.tavor.mtts = dev->mr_table.tavor_fmr.mtt_base + mtt_seg;
  505. mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
  506. if (IS_ERR(mailbox)) {
  507. err = PTR_ERR(mailbox);
  508. goto err_out_free_mtt;
  509. }
  510. mpt_entry = mailbox->buf;
  511. mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS |
  512. MTHCA_MPT_FLAG_MIO |
  513. MTHCA_MPT_FLAG_REGION |
  514. access);
  515. mpt_entry->page_size = cpu_to_be32(mr->attr.page_shift - 12);
  516. mpt_entry->key = cpu_to_be32(key);
  517. mpt_entry->pd = cpu_to_be32(pd);
  518. memset(&mpt_entry->start, 0,
  519. sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, start));
  520. mpt_entry->mtt_seg = cpu_to_be64(dev->mr_table.mtt_base + mtt_seg);
  521. if (0) {
  522. mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey);
  523. for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) {
  524. if (i % 4 == 0)
  525. printk("[%02x] ", i * 4);
  526. printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i]));
  527. if ((i + 1) % 4 == 0)
  528. printk("\n");
  529. }
  530. }
  531. err = mthca_SW2HW_MPT(dev, mailbox,
  532. key & (dev->limits.num_mpts - 1));
  533. if (err) {
  534. mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err);
  535. goto err_out_mailbox_free;
  536. }
  537. mthca_free_mailbox(dev, mailbox);
  538. return 0;
  539. err_out_mailbox_free:
  540. mthca_free_mailbox(dev, mailbox);
  541. err_out_free_mtt:
  542. mthca_free_mtt(dev, mr->mtt);
  543. err_out_table:
  544. mthca_table_put(dev, dev->mr_table.mpt_table, key);
  545. err_out_mpt_free:
  546. mthca_free(&dev->mr_table.mpt_alloc, key);
  547. return err;
  548. }
  549. int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr)
  550. {
  551. if (fmr->maps)
  552. return -EBUSY;
  553. mthca_free_region(dev, fmr->ibmr.lkey);
  554. mthca_free_mtt(dev, fmr->mtt);
  555. return 0;
  556. }
  557. static inline int mthca_check_fmr(struct mthca_fmr *fmr, u64 *page_list,
  558. int list_len, u64 iova)
  559. {
  560. int i, page_mask;
  561. if (list_len > fmr->attr.max_pages)
  562. return -EINVAL;
  563. page_mask = (1 << fmr->attr.page_shift) - 1;
  564. /* We are getting page lists, so va must be page aligned. */
  565. if (iova & page_mask)
  566. return -EINVAL;
  567. /* Trust the user not to pass misaligned data in page_list */
  568. if (0)
  569. for (i = 0; i < list_len; ++i) {
  570. if (page_list[i] & ~page_mask)
  571. return -EINVAL;
  572. }
  573. if (fmr->maps >= fmr->attr.max_maps)
  574. return -EINVAL;
  575. return 0;
  576. }
  577. int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
  578. int list_len, u64 iova)
  579. {
  580. struct mthca_fmr *fmr = to_mfmr(ibfmr);
  581. struct mthca_dev *dev = to_mdev(ibfmr->device);
  582. struct mthca_mpt_entry mpt_entry;
  583. u32 key;
  584. int i, err;
  585. err = mthca_check_fmr(fmr, page_list, list_len, iova);
  586. if (err)
  587. return err;
  588. ++fmr->maps;
  589. key = tavor_key_to_hw_index(fmr->ibmr.lkey);
  590. key += dev->limits.num_mpts;
  591. fmr->ibmr.lkey = fmr->ibmr.rkey = tavor_hw_index_to_key(key);
  592. writeb(MTHCA_MPT_STATUS_SW, fmr->mem.tavor.mpt);
  593. for (i = 0; i < list_len; ++i) {
  594. __be64 mtt_entry = cpu_to_be64(page_list[i] |
  595. MTHCA_MTT_FLAG_PRESENT);
  596. mthca_write64_raw(mtt_entry, fmr->mem.tavor.mtts + i);
  597. }
  598. mpt_entry.lkey = cpu_to_be32(key);
  599. mpt_entry.length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift));
  600. mpt_entry.start = cpu_to_be64(iova);
  601. __raw_writel((__force u32) mpt_entry.lkey, &fmr->mem.tavor.mpt->key);
  602. memcpy_toio(&fmr->mem.tavor.mpt->start, &mpt_entry.start,
  603. offsetof(struct mthca_mpt_entry, window_count) -
  604. offsetof(struct mthca_mpt_entry, start));
  605. writeb(MTHCA_MPT_STATUS_HW, fmr->mem.tavor.mpt);
  606. return 0;
  607. }
  608. int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
  609. int list_len, u64 iova)
  610. {
  611. struct mthca_fmr *fmr = to_mfmr(ibfmr);
  612. struct mthca_dev *dev = to_mdev(ibfmr->device);
  613. u32 key;
  614. int i, err;
  615. err = mthca_check_fmr(fmr, page_list, list_len, iova);
  616. if (err)
  617. return err;
  618. ++fmr->maps;
  619. key = arbel_key_to_hw_index(fmr->ibmr.lkey);
  620. if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  621. key += SINAI_FMR_KEY_INC;
  622. else
  623. key += dev->limits.num_mpts;
  624. fmr->ibmr.lkey = fmr->ibmr.rkey = arbel_hw_index_to_key(key);
  625. *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_SW;
  626. wmb();
  627. dma_sync_single_for_cpu(&dev->pdev->dev, fmr->mem.arbel.dma_handle,
  628. list_len * sizeof(u64), DMA_TO_DEVICE);
  629. for (i = 0; i < list_len; ++i)
  630. fmr->mem.arbel.mtts[i] = cpu_to_be64(page_list[i] |
  631. MTHCA_MTT_FLAG_PRESENT);
  632. dma_sync_single_for_device(&dev->pdev->dev, fmr->mem.arbel.dma_handle,
  633. list_len * sizeof(u64), DMA_TO_DEVICE);
  634. fmr->mem.arbel.mpt->key = cpu_to_be32(key);
  635. fmr->mem.arbel.mpt->lkey = cpu_to_be32(key);
  636. fmr->mem.arbel.mpt->length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift));
  637. fmr->mem.arbel.mpt->start = cpu_to_be64(iova);
  638. wmb();
  639. *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_HW;
  640. wmb();
  641. return 0;
  642. }
  643. void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr)
  644. {
  645. if (!fmr->maps)
  646. return;
  647. fmr->maps = 0;
  648. writeb(MTHCA_MPT_STATUS_SW, fmr->mem.tavor.mpt);
  649. }
  650. void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr)
  651. {
  652. if (!fmr->maps)
  653. return;
  654. fmr->maps = 0;
  655. *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_SW;
  656. }
  657. int mthca_init_mr_table(struct mthca_dev *dev)
  658. {
  659. phys_addr_t addr;
  660. int mpts, mtts, err, i;
  661. err = mthca_alloc_init(&dev->mr_table.mpt_alloc,
  662. dev->limits.num_mpts,
  663. ~0, dev->limits.reserved_mrws);
  664. if (err)
  665. return err;
  666. if (!mthca_is_memfree(dev) &&
  667. (dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN))
  668. dev->limits.fmr_reserved_mtts = 0;
  669. else
  670. dev->mthca_flags |= MTHCA_FLAG_FMR;
  671. if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
  672. mthca_dbg(dev, "Memory key throughput optimization activated.\n");
  673. err = mthca_buddy_init(&dev->mr_table.mtt_buddy,
  674. fls(dev->limits.num_mtt_segs - 1));
  675. if (err)
  676. goto err_mtt_buddy;
  677. dev->mr_table.tavor_fmr.mpt_base = NULL;
  678. dev->mr_table.tavor_fmr.mtt_base = NULL;
  679. if (dev->limits.fmr_reserved_mtts) {
  680. i = fls(dev->limits.fmr_reserved_mtts - 1);
  681. if (i >= 31) {
  682. mthca_warn(dev, "Unable to reserve 2^31 FMR MTTs.\n");
  683. err = -EINVAL;
  684. goto err_fmr_mpt;
  685. }
  686. mpts = mtts = 1 << i;
  687. } else {
  688. mtts = dev->limits.num_mtt_segs;
  689. mpts = dev->limits.num_mpts;
  690. }
  691. if (!mthca_is_memfree(dev) &&
  692. (dev->mthca_flags & MTHCA_FLAG_FMR)) {
  693. addr = pci_resource_start(dev->pdev, 4) +
  694. ((pci_resource_len(dev->pdev, 4) - 1) &
  695. dev->mr_table.mpt_base);
  696. dev->mr_table.tavor_fmr.mpt_base =
  697. ioremap(addr, mpts * sizeof(struct mthca_mpt_entry));
  698. if (!dev->mr_table.tavor_fmr.mpt_base) {
  699. mthca_warn(dev, "MPT ioremap for FMR failed.\n");
  700. err = -ENOMEM;
  701. goto err_fmr_mpt;
  702. }
  703. addr = pci_resource_start(dev->pdev, 4) +
  704. ((pci_resource_len(dev->pdev, 4) - 1) &
  705. dev->mr_table.mtt_base);
  706. dev->mr_table.tavor_fmr.mtt_base =
  707. ioremap(addr, mtts * dev->limits.mtt_seg_size);
  708. if (!dev->mr_table.tavor_fmr.mtt_base) {
  709. mthca_warn(dev, "MTT ioremap for FMR failed.\n");
  710. err = -ENOMEM;
  711. goto err_fmr_mtt;
  712. }
  713. }
  714. if (dev->limits.fmr_reserved_mtts) {
  715. err = mthca_buddy_init(&dev->mr_table.tavor_fmr.mtt_buddy, fls(mtts - 1));
  716. if (err)
  717. goto err_fmr_mtt_buddy;
  718. /* Prevent regular MRs from using FMR keys */
  719. err = mthca_buddy_alloc(&dev->mr_table.mtt_buddy, fls(mtts - 1));
  720. if (err)
  721. goto err_reserve_fmr;
  722. dev->mr_table.fmr_mtt_buddy =
  723. &dev->mr_table.tavor_fmr.mtt_buddy;
  724. } else
  725. dev->mr_table.fmr_mtt_buddy = &dev->mr_table.mtt_buddy;
  726. /* FMR table is always the first, take reserved MTTs out of there */
  727. if (dev->limits.reserved_mtts) {
  728. i = fls(dev->limits.reserved_mtts - 1);
  729. if (mthca_alloc_mtt_range(dev, i,
  730. dev->mr_table.fmr_mtt_buddy) == -1) {
  731. mthca_warn(dev, "MTT table of order %d is too small.\n",
  732. dev->mr_table.fmr_mtt_buddy->max_order);
  733. err = -ENOMEM;
  734. goto err_reserve_mtts;
  735. }
  736. }
  737. return 0;
  738. err_reserve_mtts:
  739. err_reserve_fmr:
  740. if (dev->limits.fmr_reserved_mtts)
  741. mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy);
  742. err_fmr_mtt_buddy:
  743. if (dev->mr_table.tavor_fmr.mtt_base)
  744. iounmap(dev->mr_table.tavor_fmr.mtt_base);
  745. err_fmr_mtt:
  746. if (dev->mr_table.tavor_fmr.mpt_base)
  747. iounmap(dev->mr_table.tavor_fmr.mpt_base);
  748. err_fmr_mpt:
  749. mthca_buddy_cleanup(&dev->mr_table.mtt_buddy);
  750. err_mtt_buddy:
  751. mthca_alloc_cleanup(&dev->mr_table.mpt_alloc);
  752. return err;
  753. }
  754. void mthca_cleanup_mr_table(struct mthca_dev *dev)
  755. {
  756. /* XXX check if any MRs are still allocated? */
  757. if (dev->limits.fmr_reserved_mtts)
  758. mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy);
  759. mthca_buddy_cleanup(&dev->mr_table.mtt_buddy);
  760. if (dev->mr_table.tavor_fmr.mtt_base)
  761. iounmap(dev->mr_table.tavor_fmr.mtt_base);
  762. if (dev->mr_table.tavor_fmr.mpt_base)
  763. iounmap(dev->mr_table.tavor_fmr.mpt_base);
  764. mthca_alloc_cleanup(&dev->mr_table.mpt_alloc);
  765. }