mthca_catas.c 5.2 KB

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  1. /*
  2. * Copyright (c) 2005 Cisco Systems. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/jiffies.h>
  33. #include <linux/module.h>
  34. #include <linux/timer.h>
  35. #include <linux/workqueue.h>
  36. #include "mthca_dev.h"
  37. enum {
  38. MTHCA_CATAS_POLL_INTERVAL = 5 * HZ,
  39. MTHCA_CATAS_TYPE_INTERNAL = 0,
  40. MTHCA_CATAS_TYPE_UPLINK = 3,
  41. MTHCA_CATAS_TYPE_DDR = 4,
  42. MTHCA_CATAS_TYPE_PARITY = 5,
  43. };
  44. static DEFINE_SPINLOCK(catas_lock);
  45. static LIST_HEAD(catas_list);
  46. static struct workqueue_struct *catas_wq;
  47. static struct work_struct catas_work;
  48. static int catas_reset_disable;
  49. module_param_named(catas_reset_disable, catas_reset_disable, int, 0644);
  50. MODULE_PARM_DESC(catas_reset_disable, "disable reset on catastrophic event if nonzero");
  51. static void catas_reset(struct work_struct *work)
  52. {
  53. struct mthca_dev *dev, *tmpdev;
  54. LIST_HEAD(tlist);
  55. int ret;
  56. mutex_lock(&mthca_device_mutex);
  57. spin_lock_irq(&catas_lock);
  58. list_splice_init(&catas_list, &tlist);
  59. spin_unlock_irq(&catas_lock);
  60. list_for_each_entry_safe(dev, tmpdev, &tlist, catas_err.list) {
  61. struct pci_dev *pdev = dev->pdev;
  62. ret = __mthca_restart_one(dev->pdev);
  63. /* 'dev' now is not valid */
  64. if (ret)
  65. printk(KERN_ERR "mthca %s: Reset failed (%d)\n",
  66. pci_name(pdev), ret);
  67. else {
  68. struct mthca_dev *d = pci_get_drvdata(pdev);
  69. mthca_dbg(d, "Reset succeeded\n");
  70. }
  71. }
  72. mutex_unlock(&mthca_device_mutex);
  73. }
  74. static void handle_catas(struct mthca_dev *dev)
  75. {
  76. struct ib_event event;
  77. unsigned long flags;
  78. const char *type;
  79. int i;
  80. event.device = &dev->ib_dev;
  81. event.event = IB_EVENT_DEVICE_FATAL;
  82. event.element.port_num = 0;
  83. dev->active = false;
  84. ib_dispatch_event(&event);
  85. switch (swab32(readl(dev->catas_err.map)) >> 24) {
  86. case MTHCA_CATAS_TYPE_INTERNAL:
  87. type = "internal error";
  88. break;
  89. case MTHCA_CATAS_TYPE_UPLINK:
  90. type = "uplink bus error";
  91. break;
  92. case MTHCA_CATAS_TYPE_DDR:
  93. type = "DDR data error";
  94. break;
  95. case MTHCA_CATAS_TYPE_PARITY:
  96. type = "internal parity error";
  97. break;
  98. default:
  99. type = "unknown error";
  100. break;
  101. }
  102. mthca_err(dev, "Catastrophic error detected: %s\n", type);
  103. for (i = 0; i < dev->catas_err.size; ++i)
  104. mthca_err(dev, " buf[%02x]: %08x\n",
  105. i, swab32(readl(dev->catas_err.map + i)));
  106. if (catas_reset_disable)
  107. return;
  108. spin_lock_irqsave(&catas_lock, flags);
  109. list_add(&dev->catas_err.list, &catas_list);
  110. queue_work(catas_wq, &catas_work);
  111. spin_unlock_irqrestore(&catas_lock, flags);
  112. }
  113. static void poll_catas(unsigned long dev_ptr)
  114. {
  115. struct mthca_dev *dev = (struct mthca_dev *) dev_ptr;
  116. int i;
  117. for (i = 0; i < dev->catas_err.size; ++i)
  118. if (readl(dev->catas_err.map + i)) {
  119. handle_catas(dev);
  120. return;
  121. }
  122. mod_timer(&dev->catas_err.timer,
  123. round_jiffies(jiffies + MTHCA_CATAS_POLL_INTERVAL));
  124. }
  125. void mthca_start_catas_poll(struct mthca_dev *dev)
  126. {
  127. phys_addr_t addr;
  128. init_timer(&dev->catas_err.timer);
  129. dev->catas_err.map = NULL;
  130. addr = pci_resource_start(dev->pdev, 0) +
  131. ((pci_resource_len(dev->pdev, 0) - 1) &
  132. dev->catas_err.addr);
  133. dev->catas_err.map = ioremap(addr, dev->catas_err.size * 4);
  134. if (!dev->catas_err.map) {
  135. mthca_warn(dev, "couldn't map catastrophic error region "
  136. "at 0x%llx/0x%x\n", (unsigned long long) addr,
  137. dev->catas_err.size * 4);
  138. return;
  139. }
  140. dev->catas_err.timer.data = (unsigned long) dev;
  141. dev->catas_err.timer.function = poll_catas;
  142. dev->catas_err.timer.expires = jiffies + MTHCA_CATAS_POLL_INTERVAL;
  143. INIT_LIST_HEAD(&dev->catas_err.list);
  144. add_timer(&dev->catas_err.timer);
  145. }
  146. void mthca_stop_catas_poll(struct mthca_dev *dev)
  147. {
  148. del_timer_sync(&dev->catas_err.timer);
  149. if (dev->catas_err.map)
  150. iounmap(dev->catas_err.map);
  151. spin_lock_irq(&catas_lock);
  152. list_del(&dev->catas_err.list);
  153. spin_unlock_irq(&catas_lock);
  154. }
  155. int __init mthca_catas_init(void)
  156. {
  157. INIT_WORK(&catas_work, catas_reset);
  158. catas_wq = create_singlethread_workqueue("mthca_catas");
  159. if (!catas_wq)
  160. return -ENOMEM;
  161. return 0;
  162. }
  163. void mthca_catas_cleanup(void)
  164. {
  165. destroy_workqueue(catas_wq);
  166. }