mad.c 12 KB

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  1. /*
  2. * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <rdma/ib_mad.h>
  33. #include <rdma/ib_smi.h>
  34. #include <linux/mlx4/cmd.h>
  35. #include <linux/gfp.h>
  36. #include <rdma/ib_pma.h>
  37. #include "mlx4_ib.h"
  38. enum {
  39. MLX4_IB_VENDOR_CLASS1 = 0x9,
  40. MLX4_IB_VENDOR_CLASS2 = 0xa
  41. };
  42. /* Counters should be saturate once they reach their maximum value */
  43. #define ASSIGN_32BIT_COUNTER(counter, value) do {\
  44. if ((value) > (u32)~0U) \
  45. counter = cpu_to_be32((u32)~0U); \
  46. else \
  47. counter = cpu_to_be32(value); \
  48. } while (0)
  49. int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int ignore_mkey, int ignore_bkey,
  50. int port, struct ib_wc *in_wc, struct ib_grh *in_grh,
  51. void *in_mad, void *response_mad)
  52. {
  53. struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
  54. void *inbox;
  55. int err;
  56. u32 in_modifier = port;
  57. u8 op_modifier = 0;
  58. inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
  59. if (IS_ERR(inmailbox))
  60. return PTR_ERR(inmailbox);
  61. inbox = inmailbox->buf;
  62. outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
  63. if (IS_ERR(outmailbox)) {
  64. mlx4_free_cmd_mailbox(dev->dev, inmailbox);
  65. return PTR_ERR(outmailbox);
  66. }
  67. memcpy(inbox, in_mad, 256);
  68. /*
  69. * Key check traps can't be generated unless we have in_wc to
  70. * tell us where to send the trap.
  71. */
  72. if (ignore_mkey || !in_wc)
  73. op_modifier |= 0x1;
  74. if (ignore_bkey || !in_wc)
  75. op_modifier |= 0x2;
  76. if (in_wc) {
  77. struct {
  78. __be32 my_qpn;
  79. u32 reserved1;
  80. __be32 rqpn;
  81. u8 sl;
  82. u8 g_path;
  83. u16 reserved2[2];
  84. __be16 pkey;
  85. u32 reserved3[11];
  86. u8 grh[40];
  87. } *ext_info;
  88. memset(inbox + 256, 0, 256);
  89. ext_info = inbox + 256;
  90. ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
  91. ext_info->rqpn = cpu_to_be32(in_wc->src_qp);
  92. ext_info->sl = in_wc->sl << 4;
  93. ext_info->g_path = in_wc->dlid_path_bits |
  94. (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
  95. ext_info->pkey = cpu_to_be16(in_wc->pkey_index);
  96. if (in_grh)
  97. memcpy(ext_info->grh, in_grh, 40);
  98. op_modifier |= 0x4;
  99. in_modifier |= in_wc->slid << 16;
  100. }
  101. err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma,
  102. in_modifier, op_modifier,
  103. MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
  104. MLX4_CMD_NATIVE);
  105. if (!err)
  106. memcpy(response_mad, outmailbox->buf, 256);
  107. mlx4_free_cmd_mailbox(dev->dev, inmailbox);
  108. mlx4_free_cmd_mailbox(dev->dev, outmailbox);
  109. return err;
  110. }
  111. static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
  112. {
  113. struct ib_ah *new_ah;
  114. struct ib_ah_attr ah_attr;
  115. if (!dev->send_agent[port_num - 1][0])
  116. return;
  117. memset(&ah_attr, 0, sizeof ah_attr);
  118. ah_attr.dlid = lid;
  119. ah_attr.sl = sl;
  120. ah_attr.port_num = port_num;
  121. new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
  122. &ah_attr);
  123. if (IS_ERR(new_ah))
  124. return;
  125. spin_lock(&dev->sm_lock);
  126. if (dev->sm_ah[port_num - 1])
  127. ib_destroy_ah(dev->sm_ah[port_num - 1]);
  128. dev->sm_ah[port_num - 1] = new_ah;
  129. spin_unlock(&dev->sm_lock);
  130. }
  131. /*
  132. * Snoop SM MADs for port info and P_Key table sets, so we can
  133. * synthesize LID change and P_Key change events.
  134. */
  135. static void smp_snoop(struct ib_device *ibdev, u8 port_num, struct ib_mad *mad,
  136. u16 prev_lid)
  137. {
  138. struct ib_event event;
  139. if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
  140. mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
  141. mad->mad_hdr.method == IB_MGMT_METHOD_SET) {
  142. if (mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO) {
  143. struct ib_port_info *pinfo =
  144. (struct ib_port_info *) ((struct ib_smp *) mad)->data;
  145. u16 lid = be16_to_cpu(pinfo->lid);
  146. update_sm_ah(to_mdev(ibdev), port_num,
  147. be16_to_cpu(pinfo->sm_lid),
  148. pinfo->neighbormtu_mastersmsl & 0xf);
  149. event.device = ibdev;
  150. event.element.port_num = port_num;
  151. if (pinfo->clientrereg_resv_subnetto & 0x80) {
  152. event.event = IB_EVENT_CLIENT_REREGISTER;
  153. ib_dispatch_event(&event);
  154. }
  155. if (prev_lid != lid) {
  156. event.event = IB_EVENT_LID_CHANGE;
  157. ib_dispatch_event(&event);
  158. }
  159. }
  160. if (mad->mad_hdr.attr_id == IB_SMP_ATTR_PKEY_TABLE) {
  161. event.device = ibdev;
  162. event.event = IB_EVENT_PKEY_CHANGE;
  163. event.element.port_num = port_num;
  164. ib_dispatch_event(&event);
  165. }
  166. }
  167. }
  168. static void node_desc_override(struct ib_device *dev,
  169. struct ib_mad *mad)
  170. {
  171. if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
  172. mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
  173. mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
  174. mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
  175. spin_lock(&to_mdev(dev)->sm_lock);
  176. memcpy(((struct ib_smp *) mad)->data, dev->node_desc, 64);
  177. spin_unlock(&to_mdev(dev)->sm_lock);
  178. }
  179. }
  180. static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, struct ib_mad *mad)
  181. {
  182. int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
  183. struct ib_mad_send_buf *send_buf;
  184. struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
  185. int ret;
  186. if (agent) {
  187. send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
  188. IB_MGMT_MAD_DATA, GFP_ATOMIC);
  189. if (IS_ERR(send_buf))
  190. return;
  191. /*
  192. * We rely here on the fact that MLX QPs don't use the
  193. * address handle after the send is posted (this is
  194. * wrong following the IB spec strictly, but we know
  195. * it's OK for our devices).
  196. */
  197. spin_lock(&dev->sm_lock);
  198. memcpy(send_buf->mad, mad, sizeof *mad);
  199. if ((send_buf->ah = dev->sm_ah[port_num - 1]))
  200. ret = ib_post_send_mad(send_buf, NULL);
  201. else
  202. ret = -EINVAL;
  203. spin_unlock(&dev->sm_lock);
  204. if (ret)
  205. ib_free_send_mad(send_buf);
  206. }
  207. }
  208. static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
  209. struct ib_wc *in_wc, struct ib_grh *in_grh,
  210. struct ib_mad *in_mad, struct ib_mad *out_mad)
  211. {
  212. u16 slid, prev_lid = 0;
  213. int err;
  214. struct ib_port_attr pattr;
  215. slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
  216. if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
  217. forward_trap(to_mdev(ibdev), port_num, in_mad);
  218. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
  219. }
  220. if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
  221. in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
  222. if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
  223. in_mad->mad_hdr.method != IB_MGMT_METHOD_SET &&
  224. in_mad->mad_hdr.method != IB_MGMT_METHOD_TRAP_REPRESS)
  225. return IB_MAD_RESULT_SUCCESS;
  226. /*
  227. * Don't process SMInfo queries -- the SMA can't handle them.
  228. */
  229. if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
  230. return IB_MAD_RESULT_SUCCESS;
  231. } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
  232. in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1 ||
  233. in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2 ||
  234. in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
  235. if (in_mad->mad_hdr.method != IB_MGMT_METHOD_GET &&
  236. in_mad->mad_hdr.method != IB_MGMT_METHOD_SET)
  237. return IB_MAD_RESULT_SUCCESS;
  238. } else
  239. return IB_MAD_RESULT_SUCCESS;
  240. if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
  241. in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
  242. in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
  243. in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
  244. !ib_query_port(ibdev, port_num, &pattr))
  245. prev_lid = pattr.lid;
  246. err = mlx4_MAD_IFC(to_mdev(ibdev),
  247. mad_flags & IB_MAD_IGNORE_MKEY,
  248. mad_flags & IB_MAD_IGNORE_BKEY,
  249. port_num, in_wc, in_grh, in_mad, out_mad);
  250. if (err)
  251. return IB_MAD_RESULT_FAILURE;
  252. if (!out_mad->mad_hdr.status) {
  253. smp_snoop(ibdev, port_num, in_mad, prev_lid);
  254. node_desc_override(ibdev, out_mad);
  255. }
  256. /* set return bit in status of directed route responses */
  257. if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
  258. out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
  259. if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
  260. /* no response for trap repress */
  261. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
  262. return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
  263. }
  264. static void edit_counter(struct mlx4_counter *cnt,
  265. struct ib_pma_portcounters *pma_cnt)
  266. {
  267. ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
  268. (be64_to_cpu(cnt->tx_bytes) >> 2));
  269. ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
  270. (be64_to_cpu(cnt->rx_bytes) >> 2));
  271. ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
  272. be64_to_cpu(cnt->tx_frames));
  273. ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
  274. be64_to_cpu(cnt->rx_frames));
  275. }
  276. static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
  277. struct ib_wc *in_wc, struct ib_grh *in_grh,
  278. struct ib_mad *in_mad, struct ib_mad *out_mad)
  279. {
  280. struct mlx4_cmd_mailbox *mailbox;
  281. struct mlx4_ib_dev *dev = to_mdev(ibdev);
  282. int err;
  283. u32 inmod = dev->counters[port_num - 1] & 0xffff;
  284. u8 mode;
  285. if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
  286. return -EINVAL;
  287. mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
  288. if (IS_ERR(mailbox))
  289. return IB_MAD_RESULT_FAILURE;
  290. err = mlx4_cmd_box(dev->dev, 0, mailbox->dma, inmod, 0,
  291. MLX4_CMD_QUERY_IF_STAT, MLX4_CMD_TIME_CLASS_C,
  292. MLX4_CMD_WRAPPED);
  293. if (err)
  294. err = IB_MAD_RESULT_FAILURE;
  295. else {
  296. memset(out_mad->data, 0, sizeof out_mad->data);
  297. mode = ((struct mlx4_counter *)mailbox->buf)->counter_mode;
  298. switch (mode & 0xf) {
  299. case 0:
  300. edit_counter(mailbox->buf,
  301. (void *)(out_mad->data + 40));
  302. err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
  303. break;
  304. default:
  305. err = IB_MAD_RESULT_FAILURE;
  306. }
  307. }
  308. mlx4_free_cmd_mailbox(dev->dev, mailbox);
  309. return err;
  310. }
  311. int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
  312. struct ib_wc *in_wc, struct ib_grh *in_grh,
  313. struct ib_mad *in_mad, struct ib_mad *out_mad)
  314. {
  315. switch (rdma_port_get_link_layer(ibdev, port_num)) {
  316. case IB_LINK_LAYER_INFINIBAND:
  317. return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
  318. in_grh, in_mad, out_mad);
  319. case IB_LINK_LAYER_ETHERNET:
  320. return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
  321. in_grh, in_mad, out_mad);
  322. default:
  323. return -EINVAL;
  324. }
  325. }
  326. static void send_handler(struct ib_mad_agent *agent,
  327. struct ib_mad_send_wc *mad_send_wc)
  328. {
  329. ib_free_send_mad(mad_send_wc->send_buf);
  330. }
  331. int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
  332. {
  333. struct ib_mad_agent *agent;
  334. int p, q;
  335. int ret;
  336. enum rdma_link_layer ll;
  337. for (p = 0; p < dev->num_ports; ++p) {
  338. ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
  339. for (q = 0; q <= 1; ++q) {
  340. if (ll == IB_LINK_LAYER_INFINIBAND) {
  341. agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
  342. q ? IB_QPT_GSI : IB_QPT_SMI,
  343. NULL, 0, send_handler,
  344. NULL, NULL);
  345. if (IS_ERR(agent)) {
  346. ret = PTR_ERR(agent);
  347. goto err;
  348. }
  349. dev->send_agent[p][q] = agent;
  350. } else
  351. dev->send_agent[p][q] = NULL;
  352. }
  353. }
  354. return 0;
  355. err:
  356. for (p = 0; p < dev->num_ports; ++p)
  357. for (q = 0; q <= 1; ++q)
  358. if (dev->send_agent[p][q])
  359. ib_unregister_mad_agent(dev->send_agent[p][q]);
  360. return ret;
  361. }
  362. void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
  363. {
  364. struct ib_mad_agent *agent;
  365. int p, q;
  366. for (p = 0; p < dev->num_ports; ++p) {
  367. for (q = 0; q <= 1; ++q) {
  368. agent = dev->send_agent[p][q];
  369. if (agent) {
  370. dev->send_agent[p][q] = NULL;
  371. ib_unregister_mad_agent(agent);
  372. }
  373. }
  374. if (dev->sm_ah[p])
  375. ib_destroy_ah(dev->sm_ah[p]);
  376. }
  377. }