ipath_rc.c 52 KB

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  1. /*
  2. * Copyright (c) 2006, 2007, 2008 QLogic Corporation. All rights reserved.
  3. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/io.h>
  34. #include "ipath_verbs.h"
  35. #include "ipath_kernel.h"
  36. /* cut down ridiculously long IB macro names */
  37. #define OP(x) IB_OPCODE_RC_##x
  38. static u32 restart_sge(struct ipath_sge_state *ss, struct ipath_swqe *wqe,
  39. u32 psn, u32 pmtu)
  40. {
  41. u32 len;
  42. len = ((psn - wqe->psn) & IPATH_PSN_MASK) * pmtu;
  43. ss->sge = wqe->sg_list[0];
  44. ss->sg_list = wqe->sg_list + 1;
  45. ss->num_sge = wqe->wr.num_sge;
  46. ipath_skip_sge(ss, len);
  47. return wqe->length - len;
  48. }
  49. /**
  50. * ipath_init_restart- initialize the qp->s_sge after a restart
  51. * @qp: the QP who's SGE we're restarting
  52. * @wqe: the work queue to initialize the QP's SGE from
  53. *
  54. * The QP s_lock should be held and interrupts disabled.
  55. */
  56. static void ipath_init_restart(struct ipath_qp *qp, struct ipath_swqe *wqe)
  57. {
  58. struct ipath_ibdev *dev;
  59. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn,
  60. ib_mtu_enum_to_int(qp->path_mtu));
  61. dev = to_idev(qp->ibqp.device);
  62. spin_lock(&dev->pending_lock);
  63. if (list_empty(&qp->timerwait))
  64. list_add_tail(&qp->timerwait,
  65. &dev->pending[dev->pending_index]);
  66. spin_unlock(&dev->pending_lock);
  67. }
  68. /**
  69. * ipath_make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
  70. * @qp: a pointer to the QP
  71. * @ohdr: a pointer to the IB header being constructed
  72. * @pmtu: the path MTU
  73. *
  74. * Return 1 if constructed; otherwise, return 0.
  75. * Note that we are in the responder's side of the QP context.
  76. * Note the QP s_lock must be held.
  77. */
  78. static int ipath_make_rc_ack(struct ipath_ibdev *dev, struct ipath_qp *qp,
  79. struct ipath_other_headers *ohdr, u32 pmtu)
  80. {
  81. struct ipath_ack_entry *e;
  82. u32 hwords;
  83. u32 len;
  84. u32 bth0;
  85. u32 bth2;
  86. /* Don't send an ACK if we aren't supposed to. */
  87. if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK))
  88. goto bail;
  89. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  90. hwords = 5;
  91. switch (qp->s_ack_state) {
  92. case OP(RDMA_READ_RESPONSE_LAST):
  93. case OP(RDMA_READ_RESPONSE_ONLY):
  94. case OP(ATOMIC_ACKNOWLEDGE):
  95. /*
  96. * We can increment the tail pointer now that the last
  97. * response has been sent instead of only being
  98. * constructed.
  99. */
  100. if (++qp->s_tail_ack_queue > IPATH_MAX_RDMA_ATOMIC)
  101. qp->s_tail_ack_queue = 0;
  102. /* FALLTHROUGH */
  103. case OP(SEND_ONLY):
  104. case OP(ACKNOWLEDGE):
  105. /* Check for no next entry in the queue. */
  106. if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
  107. if (qp->s_flags & IPATH_S_ACK_PENDING)
  108. goto normal;
  109. qp->s_ack_state = OP(ACKNOWLEDGE);
  110. goto bail;
  111. }
  112. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  113. if (e->opcode == OP(RDMA_READ_REQUEST)) {
  114. /* Copy SGE state in case we need to resend */
  115. qp->s_ack_rdma_sge = e->rdma_sge;
  116. qp->s_cur_sge = &qp->s_ack_rdma_sge;
  117. len = e->rdma_sge.sge.sge_length;
  118. if (len > pmtu) {
  119. len = pmtu;
  120. qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
  121. } else {
  122. qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
  123. e->sent = 1;
  124. }
  125. ohdr->u.aeth = ipath_compute_aeth(qp);
  126. hwords++;
  127. qp->s_ack_rdma_psn = e->psn;
  128. bth2 = qp->s_ack_rdma_psn++ & IPATH_PSN_MASK;
  129. } else {
  130. /* COMPARE_SWAP or FETCH_ADD */
  131. qp->s_cur_sge = NULL;
  132. len = 0;
  133. qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
  134. ohdr->u.at.aeth = ipath_compute_aeth(qp);
  135. ohdr->u.at.atomic_ack_eth[0] =
  136. cpu_to_be32(e->atomic_data >> 32);
  137. ohdr->u.at.atomic_ack_eth[1] =
  138. cpu_to_be32(e->atomic_data);
  139. hwords += sizeof(ohdr->u.at) / sizeof(u32);
  140. bth2 = e->psn;
  141. e->sent = 1;
  142. }
  143. bth0 = qp->s_ack_state << 24;
  144. break;
  145. case OP(RDMA_READ_RESPONSE_FIRST):
  146. qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  147. /* FALLTHROUGH */
  148. case OP(RDMA_READ_RESPONSE_MIDDLE):
  149. len = qp->s_ack_rdma_sge.sge.sge_length;
  150. if (len > pmtu)
  151. len = pmtu;
  152. else {
  153. ohdr->u.aeth = ipath_compute_aeth(qp);
  154. hwords++;
  155. qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
  156. qp->s_ack_queue[qp->s_tail_ack_queue].sent = 1;
  157. }
  158. bth0 = qp->s_ack_state << 24;
  159. bth2 = qp->s_ack_rdma_psn++ & IPATH_PSN_MASK;
  160. break;
  161. default:
  162. normal:
  163. /*
  164. * Send a regular ACK.
  165. * Set the s_ack_state so we wait until after sending
  166. * the ACK before setting s_ack_state to ACKNOWLEDGE
  167. * (see above).
  168. */
  169. qp->s_ack_state = OP(SEND_ONLY);
  170. qp->s_flags &= ~IPATH_S_ACK_PENDING;
  171. qp->s_cur_sge = NULL;
  172. if (qp->s_nak_state)
  173. ohdr->u.aeth =
  174. cpu_to_be32((qp->r_msn & IPATH_MSN_MASK) |
  175. (qp->s_nak_state <<
  176. IPATH_AETH_CREDIT_SHIFT));
  177. else
  178. ohdr->u.aeth = ipath_compute_aeth(qp);
  179. hwords++;
  180. len = 0;
  181. bth0 = OP(ACKNOWLEDGE) << 24;
  182. bth2 = qp->s_ack_psn & IPATH_PSN_MASK;
  183. }
  184. qp->s_hdrwords = hwords;
  185. qp->s_cur_size = len;
  186. ipath_make_ruc_header(dev, qp, ohdr, bth0, bth2);
  187. return 1;
  188. bail:
  189. return 0;
  190. }
  191. /**
  192. * ipath_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
  193. * @qp: a pointer to the QP
  194. *
  195. * Return 1 if constructed; otherwise, return 0.
  196. */
  197. int ipath_make_rc_req(struct ipath_qp *qp)
  198. {
  199. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  200. struct ipath_other_headers *ohdr;
  201. struct ipath_sge_state *ss;
  202. struct ipath_swqe *wqe;
  203. u32 hwords;
  204. u32 len;
  205. u32 bth0;
  206. u32 bth2;
  207. u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
  208. char newreq;
  209. unsigned long flags;
  210. int ret = 0;
  211. ohdr = &qp->s_hdr.u.oth;
  212. if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
  213. ohdr = &qp->s_hdr.u.l.oth;
  214. /*
  215. * The lock is needed to synchronize between the sending tasklet,
  216. * the receive interrupt handler, and timeout resends.
  217. */
  218. spin_lock_irqsave(&qp->s_lock, flags);
  219. /* Sending responses has higher priority over sending requests. */
  220. if ((qp->r_head_ack_queue != qp->s_tail_ack_queue ||
  221. (qp->s_flags & IPATH_S_ACK_PENDING) ||
  222. qp->s_ack_state != OP(ACKNOWLEDGE)) &&
  223. ipath_make_rc_ack(dev, qp, ohdr, pmtu))
  224. goto done;
  225. if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_SEND_OK)) {
  226. if (!(ib_ipath_state_ops[qp->state] & IPATH_FLUSH_SEND))
  227. goto bail;
  228. /* We are in the error state, flush the work request. */
  229. if (qp->s_last == qp->s_head)
  230. goto bail;
  231. /* If DMAs are in progress, we can't flush immediately. */
  232. if (atomic_read(&qp->s_dma_busy)) {
  233. qp->s_flags |= IPATH_S_WAIT_DMA;
  234. goto bail;
  235. }
  236. wqe = get_swqe_ptr(qp, qp->s_last);
  237. ipath_send_complete(qp, wqe, IB_WC_WR_FLUSH_ERR);
  238. goto done;
  239. }
  240. /* Leave BUSY set until RNR timeout. */
  241. if (qp->s_rnr_timeout) {
  242. qp->s_flags |= IPATH_S_WAITING;
  243. goto bail;
  244. }
  245. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  246. hwords = 5;
  247. bth0 = 1 << 22; /* Set M bit */
  248. /* Send a request. */
  249. wqe = get_swqe_ptr(qp, qp->s_cur);
  250. switch (qp->s_state) {
  251. default:
  252. if (!(ib_ipath_state_ops[qp->state] &
  253. IPATH_PROCESS_NEXT_SEND_OK))
  254. goto bail;
  255. /*
  256. * Resend an old request or start a new one.
  257. *
  258. * We keep track of the current SWQE so that
  259. * we don't reset the "furthest progress" state
  260. * if we need to back up.
  261. */
  262. newreq = 0;
  263. if (qp->s_cur == qp->s_tail) {
  264. /* Check if send work queue is empty. */
  265. if (qp->s_tail == qp->s_head)
  266. goto bail;
  267. /*
  268. * If a fence is requested, wait for previous
  269. * RDMA read and atomic operations to finish.
  270. */
  271. if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
  272. qp->s_num_rd_atomic) {
  273. qp->s_flags |= IPATH_S_FENCE_PENDING;
  274. goto bail;
  275. }
  276. wqe->psn = qp->s_next_psn;
  277. newreq = 1;
  278. }
  279. /*
  280. * Note that we have to be careful not to modify the
  281. * original work request since we may need to resend
  282. * it.
  283. */
  284. len = wqe->length;
  285. ss = &qp->s_sge;
  286. bth2 = 0;
  287. switch (wqe->wr.opcode) {
  288. case IB_WR_SEND:
  289. case IB_WR_SEND_WITH_IMM:
  290. /* If no credit, return. */
  291. if (qp->s_lsn != (u32) -1 &&
  292. ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0) {
  293. qp->s_flags |= IPATH_S_WAIT_SSN_CREDIT;
  294. goto bail;
  295. }
  296. wqe->lpsn = wqe->psn;
  297. if (len > pmtu) {
  298. wqe->lpsn += (len - 1) / pmtu;
  299. qp->s_state = OP(SEND_FIRST);
  300. len = pmtu;
  301. break;
  302. }
  303. if (wqe->wr.opcode == IB_WR_SEND)
  304. qp->s_state = OP(SEND_ONLY);
  305. else {
  306. qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
  307. /* Immediate data comes after the BTH */
  308. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  309. hwords += 1;
  310. }
  311. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  312. bth0 |= 1 << 23;
  313. bth2 = 1 << 31; /* Request ACK. */
  314. if (++qp->s_cur == qp->s_size)
  315. qp->s_cur = 0;
  316. break;
  317. case IB_WR_RDMA_WRITE:
  318. if (newreq && qp->s_lsn != (u32) -1)
  319. qp->s_lsn++;
  320. /* FALLTHROUGH */
  321. case IB_WR_RDMA_WRITE_WITH_IMM:
  322. /* If no credit, return. */
  323. if (qp->s_lsn != (u32) -1 &&
  324. ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0) {
  325. qp->s_flags |= IPATH_S_WAIT_SSN_CREDIT;
  326. goto bail;
  327. }
  328. ohdr->u.rc.reth.vaddr =
  329. cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
  330. ohdr->u.rc.reth.rkey =
  331. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  332. ohdr->u.rc.reth.length = cpu_to_be32(len);
  333. hwords += sizeof(struct ib_reth) / sizeof(u32);
  334. wqe->lpsn = wqe->psn;
  335. if (len > pmtu) {
  336. wqe->lpsn += (len - 1) / pmtu;
  337. qp->s_state = OP(RDMA_WRITE_FIRST);
  338. len = pmtu;
  339. break;
  340. }
  341. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  342. qp->s_state = OP(RDMA_WRITE_ONLY);
  343. else {
  344. qp->s_state =
  345. OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
  346. /* Immediate data comes after RETH */
  347. ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
  348. hwords += 1;
  349. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  350. bth0 |= 1 << 23;
  351. }
  352. bth2 = 1 << 31; /* Request ACK. */
  353. if (++qp->s_cur == qp->s_size)
  354. qp->s_cur = 0;
  355. break;
  356. case IB_WR_RDMA_READ:
  357. /*
  358. * Don't allow more operations to be started
  359. * than the QP limits allow.
  360. */
  361. if (newreq) {
  362. if (qp->s_num_rd_atomic >=
  363. qp->s_max_rd_atomic) {
  364. qp->s_flags |= IPATH_S_RDMAR_PENDING;
  365. goto bail;
  366. }
  367. qp->s_num_rd_atomic++;
  368. if (qp->s_lsn != (u32) -1)
  369. qp->s_lsn++;
  370. /*
  371. * Adjust s_next_psn to count the
  372. * expected number of responses.
  373. */
  374. if (len > pmtu)
  375. qp->s_next_psn += (len - 1) / pmtu;
  376. wqe->lpsn = qp->s_next_psn++;
  377. }
  378. ohdr->u.rc.reth.vaddr =
  379. cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
  380. ohdr->u.rc.reth.rkey =
  381. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  382. ohdr->u.rc.reth.length = cpu_to_be32(len);
  383. qp->s_state = OP(RDMA_READ_REQUEST);
  384. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  385. ss = NULL;
  386. len = 0;
  387. if (++qp->s_cur == qp->s_size)
  388. qp->s_cur = 0;
  389. break;
  390. case IB_WR_ATOMIC_CMP_AND_SWP:
  391. case IB_WR_ATOMIC_FETCH_AND_ADD:
  392. /*
  393. * Don't allow more operations to be started
  394. * than the QP limits allow.
  395. */
  396. if (newreq) {
  397. if (qp->s_num_rd_atomic >=
  398. qp->s_max_rd_atomic) {
  399. qp->s_flags |= IPATH_S_RDMAR_PENDING;
  400. goto bail;
  401. }
  402. qp->s_num_rd_atomic++;
  403. if (qp->s_lsn != (u32) -1)
  404. qp->s_lsn++;
  405. wqe->lpsn = wqe->psn;
  406. }
  407. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
  408. qp->s_state = OP(COMPARE_SWAP);
  409. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  410. wqe->wr.wr.atomic.swap);
  411. ohdr->u.atomic_eth.compare_data = cpu_to_be64(
  412. wqe->wr.wr.atomic.compare_add);
  413. } else {
  414. qp->s_state = OP(FETCH_ADD);
  415. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  416. wqe->wr.wr.atomic.compare_add);
  417. ohdr->u.atomic_eth.compare_data = 0;
  418. }
  419. ohdr->u.atomic_eth.vaddr[0] = cpu_to_be32(
  420. wqe->wr.wr.atomic.remote_addr >> 32);
  421. ohdr->u.atomic_eth.vaddr[1] = cpu_to_be32(
  422. wqe->wr.wr.atomic.remote_addr);
  423. ohdr->u.atomic_eth.rkey = cpu_to_be32(
  424. wqe->wr.wr.atomic.rkey);
  425. hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
  426. ss = NULL;
  427. len = 0;
  428. if (++qp->s_cur == qp->s_size)
  429. qp->s_cur = 0;
  430. break;
  431. default:
  432. goto bail;
  433. }
  434. qp->s_sge.sge = wqe->sg_list[0];
  435. qp->s_sge.sg_list = wqe->sg_list + 1;
  436. qp->s_sge.num_sge = wqe->wr.num_sge;
  437. qp->s_len = wqe->length;
  438. if (newreq) {
  439. qp->s_tail++;
  440. if (qp->s_tail >= qp->s_size)
  441. qp->s_tail = 0;
  442. }
  443. bth2 |= qp->s_psn & IPATH_PSN_MASK;
  444. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  445. qp->s_psn = wqe->lpsn + 1;
  446. else {
  447. qp->s_psn++;
  448. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  449. qp->s_next_psn = qp->s_psn;
  450. }
  451. /*
  452. * Put the QP on the pending list so lost ACKs will cause
  453. * a retry. More than one request can be pending so the
  454. * QP may already be on the dev->pending list.
  455. */
  456. spin_lock(&dev->pending_lock);
  457. if (list_empty(&qp->timerwait))
  458. list_add_tail(&qp->timerwait,
  459. &dev->pending[dev->pending_index]);
  460. spin_unlock(&dev->pending_lock);
  461. break;
  462. case OP(RDMA_READ_RESPONSE_FIRST):
  463. /*
  464. * This case can only happen if a send is restarted.
  465. * See ipath_restart_rc().
  466. */
  467. ipath_init_restart(qp, wqe);
  468. /* FALLTHROUGH */
  469. case OP(SEND_FIRST):
  470. qp->s_state = OP(SEND_MIDDLE);
  471. /* FALLTHROUGH */
  472. case OP(SEND_MIDDLE):
  473. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  474. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  475. qp->s_next_psn = qp->s_psn;
  476. ss = &qp->s_sge;
  477. len = qp->s_len;
  478. if (len > pmtu) {
  479. len = pmtu;
  480. break;
  481. }
  482. if (wqe->wr.opcode == IB_WR_SEND)
  483. qp->s_state = OP(SEND_LAST);
  484. else {
  485. qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
  486. /* Immediate data comes after the BTH */
  487. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  488. hwords += 1;
  489. }
  490. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  491. bth0 |= 1 << 23;
  492. bth2 |= 1 << 31; /* Request ACK. */
  493. qp->s_cur++;
  494. if (qp->s_cur >= qp->s_size)
  495. qp->s_cur = 0;
  496. break;
  497. case OP(RDMA_READ_RESPONSE_LAST):
  498. /*
  499. * This case can only happen if a RDMA write is restarted.
  500. * See ipath_restart_rc().
  501. */
  502. ipath_init_restart(qp, wqe);
  503. /* FALLTHROUGH */
  504. case OP(RDMA_WRITE_FIRST):
  505. qp->s_state = OP(RDMA_WRITE_MIDDLE);
  506. /* FALLTHROUGH */
  507. case OP(RDMA_WRITE_MIDDLE):
  508. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  509. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  510. qp->s_next_psn = qp->s_psn;
  511. ss = &qp->s_sge;
  512. len = qp->s_len;
  513. if (len > pmtu) {
  514. len = pmtu;
  515. break;
  516. }
  517. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  518. qp->s_state = OP(RDMA_WRITE_LAST);
  519. else {
  520. qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
  521. /* Immediate data comes after the BTH */
  522. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  523. hwords += 1;
  524. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  525. bth0 |= 1 << 23;
  526. }
  527. bth2 |= 1 << 31; /* Request ACK. */
  528. qp->s_cur++;
  529. if (qp->s_cur >= qp->s_size)
  530. qp->s_cur = 0;
  531. break;
  532. case OP(RDMA_READ_RESPONSE_MIDDLE):
  533. /*
  534. * This case can only happen if a RDMA read is restarted.
  535. * See ipath_restart_rc().
  536. */
  537. ipath_init_restart(qp, wqe);
  538. len = ((qp->s_psn - wqe->psn) & IPATH_PSN_MASK) * pmtu;
  539. ohdr->u.rc.reth.vaddr =
  540. cpu_to_be64(wqe->wr.wr.rdma.remote_addr + len);
  541. ohdr->u.rc.reth.rkey =
  542. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  543. ohdr->u.rc.reth.length = cpu_to_be32(qp->s_len);
  544. qp->s_state = OP(RDMA_READ_REQUEST);
  545. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  546. bth2 = qp->s_psn & IPATH_PSN_MASK;
  547. qp->s_psn = wqe->lpsn + 1;
  548. ss = NULL;
  549. len = 0;
  550. qp->s_cur++;
  551. if (qp->s_cur == qp->s_size)
  552. qp->s_cur = 0;
  553. break;
  554. }
  555. if (ipath_cmp24(qp->s_psn, qp->s_last_psn + IPATH_PSN_CREDIT - 1) >= 0)
  556. bth2 |= 1 << 31; /* Request ACK. */
  557. qp->s_len -= len;
  558. qp->s_hdrwords = hwords;
  559. qp->s_cur_sge = ss;
  560. qp->s_cur_size = len;
  561. ipath_make_ruc_header(dev, qp, ohdr, bth0 | (qp->s_state << 24), bth2);
  562. done:
  563. ret = 1;
  564. goto unlock;
  565. bail:
  566. qp->s_flags &= ~IPATH_S_BUSY;
  567. unlock:
  568. spin_unlock_irqrestore(&qp->s_lock, flags);
  569. return ret;
  570. }
  571. /**
  572. * send_rc_ack - Construct an ACK packet and send it
  573. * @qp: a pointer to the QP
  574. *
  575. * This is called from ipath_rc_rcv() and only uses the receive
  576. * side QP state.
  577. * Note that RDMA reads and atomics are handled in the
  578. * send side QP state and tasklet.
  579. */
  580. static void send_rc_ack(struct ipath_qp *qp)
  581. {
  582. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  583. struct ipath_devdata *dd;
  584. u16 lrh0;
  585. u32 bth0;
  586. u32 hwords;
  587. u32 __iomem *piobuf;
  588. struct ipath_ib_header hdr;
  589. struct ipath_other_headers *ohdr;
  590. unsigned long flags;
  591. spin_lock_irqsave(&qp->s_lock, flags);
  592. /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
  593. if (qp->r_head_ack_queue != qp->s_tail_ack_queue ||
  594. (qp->s_flags & IPATH_S_ACK_PENDING) ||
  595. qp->s_ack_state != OP(ACKNOWLEDGE))
  596. goto queue_ack;
  597. spin_unlock_irqrestore(&qp->s_lock, flags);
  598. /* Don't try to send ACKs if the link isn't ACTIVE */
  599. dd = dev->dd;
  600. if (!(dd->ipath_flags & IPATH_LINKACTIVE))
  601. goto done;
  602. piobuf = ipath_getpiobuf(dd, 0, NULL);
  603. if (!piobuf) {
  604. /*
  605. * We are out of PIO buffers at the moment.
  606. * Pass responsibility for sending the ACK to the
  607. * send tasklet so that when a PIO buffer becomes
  608. * available, the ACK is sent ahead of other outgoing
  609. * packets.
  610. */
  611. spin_lock_irqsave(&qp->s_lock, flags);
  612. goto queue_ack;
  613. }
  614. /* Construct the header. */
  615. ohdr = &hdr.u.oth;
  616. lrh0 = IPATH_LRH_BTH;
  617. /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4. */
  618. hwords = 6;
  619. if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
  620. hwords += ipath_make_grh(dev, &hdr.u.l.grh,
  621. &qp->remote_ah_attr.grh,
  622. hwords, 0);
  623. ohdr = &hdr.u.l.oth;
  624. lrh0 = IPATH_LRH_GRH;
  625. }
  626. /* read pkey_index w/o lock (its atomic) */
  627. bth0 = ipath_get_pkey(dd, qp->s_pkey_index) |
  628. (OP(ACKNOWLEDGE) << 24) | (1 << 22);
  629. if (qp->r_nak_state)
  630. ohdr->u.aeth = cpu_to_be32((qp->r_msn & IPATH_MSN_MASK) |
  631. (qp->r_nak_state <<
  632. IPATH_AETH_CREDIT_SHIFT));
  633. else
  634. ohdr->u.aeth = ipath_compute_aeth(qp);
  635. lrh0 |= qp->remote_ah_attr.sl << 4;
  636. hdr.lrh[0] = cpu_to_be16(lrh0);
  637. hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
  638. hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
  639. hdr.lrh[3] = cpu_to_be16(dd->ipath_lid |
  640. qp->remote_ah_attr.src_path_bits);
  641. ohdr->bth[0] = cpu_to_be32(bth0);
  642. ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
  643. ohdr->bth[2] = cpu_to_be32(qp->r_ack_psn & IPATH_PSN_MASK);
  644. writeq(hwords + 1, piobuf);
  645. if (dd->ipath_flags & IPATH_PIO_FLUSH_WC) {
  646. u32 *hdrp = (u32 *) &hdr;
  647. ipath_flush_wc();
  648. __iowrite32_copy(piobuf + 2, hdrp, hwords - 1);
  649. ipath_flush_wc();
  650. __raw_writel(hdrp[hwords - 1], piobuf + hwords + 1);
  651. } else
  652. __iowrite32_copy(piobuf + 2, (u32 *) &hdr, hwords);
  653. ipath_flush_wc();
  654. dev->n_unicast_xmit++;
  655. goto done;
  656. queue_ack:
  657. if (ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK) {
  658. dev->n_rc_qacks++;
  659. qp->s_flags |= IPATH_S_ACK_PENDING;
  660. qp->s_nak_state = qp->r_nak_state;
  661. qp->s_ack_psn = qp->r_ack_psn;
  662. /* Schedule the send tasklet. */
  663. ipath_schedule_send(qp);
  664. }
  665. spin_unlock_irqrestore(&qp->s_lock, flags);
  666. done:
  667. return;
  668. }
  669. /**
  670. * reset_psn - reset the QP state to send starting from PSN
  671. * @qp: the QP
  672. * @psn: the packet sequence number to restart at
  673. *
  674. * This is called from ipath_rc_rcv() to process an incoming RC ACK
  675. * for the given QP.
  676. * Called at interrupt level with the QP s_lock held.
  677. */
  678. static void reset_psn(struct ipath_qp *qp, u32 psn)
  679. {
  680. u32 n = qp->s_last;
  681. struct ipath_swqe *wqe = get_swqe_ptr(qp, n);
  682. u32 opcode;
  683. qp->s_cur = n;
  684. /*
  685. * If we are starting the request from the beginning,
  686. * let the normal send code handle initialization.
  687. */
  688. if (ipath_cmp24(psn, wqe->psn) <= 0) {
  689. qp->s_state = OP(SEND_LAST);
  690. goto done;
  691. }
  692. /* Find the work request opcode corresponding to the given PSN. */
  693. opcode = wqe->wr.opcode;
  694. for (;;) {
  695. int diff;
  696. if (++n == qp->s_size)
  697. n = 0;
  698. if (n == qp->s_tail)
  699. break;
  700. wqe = get_swqe_ptr(qp, n);
  701. diff = ipath_cmp24(psn, wqe->psn);
  702. if (diff < 0)
  703. break;
  704. qp->s_cur = n;
  705. /*
  706. * If we are starting the request from the beginning,
  707. * let the normal send code handle initialization.
  708. */
  709. if (diff == 0) {
  710. qp->s_state = OP(SEND_LAST);
  711. goto done;
  712. }
  713. opcode = wqe->wr.opcode;
  714. }
  715. /*
  716. * Set the state to restart in the middle of a request.
  717. * Don't change the s_sge, s_cur_sge, or s_cur_size.
  718. * See ipath_make_rc_req().
  719. */
  720. switch (opcode) {
  721. case IB_WR_SEND:
  722. case IB_WR_SEND_WITH_IMM:
  723. qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
  724. break;
  725. case IB_WR_RDMA_WRITE:
  726. case IB_WR_RDMA_WRITE_WITH_IMM:
  727. qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
  728. break;
  729. case IB_WR_RDMA_READ:
  730. qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  731. break;
  732. default:
  733. /*
  734. * This case shouldn't happen since its only
  735. * one PSN per req.
  736. */
  737. qp->s_state = OP(SEND_LAST);
  738. }
  739. done:
  740. qp->s_psn = psn;
  741. }
  742. /**
  743. * ipath_restart_rc - back up requester to resend the last un-ACKed request
  744. * @qp: the QP to restart
  745. * @psn: packet sequence number for the request
  746. * @wc: the work completion request
  747. *
  748. * The QP s_lock should be held and interrupts disabled.
  749. */
  750. void ipath_restart_rc(struct ipath_qp *qp, u32 psn)
  751. {
  752. struct ipath_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
  753. struct ipath_ibdev *dev;
  754. if (qp->s_retry == 0) {
  755. ipath_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR);
  756. ipath_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  757. goto bail;
  758. }
  759. qp->s_retry--;
  760. /*
  761. * Remove the QP from the timeout queue.
  762. * Note: it may already have been removed by ipath_ib_timer().
  763. */
  764. dev = to_idev(qp->ibqp.device);
  765. spin_lock(&dev->pending_lock);
  766. if (!list_empty(&qp->timerwait))
  767. list_del_init(&qp->timerwait);
  768. if (!list_empty(&qp->piowait))
  769. list_del_init(&qp->piowait);
  770. spin_unlock(&dev->pending_lock);
  771. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  772. dev->n_rc_resends++;
  773. else
  774. dev->n_rc_resends += (qp->s_psn - psn) & IPATH_PSN_MASK;
  775. reset_psn(qp, psn);
  776. ipath_schedule_send(qp);
  777. bail:
  778. return;
  779. }
  780. static inline void update_last_psn(struct ipath_qp *qp, u32 psn)
  781. {
  782. qp->s_last_psn = psn;
  783. }
  784. /**
  785. * do_rc_ack - process an incoming RC ACK
  786. * @qp: the QP the ACK came in on
  787. * @psn: the packet sequence number of the ACK
  788. * @opcode: the opcode of the request that resulted in the ACK
  789. *
  790. * This is called from ipath_rc_rcv_resp() to process an incoming RC ACK
  791. * for the given QP.
  792. * Called at interrupt level with the QP s_lock held and interrupts disabled.
  793. * Returns 1 if OK, 0 if current operation should be aborted (NAK).
  794. */
  795. static int do_rc_ack(struct ipath_qp *qp, u32 aeth, u32 psn, int opcode,
  796. u64 val)
  797. {
  798. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  799. struct ib_wc wc;
  800. enum ib_wc_status status;
  801. struct ipath_swqe *wqe;
  802. int ret = 0;
  803. u32 ack_psn;
  804. int diff;
  805. /*
  806. * Remove the QP from the timeout queue (or RNR timeout queue).
  807. * If ipath_ib_timer() has already removed it,
  808. * it's OK since we hold the QP s_lock and ipath_restart_rc()
  809. * just won't find anything to restart if we ACK everything.
  810. */
  811. spin_lock(&dev->pending_lock);
  812. if (!list_empty(&qp->timerwait))
  813. list_del_init(&qp->timerwait);
  814. spin_unlock(&dev->pending_lock);
  815. /*
  816. * Note that NAKs implicitly ACK outstanding SEND and RDMA write
  817. * requests and implicitly NAK RDMA read and atomic requests issued
  818. * before the NAK'ed request. The MSN won't include the NAK'ed
  819. * request but will include an ACK'ed request(s).
  820. */
  821. ack_psn = psn;
  822. if (aeth >> 29)
  823. ack_psn--;
  824. wqe = get_swqe_ptr(qp, qp->s_last);
  825. /*
  826. * The MSN might be for a later WQE than the PSN indicates so
  827. * only complete WQEs that the PSN finishes.
  828. */
  829. while ((diff = ipath_cmp24(ack_psn, wqe->lpsn)) >= 0) {
  830. /*
  831. * RDMA_READ_RESPONSE_ONLY is a special case since
  832. * we want to generate completion events for everything
  833. * before the RDMA read, copy the data, then generate
  834. * the completion for the read.
  835. */
  836. if (wqe->wr.opcode == IB_WR_RDMA_READ &&
  837. opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
  838. diff == 0) {
  839. ret = 1;
  840. goto bail;
  841. }
  842. /*
  843. * If this request is a RDMA read or atomic, and the ACK is
  844. * for a later operation, this ACK NAKs the RDMA read or
  845. * atomic. In other words, only a RDMA_READ_LAST or ONLY
  846. * can ACK a RDMA read and likewise for atomic ops. Note
  847. * that the NAK case can only happen if relaxed ordering is
  848. * used and requests are sent after an RDMA read or atomic
  849. * is sent but before the response is received.
  850. */
  851. if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
  852. (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
  853. ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  854. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
  855. (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
  856. /*
  857. * The last valid PSN seen is the previous
  858. * request's.
  859. */
  860. update_last_psn(qp, wqe->psn - 1);
  861. /* Retry this request. */
  862. ipath_restart_rc(qp, wqe->psn);
  863. /*
  864. * No need to process the ACK/NAK since we are
  865. * restarting an earlier request.
  866. */
  867. goto bail;
  868. }
  869. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  870. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
  871. *(u64 *) wqe->sg_list[0].vaddr = val;
  872. if (qp->s_num_rd_atomic &&
  873. (wqe->wr.opcode == IB_WR_RDMA_READ ||
  874. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  875. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
  876. qp->s_num_rd_atomic--;
  877. /* Restart sending task if fence is complete */
  878. if (((qp->s_flags & IPATH_S_FENCE_PENDING) &&
  879. !qp->s_num_rd_atomic) ||
  880. qp->s_flags & IPATH_S_RDMAR_PENDING)
  881. ipath_schedule_send(qp);
  882. }
  883. /* Post a send completion queue entry if requested. */
  884. if (!(qp->s_flags & IPATH_S_SIGNAL_REQ_WR) ||
  885. (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
  886. memset(&wc, 0, sizeof wc);
  887. wc.wr_id = wqe->wr.wr_id;
  888. wc.status = IB_WC_SUCCESS;
  889. wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  890. wc.byte_len = wqe->length;
  891. wc.qp = &qp->ibqp;
  892. wc.src_qp = qp->remote_qpn;
  893. wc.slid = qp->remote_ah_attr.dlid;
  894. wc.sl = qp->remote_ah_attr.sl;
  895. ipath_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
  896. }
  897. qp->s_retry = qp->s_retry_cnt;
  898. /*
  899. * If we are completing a request which is in the process of
  900. * being resent, we can stop resending it since we know the
  901. * responder has already seen it.
  902. */
  903. if (qp->s_last == qp->s_cur) {
  904. if (++qp->s_cur >= qp->s_size)
  905. qp->s_cur = 0;
  906. qp->s_last = qp->s_cur;
  907. if (qp->s_last == qp->s_tail)
  908. break;
  909. wqe = get_swqe_ptr(qp, qp->s_cur);
  910. qp->s_state = OP(SEND_LAST);
  911. qp->s_psn = wqe->psn;
  912. } else {
  913. if (++qp->s_last >= qp->s_size)
  914. qp->s_last = 0;
  915. if (qp->state == IB_QPS_SQD && qp->s_last == qp->s_cur)
  916. qp->s_draining = 0;
  917. if (qp->s_last == qp->s_tail)
  918. break;
  919. wqe = get_swqe_ptr(qp, qp->s_last);
  920. }
  921. }
  922. switch (aeth >> 29) {
  923. case 0: /* ACK */
  924. dev->n_rc_acks++;
  925. /* If this is a partial ACK, reset the retransmit timer. */
  926. if (qp->s_last != qp->s_tail) {
  927. spin_lock(&dev->pending_lock);
  928. if (list_empty(&qp->timerwait))
  929. list_add_tail(&qp->timerwait,
  930. &dev->pending[dev->pending_index]);
  931. spin_unlock(&dev->pending_lock);
  932. /*
  933. * If we get a partial ACK for a resent operation,
  934. * we can stop resending the earlier packets and
  935. * continue with the next packet the receiver wants.
  936. */
  937. if (ipath_cmp24(qp->s_psn, psn) <= 0) {
  938. reset_psn(qp, psn + 1);
  939. ipath_schedule_send(qp);
  940. }
  941. } else if (ipath_cmp24(qp->s_psn, psn) <= 0) {
  942. qp->s_state = OP(SEND_LAST);
  943. qp->s_psn = psn + 1;
  944. }
  945. ipath_get_credit(qp, aeth);
  946. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  947. qp->s_retry = qp->s_retry_cnt;
  948. update_last_psn(qp, psn);
  949. ret = 1;
  950. goto bail;
  951. case 1: /* RNR NAK */
  952. dev->n_rnr_naks++;
  953. if (qp->s_last == qp->s_tail)
  954. goto bail;
  955. if (qp->s_rnr_retry == 0) {
  956. status = IB_WC_RNR_RETRY_EXC_ERR;
  957. goto class_b;
  958. }
  959. if (qp->s_rnr_retry_cnt < 7)
  960. qp->s_rnr_retry--;
  961. /* The last valid PSN is the previous PSN. */
  962. update_last_psn(qp, psn - 1);
  963. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  964. dev->n_rc_resends++;
  965. else
  966. dev->n_rc_resends +=
  967. (qp->s_psn - psn) & IPATH_PSN_MASK;
  968. reset_psn(qp, psn);
  969. qp->s_rnr_timeout =
  970. ib_ipath_rnr_table[(aeth >> IPATH_AETH_CREDIT_SHIFT) &
  971. IPATH_AETH_CREDIT_MASK];
  972. ipath_insert_rnr_queue(qp);
  973. ipath_schedule_send(qp);
  974. goto bail;
  975. case 3: /* NAK */
  976. if (qp->s_last == qp->s_tail)
  977. goto bail;
  978. /* The last valid PSN is the previous PSN. */
  979. update_last_psn(qp, psn - 1);
  980. switch ((aeth >> IPATH_AETH_CREDIT_SHIFT) &
  981. IPATH_AETH_CREDIT_MASK) {
  982. case 0: /* PSN sequence error */
  983. dev->n_seq_naks++;
  984. /*
  985. * Back up to the responder's expected PSN.
  986. * Note that we might get a NAK in the middle of an
  987. * RDMA READ response which terminates the RDMA
  988. * READ.
  989. */
  990. ipath_restart_rc(qp, psn);
  991. break;
  992. case 1: /* Invalid Request */
  993. status = IB_WC_REM_INV_REQ_ERR;
  994. dev->n_other_naks++;
  995. goto class_b;
  996. case 2: /* Remote Access Error */
  997. status = IB_WC_REM_ACCESS_ERR;
  998. dev->n_other_naks++;
  999. goto class_b;
  1000. case 3: /* Remote Operation Error */
  1001. status = IB_WC_REM_OP_ERR;
  1002. dev->n_other_naks++;
  1003. class_b:
  1004. ipath_send_complete(qp, wqe, status);
  1005. ipath_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1006. break;
  1007. default:
  1008. /* Ignore other reserved NAK error codes */
  1009. goto reserved;
  1010. }
  1011. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  1012. goto bail;
  1013. default: /* 2: reserved */
  1014. reserved:
  1015. /* Ignore reserved NAK codes. */
  1016. goto bail;
  1017. }
  1018. bail:
  1019. return ret;
  1020. }
  1021. /**
  1022. * ipath_rc_rcv_resp - process an incoming RC response packet
  1023. * @dev: the device this packet came in on
  1024. * @ohdr: the other headers for this packet
  1025. * @data: the packet data
  1026. * @tlen: the packet length
  1027. * @qp: the QP for this packet
  1028. * @opcode: the opcode for this packet
  1029. * @psn: the packet sequence number for this packet
  1030. * @hdrsize: the header length
  1031. * @pmtu: the path MTU
  1032. * @header_in_data: true if part of the header data is in the data buffer
  1033. *
  1034. * This is called from ipath_rc_rcv() to process an incoming RC response
  1035. * packet for the given QP.
  1036. * Called at interrupt level.
  1037. */
  1038. static inline void ipath_rc_rcv_resp(struct ipath_ibdev *dev,
  1039. struct ipath_other_headers *ohdr,
  1040. void *data, u32 tlen,
  1041. struct ipath_qp *qp,
  1042. u32 opcode,
  1043. u32 psn, u32 hdrsize, u32 pmtu,
  1044. int header_in_data)
  1045. {
  1046. struct ipath_swqe *wqe;
  1047. enum ib_wc_status status;
  1048. unsigned long flags;
  1049. int diff;
  1050. u32 pad;
  1051. u32 aeth;
  1052. u64 val;
  1053. spin_lock_irqsave(&qp->s_lock, flags);
  1054. /* Double check we can process this now that we hold the s_lock. */
  1055. if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK))
  1056. goto ack_done;
  1057. /* Ignore invalid responses. */
  1058. if (ipath_cmp24(psn, qp->s_next_psn) >= 0)
  1059. goto ack_done;
  1060. /* Ignore duplicate responses. */
  1061. diff = ipath_cmp24(psn, qp->s_last_psn);
  1062. if (unlikely(diff <= 0)) {
  1063. /* Update credits for "ghost" ACKs */
  1064. if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
  1065. if (!header_in_data)
  1066. aeth = be32_to_cpu(ohdr->u.aeth);
  1067. else {
  1068. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1069. data += sizeof(__be32);
  1070. }
  1071. if ((aeth >> 29) == 0)
  1072. ipath_get_credit(qp, aeth);
  1073. }
  1074. goto ack_done;
  1075. }
  1076. if (unlikely(qp->s_last == qp->s_tail))
  1077. goto ack_done;
  1078. wqe = get_swqe_ptr(qp, qp->s_last);
  1079. status = IB_WC_SUCCESS;
  1080. switch (opcode) {
  1081. case OP(ACKNOWLEDGE):
  1082. case OP(ATOMIC_ACKNOWLEDGE):
  1083. case OP(RDMA_READ_RESPONSE_FIRST):
  1084. if (!header_in_data)
  1085. aeth = be32_to_cpu(ohdr->u.aeth);
  1086. else {
  1087. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1088. data += sizeof(__be32);
  1089. }
  1090. if (opcode == OP(ATOMIC_ACKNOWLEDGE)) {
  1091. if (!header_in_data) {
  1092. __be32 *p = ohdr->u.at.atomic_ack_eth;
  1093. val = ((u64) be32_to_cpu(p[0]) << 32) |
  1094. be32_to_cpu(p[1]);
  1095. } else
  1096. val = be64_to_cpu(((__be64 *) data)[0]);
  1097. } else
  1098. val = 0;
  1099. if (!do_rc_ack(qp, aeth, psn, opcode, val) ||
  1100. opcode != OP(RDMA_READ_RESPONSE_FIRST))
  1101. goto ack_done;
  1102. hdrsize += 4;
  1103. wqe = get_swqe_ptr(qp, qp->s_last);
  1104. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1105. goto ack_op_err;
  1106. qp->r_flags &= ~IPATH_R_RDMAR_SEQ;
  1107. /*
  1108. * If this is a response to a resent RDMA read, we
  1109. * have to be careful to copy the data to the right
  1110. * location.
  1111. */
  1112. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1113. wqe, psn, pmtu);
  1114. goto read_middle;
  1115. case OP(RDMA_READ_RESPONSE_MIDDLE):
  1116. /* no AETH, no ACK */
  1117. if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
  1118. dev->n_rdma_seq++;
  1119. if (qp->r_flags & IPATH_R_RDMAR_SEQ)
  1120. goto ack_done;
  1121. qp->r_flags |= IPATH_R_RDMAR_SEQ;
  1122. ipath_restart_rc(qp, qp->s_last_psn + 1);
  1123. goto ack_done;
  1124. }
  1125. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1126. goto ack_op_err;
  1127. read_middle:
  1128. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1129. goto ack_len_err;
  1130. if (unlikely(pmtu >= qp->s_rdma_read_len))
  1131. goto ack_len_err;
  1132. /* We got a response so update the timeout. */
  1133. spin_lock(&dev->pending_lock);
  1134. if (qp->s_rnr_timeout == 0 && !list_empty(&qp->timerwait))
  1135. list_move_tail(&qp->timerwait,
  1136. &dev->pending[dev->pending_index]);
  1137. spin_unlock(&dev->pending_lock);
  1138. if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
  1139. qp->s_retry = qp->s_retry_cnt;
  1140. /*
  1141. * Update the RDMA receive state but do the copy w/o
  1142. * holding the locks and blocking interrupts.
  1143. */
  1144. qp->s_rdma_read_len -= pmtu;
  1145. update_last_psn(qp, psn);
  1146. spin_unlock_irqrestore(&qp->s_lock, flags);
  1147. ipath_copy_sge(&qp->s_rdma_read_sge, data, pmtu);
  1148. goto bail;
  1149. case OP(RDMA_READ_RESPONSE_ONLY):
  1150. if (!header_in_data)
  1151. aeth = be32_to_cpu(ohdr->u.aeth);
  1152. else
  1153. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1154. if (!do_rc_ack(qp, aeth, psn, opcode, 0))
  1155. goto ack_done;
  1156. /* Get the number of bytes the message was padded by. */
  1157. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1158. /*
  1159. * Check that the data size is >= 0 && <= pmtu.
  1160. * Remember to account for the AETH header (4) and
  1161. * ICRC (4).
  1162. */
  1163. if (unlikely(tlen < (hdrsize + pad + 8)))
  1164. goto ack_len_err;
  1165. /*
  1166. * If this is a response to a resent RDMA read, we
  1167. * have to be careful to copy the data to the right
  1168. * location.
  1169. */
  1170. wqe = get_swqe_ptr(qp, qp->s_last);
  1171. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1172. wqe, psn, pmtu);
  1173. goto read_last;
  1174. case OP(RDMA_READ_RESPONSE_LAST):
  1175. /* ACKs READ req. */
  1176. if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
  1177. dev->n_rdma_seq++;
  1178. if (qp->r_flags & IPATH_R_RDMAR_SEQ)
  1179. goto ack_done;
  1180. qp->r_flags |= IPATH_R_RDMAR_SEQ;
  1181. ipath_restart_rc(qp, qp->s_last_psn + 1);
  1182. goto ack_done;
  1183. }
  1184. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1185. goto ack_op_err;
  1186. /* Get the number of bytes the message was padded by. */
  1187. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1188. /*
  1189. * Check that the data size is >= 1 && <= pmtu.
  1190. * Remember to account for the AETH header (4) and
  1191. * ICRC (4).
  1192. */
  1193. if (unlikely(tlen <= (hdrsize + pad + 8)))
  1194. goto ack_len_err;
  1195. read_last:
  1196. tlen -= hdrsize + pad + 8;
  1197. if (unlikely(tlen != qp->s_rdma_read_len))
  1198. goto ack_len_err;
  1199. if (!header_in_data)
  1200. aeth = be32_to_cpu(ohdr->u.aeth);
  1201. else {
  1202. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1203. data += sizeof(__be32);
  1204. }
  1205. ipath_copy_sge(&qp->s_rdma_read_sge, data, tlen);
  1206. (void) do_rc_ack(qp, aeth, psn,
  1207. OP(RDMA_READ_RESPONSE_LAST), 0);
  1208. goto ack_done;
  1209. }
  1210. ack_op_err:
  1211. status = IB_WC_LOC_QP_OP_ERR;
  1212. goto ack_err;
  1213. ack_len_err:
  1214. status = IB_WC_LOC_LEN_ERR;
  1215. ack_err:
  1216. ipath_send_complete(qp, wqe, status);
  1217. ipath_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1218. ack_done:
  1219. spin_unlock_irqrestore(&qp->s_lock, flags);
  1220. bail:
  1221. return;
  1222. }
  1223. /**
  1224. * ipath_rc_rcv_error - process an incoming duplicate or error RC packet
  1225. * @dev: the device this packet came in on
  1226. * @ohdr: the other headers for this packet
  1227. * @data: the packet data
  1228. * @qp: the QP for this packet
  1229. * @opcode: the opcode for this packet
  1230. * @psn: the packet sequence number for this packet
  1231. * @diff: the difference between the PSN and the expected PSN
  1232. * @header_in_data: true if part of the header data is in the data buffer
  1233. *
  1234. * This is called from ipath_rc_rcv() to process an unexpected
  1235. * incoming RC packet for the given QP.
  1236. * Called at interrupt level.
  1237. * Return 1 if no more processing is needed; otherwise return 0 to
  1238. * schedule a response to be sent.
  1239. */
  1240. static inline int ipath_rc_rcv_error(struct ipath_ibdev *dev,
  1241. struct ipath_other_headers *ohdr,
  1242. void *data,
  1243. struct ipath_qp *qp,
  1244. u32 opcode,
  1245. u32 psn,
  1246. int diff,
  1247. int header_in_data)
  1248. {
  1249. struct ipath_ack_entry *e;
  1250. u8 i, prev;
  1251. int old_req;
  1252. unsigned long flags;
  1253. if (diff > 0) {
  1254. /*
  1255. * Packet sequence error.
  1256. * A NAK will ACK earlier sends and RDMA writes.
  1257. * Don't queue the NAK if we already sent one.
  1258. */
  1259. if (!qp->r_nak_state) {
  1260. qp->r_nak_state = IB_NAK_PSN_ERROR;
  1261. /* Use the expected PSN. */
  1262. qp->r_ack_psn = qp->r_psn;
  1263. goto send_ack;
  1264. }
  1265. goto done;
  1266. }
  1267. /*
  1268. * Handle a duplicate request. Don't re-execute SEND, RDMA
  1269. * write or atomic op. Don't NAK errors, just silently drop
  1270. * the duplicate request. Note that r_sge, r_len, and
  1271. * r_rcv_len may be in use so don't modify them.
  1272. *
  1273. * We are supposed to ACK the earliest duplicate PSN but we
  1274. * can coalesce an outstanding duplicate ACK. We have to
  1275. * send the earliest so that RDMA reads can be restarted at
  1276. * the requester's expected PSN.
  1277. *
  1278. * First, find where this duplicate PSN falls within the
  1279. * ACKs previously sent.
  1280. */
  1281. psn &= IPATH_PSN_MASK;
  1282. e = NULL;
  1283. old_req = 1;
  1284. spin_lock_irqsave(&qp->s_lock, flags);
  1285. /* Double check we can process this now that we hold the s_lock. */
  1286. if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK))
  1287. goto unlock_done;
  1288. for (i = qp->r_head_ack_queue; ; i = prev) {
  1289. if (i == qp->s_tail_ack_queue)
  1290. old_req = 0;
  1291. if (i)
  1292. prev = i - 1;
  1293. else
  1294. prev = IPATH_MAX_RDMA_ATOMIC;
  1295. if (prev == qp->r_head_ack_queue) {
  1296. e = NULL;
  1297. break;
  1298. }
  1299. e = &qp->s_ack_queue[prev];
  1300. if (!e->opcode) {
  1301. e = NULL;
  1302. break;
  1303. }
  1304. if (ipath_cmp24(psn, e->psn) >= 0) {
  1305. if (prev == qp->s_tail_ack_queue)
  1306. old_req = 0;
  1307. break;
  1308. }
  1309. }
  1310. switch (opcode) {
  1311. case OP(RDMA_READ_REQUEST): {
  1312. struct ib_reth *reth;
  1313. u32 offset;
  1314. u32 len;
  1315. /*
  1316. * If we didn't find the RDMA read request in the ack queue,
  1317. * or the send tasklet is already backed up to send an
  1318. * earlier entry, we can ignore this request.
  1319. */
  1320. if (!e || e->opcode != OP(RDMA_READ_REQUEST) || old_req)
  1321. goto unlock_done;
  1322. /* RETH comes after BTH */
  1323. if (!header_in_data)
  1324. reth = &ohdr->u.rc.reth;
  1325. else {
  1326. reth = (struct ib_reth *)data;
  1327. data += sizeof(*reth);
  1328. }
  1329. /*
  1330. * Address range must be a subset of the original
  1331. * request and start on pmtu boundaries.
  1332. * We reuse the old ack_queue slot since the requester
  1333. * should not back up and request an earlier PSN for the
  1334. * same request.
  1335. */
  1336. offset = ((psn - e->psn) & IPATH_PSN_MASK) *
  1337. ib_mtu_enum_to_int(qp->path_mtu);
  1338. len = be32_to_cpu(reth->length);
  1339. if (unlikely(offset + len > e->rdma_sge.sge.sge_length))
  1340. goto unlock_done;
  1341. if (len != 0) {
  1342. u32 rkey = be32_to_cpu(reth->rkey);
  1343. u64 vaddr = be64_to_cpu(reth->vaddr);
  1344. int ok;
  1345. ok = ipath_rkey_ok(qp, &e->rdma_sge,
  1346. len, vaddr, rkey,
  1347. IB_ACCESS_REMOTE_READ);
  1348. if (unlikely(!ok))
  1349. goto unlock_done;
  1350. } else {
  1351. e->rdma_sge.sg_list = NULL;
  1352. e->rdma_sge.num_sge = 0;
  1353. e->rdma_sge.sge.mr = NULL;
  1354. e->rdma_sge.sge.vaddr = NULL;
  1355. e->rdma_sge.sge.length = 0;
  1356. e->rdma_sge.sge.sge_length = 0;
  1357. }
  1358. e->psn = psn;
  1359. qp->s_ack_state = OP(ACKNOWLEDGE);
  1360. qp->s_tail_ack_queue = prev;
  1361. break;
  1362. }
  1363. case OP(COMPARE_SWAP):
  1364. case OP(FETCH_ADD): {
  1365. /*
  1366. * If we didn't find the atomic request in the ack queue
  1367. * or the send tasklet is already backed up to send an
  1368. * earlier entry, we can ignore this request.
  1369. */
  1370. if (!e || e->opcode != (u8) opcode || old_req)
  1371. goto unlock_done;
  1372. qp->s_ack_state = OP(ACKNOWLEDGE);
  1373. qp->s_tail_ack_queue = prev;
  1374. break;
  1375. }
  1376. default:
  1377. if (old_req)
  1378. goto unlock_done;
  1379. /*
  1380. * Resend the most recent ACK if this request is
  1381. * after all the previous RDMA reads and atomics.
  1382. */
  1383. if (i == qp->r_head_ack_queue) {
  1384. spin_unlock_irqrestore(&qp->s_lock, flags);
  1385. qp->r_nak_state = 0;
  1386. qp->r_ack_psn = qp->r_psn - 1;
  1387. goto send_ack;
  1388. }
  1389. /*
  1390. * Try to send a simple ACK to work around a Mellanox bug
  1391. * which doesn't accept a RDMA read response or atomic
  1392. * response as an ACK for earlier SENDs or RDMA writes.
  1393. */
  1394. if (qp->r_head_ack_queue == qp->s_tail_ack_queue &&
  1395. !(qp->s_flags & IPATH_S_ACK_PENDING) &&
  1396. qp->s_ack_state == OP(ACKNOWLEDGE)) {
  1397. spin_unlock_irqrestore(&qp->s_lock, flags);
  1398. qp->r_nak_state = 0;
  1399. qp->r_ack_psn = qp->s_ack_queue[i].psn - 1;
  1400. goto send_ack;
  1401. }
  1402. /*
  1403. * Resend the RDMA read or atomic op which
  1404. * ACKs this duplicate request.
  1405. */
  1406. qp->s_ack_state = OP(ACKNOWLEDGE);
  1407. qp->s_tail_ack_queue = i;
  1408. break;
  1409. }
  1410. qp->r_nak_state = 0;
  1411. ipath_schedule_send(qp);
  1412. unlock_done:
  1413. spin_unlock_irqrestore(&qp->s_lock, flags);
  1414. done:
  1415. return 1;
  1416. send_ack:
  1417. return 0;
  1418. }
  1419. void ipath_rc_error(struct ipath_qp *qp, enum ib_wc_status err)
  1420. {
  1421. unsigned long flags;
  1422. int lastwqe;
  1423. spin_lock_irqsave(&qp->s_lock, flags);
  1424. lastwqe = ipath_error_qp(qp, err);
  1425. spin_unlock_irqrestore(&qp->s_lock, flags);
  1426. if (lastwqe) {
  1427. struct ib_event ev;
  1428. ev.device = qp->ibqp.device;
  1429. ev.element.qp = &qp->ibqp;
  1430. ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
  1431. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  1432. }
  1433. }
  1434. static inline void ipath_update_ack_queue(struct ipath_qp *qp, unsigned n)
  1435. {
  1436. unsigned next;
  1437. next = n + 1;
  1438. if (next > IPATH_MAX_RDMA_ATOMIC)
  1439. next = 0;
  1440. if (n == qp->s_tail_ack_queue) {
  1441. qp->s_tail_ack_queue = next;
  1442. qp->s_ack_state = OP(ACKNOWLEDGE);
  1443. }
  1444. }
  1445. /**
  1446. * ipath_rc_rcv - process an incoming RC packet
  1447. * @dev: the device this packet came in on
  1448. * @hdr: the header of this packet
  1449. * @has_grh: true if the header has a GRH
  1450. * @data: the packet data
  1451. * @tlen: the packet length
  1452. * @qp: the QP for this packet
  1453. *
  1454. * This is called from ipath_qp_rcv() to process an incoming RC packet
  1455. * for the given QP.
  1456. * Called at interrupt level.
  1457. */
  1458. void ipath_rc_rcv(struct ipath_ibdev *dev, struct ipath_ib_header *hdr,
  1459. int has_grh, void *data, u32 tlen, struct ipath_qp *qp)
  1460. {
  1461. struct ipath_other_headers *ohdr;
  1462. u32 opcode;
  1463. u32 hdrsize;
  1464. u32 psn;
  1465. u32 pad;
  1466. struct ib_wc wc;
  1467. u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
  1468. int diff;
  1469. struct ib_reth *reth;
  1470. int header_in_data;
  1471. unsigned long flags;
  1472. /* Validate the SLID. See Ch. 9.6.1.5 */
  1473. if (unlikely(be16_to_cpu(hdr->lrh[3]) != qp->remote_ah_attr.dlid))
  1474. goto done;
  1475. /* Check for GRH */
  1476. if (!has_grh) {
  1477. ohdr = &hdr->u.oth;
  1478. hdrsize = 8 + 12; /* LRH + BTH */
  1479. psn = be32_to_cpu(ohdr->bth[2]);
  1480. header_in_data = 0;
  1481. } else {
  1482. ohdr = &hdr->u.l.oth;
  1483. hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */
  1484. /*
  1485. * The header with GRH is 60 bytes and the core driver sets
  1486. * the eager header buffer size to 56 bytes so the last 4
  1487. * bytes of the BTH header (PSN) is in the data buffer.
  1488. */
  1489. header_in_data = dev->dd->ipath_rcvhdrentsize == 16;
  1490. if (header_in_data) {
  1491. psn = be32_to_cpu(((__be32 *) data)[0]);
  1492. data += sizeof(__be32);
  1493. } else
  1494. psn = be32_to_cpu(ohdr->bth[2]);
  1495. }
  1496. /*
  1497. * Process responses (ACKs) before anything else. Note that the
  1498. * packet sequence number will be for something in the send work
  1499. * queue rather than the expected receive packet sequence number.
  1500. * In other words, this QP is the requester.
  1501. */
  1502. opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
  1503. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1504. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1505. ipath_rc_rcv_resp(dev, ohdr, data, tlen, qp, opcode, psn,
  1506. hdrsize, pmtu, header_in_data);
  1507. goto done;
  1508. }
  1509. /* Compute 24 bits worth of difference. */
  1510. diff = ipath_cmp24(psn, qp->r_psn);
  1511. if (unlikely(diff)) {
  1512. if (ipath_rc_rcv_error(dev, ohdr, data, qp, opcode,
  1513. psn, diff, header_in_data))
  1514. goto done;
  1515. goto send_ack;
  1516. }
  1517. /* Check for opcode sequence errors. */
  1518. switch (qp->r_state) {
  1519. case OP(SEND_FIRST):
  1520. case OP(SEND_MIDDLE):
  1521. if (opcode == OP(SEND_MIDDLE) ||
  1522. opcode == OP(SEND_LAST) ||
  1523. opcode == OP(SEND_LAST_WITH_IMMEDIATE))
  1524. break;
  1525. goto nack_inv;
  1526. case OP(RDMA_WRITE_FIRST):
  1527. case OP(RDMA_WRITE_MIDDLE):
  1528. if (opcode == OP(RDMA_WRITE_MIDDLE) ||
  1529. opcode == OP(RDMA_WRITE_LAST) ||
  1530. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1531. break;
  1532. goto nack_inv;
  1533. default:
  1534. if (opcode == OP(SEND_MIDDLE) ||
  1535. opcode == OP(SEND_LAST) ||
  1536. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1537. opcode == OP(RDMA_WRITE_MIDDLE) ||
  1538. opcode == OP(RDMA_WRITE_LAST) ||
  1539. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1540. goto nack_inv;
  1541. /*
  1542. * Note that it is up to the requester to not send a new
  1543. * RDMA read or atomic operation before receiving an ACK
  1544. * for the previous operation.
  1545. */
  1546. break;
  1547. }
  1548. memset(&wc, 0, sizeof wc);
  1549. /* OK, process the packet. */
  1550. switch (opcode) {
  1551. case OP(SEND_FIRST):
  1552. if (!ipath_get_rwqe(qp, 0))
  1553. goto rnr_nak;
  1554. qp->r_rcv_len = 0;
  1555. /* FALLTHROUGH */
  1556. case OP(SEND_MIDDLE):
  1557. case OP(RDMA_WRITE_MIDDLE):
  1558. send_middle:
  1559. /* Check for invalid length PMTU or posted rwqe len. */
  1560. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1561. goto nack_inv;
  1562. qp->r_rcv_len += pmtu;
  1563. if (unlikely(qp->r_rcv_len > qp->r_len))
  1564. goto nack_inv;
  1565. ipath_copy_sge(&qp->r_sge, data, pmtu);
  1566. break;
  1567. case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
  1568. /* consume RWQE */
  1569. if (!ipath_get_rwqe(qp, 1))
  1570. goto rnr_nak;
  1571. goto send_last_imm;
  1572. case OP(SEND_ONLY):
  1573. case OP(SEND_ONLY_WITH_IMMEDIATE):
  1574. if (!ipath_get_rwqe(qp, 0))
  1575. goto rnr_nak;
  1576. qp->r_rcv_len = 0;
  1577. if (opcode == OP(SEND_ONLY))
  1578. goto send_last;
  1579. /* FALLTHROUGH */
  1580. case OP(SEND_LAST_WITH_IMMEDIATE):
  1581. send_last_imm:
  1582. if (header_in_data) {
  1583. wc.ex.imm_data = *(__be32 *) data;
  1584. data += sizeof(__be32);
  1585. } else {
  1586. /* Immediate data comes after BTH */
  1587. wc.ex.imm_data = ohdr->u.imm_data;
  1588. }
  1589. hdrsize += 4;
  1590. wc.wc_flags = IB_WC_WITH_IMM;
  1591. /* FALLTHROUGH */
  1592. case OP(SEND_LAST):
  1593. case OP(RDMA_WRITE_LAST):
  1594. send_last:
  1595. /* Get the number of bytes the message was padded by. */
  1596. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1597. /* Check for invalid length. */
  1598. /* XXX LAST len should be >= 1 */
  1599. if (unlikely(tlen < (hdrsize + pad + 4)))
  1600. goto nack_inv;
  1601. /* Don't count the CRC. */
  1602. tlen -= (hdrsize + pad + 4);
  1603. wc.byte_len = tlen + qp->r_rcv_len;
  1604. if (unlikely(wc.byte_len > qp->r_len))
  1605. goto nack_inv;
  1606. ipath_copy_sge(&qp->r_sge, data, tlen);
  1607. qp->r_msn++;
  1608. if (!test_and_clear_bit(IPATH_R_WRID_VALID, &qp->r_aflags))
  1609. break;
  1610. wc.wr_id = qp->r_wr_id;
  1611. wc.status = IB_WC_SUCCESS;
  1612. if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
  1613. opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
  1614. wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
  1615. else
  1616. wc.opcode = IB_WC_RECV;
  1617. wc.qp = &qp->ibqp;
  1618. wc.src_qp = qp->remote_qpn;
  1619. wc.slid = qp->remote_ah_attr.dlid;
  1620. wc.sl = qp->remote_ah_attr.sl;
  1621. /* Signal completion event if the solicited bit is set. */
  1622. ipath_cq_enter(to_icq(qp->ibqp.recv_cq), &wc,
  1623. (ohdr->bth[0] &
  1624. cpu_to_be32(1 << 23)) != 0);
  1625. break;
  1626. case OP(RDMA_WRITE_FIRST):
  1627. case OP(RDMA_WRITE_ONLY):
  1628. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  1629. if (unlikely(!(qp->qp_access_flags &
  1630. IB_ACCESS_REMOTE_WRITE)))
  1631. goto nack_inv;
  1632. /* consume RWQE */
  1633. /* RETH comes after BTH */
  1634. if (!header_in_data)
  1635. reth = &ohdr->u.rc.reth;
  1636. else {
  1637. reth = (struct ib_reth *)data;
  1638. data += sizeof(*reth);
  1639. }
  1640. hdrsize += sizeof(*reth);
  1641. qp->r_len = be32_to_cpu(reth->length);
  1642. qp->r_rcv_len = 0;
  1643. if (qp->r_len != 0) {
  1644. u32 rkey = be32_to_cpu(reth->rkey);
  1645. u64 vaddr = be64_to_cpu(reth->vaddr);
  1646. int ok;
  1647. /* Check rkey & NAK */
  1648. ok = ipath_rkey_ok(qp, &qp->r_sge,
  1649. qp->r_len, vaddr, rkey,
  1650. IB_ACCESS_REMOTE_WRITE);
  1651. if (unlikely(!ok))
  1652. goto nack_acc;
  1653. } else {
  1654. qp->r_sge.sg_list = NULL;
  1655. qp->r_sge.sge.mr = NULL;
  1656. qp->r_sge.sge.vaddr = NULL;
  1657. qp->r_sge.sge.length = 0;
  1658. qp->r_sge.sge.sge_length = 0;
  1659. }
  1660. if (opcode == OP(RDMA_WRITE_FIRST))
  1661. goto send_middle;
  1662. else if (opcode == OP(RDMA_WRITE_ONLY))
  1663. goto send_last;
  1664. if (!ipath_get_rwqe(qp, 1))
  1665. goto rnr_nak;
  1666. goto send_last_imm;
  1667. case OP(RDMA_READ_REQUEST): {
  1668. struct ipath_ack_entry *e;
  1669. u32 len;
  1670. u8 next;
  1671. if (unlikely(!(qp->qp_access_flags &
  1672. IB_ACCESS_REMOTE_READ)))
  1673. goto nack_inv;
  1674. next = qp->r_head_ack_queue + 1;
  1675. if (next > IPATH_MAX_RDMA_ATOMIC)
  1676. next = 0;
  1677. spin_lock_irqsave(&qp->s_lock, flags);
  1678. /* Double check we can process this while holding the s_lock. */
  1679. if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK))
  1680. goto unlock;
  1681. if (unlikely(next == qp->s_tail_ack_queue)) {
  1682. if (!qp->s_ack_queue[next].sent)
  1683. goto nack_inv_unlck;
  1684. ipath_update_ack_queue(qp, next);
  1685. }
  1686. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  1687. /* RETH comes after BTH */
  1688. if (!header_in_data)
  1689. reth = &ohdr->u.rc.reth;
  1690. else {
  1691. reth = (struct ib_reth *)data;
  1692. data += sizeof(*reth);
  1693. }
  1694. len = be32_to_cpu(reth->length);
  1695. if (len) {
  1696. u32 rkey = be32_to_cpu(reth->rkey);
  1697. u64 vaddr = be64_to_cpu(reth->vaddr);
  1698. int ok;
  1699. /* Check rkey & NAK */
  1700. ok = ipath_rkey_ok(qp, &e->rdma_sge, len, vaddr,
  1701. rkey, IB_ACCESS_REMOTE_READ);
  1702. if (unlikely(!ok))
  1703. goto nack_acc_unlck;
  1704. /*
  1705. * Update the next expected PSN. We add 1 later
  1706. * below, so only add the remainder here.
  1707. */
  1708. if (len > pmtu)
  1709. qp->r_psn += (len - 1) / pmtu;
  1710. } else {
  1711. e->rdma_sge.sg_list = NULL;
  1712. e->rdma_sge.num_sge = 0;
  1713. e->rdma_sge.sge.mr = NULL;
  1714. e->rdma_sge.sge.vaddr = NULL;
  1715. e->rdma_sge.sge.length = 0;
  1716. e->rdma_sge.sge.sge_length = 0;
  1717. }
  1718. e->opcode = opcode;
  1719. e->sent = 0;
  1720. e->psn = psn;
  1721. /*
  1722. * We need to increment the MSN here instead of when we
  1723. * finish sending the result since a duplicate request would
  1724. * increment it more than once.
  1725. */
  1726. qp->r_msn++;
  1727. qp->r_psn++;
  1728. qp->r_state = opcode;
  1729. qp->r_nak_state = 0;
  1730. qp->r_head_ack_queue = next;
  1731. /* Schedule the send tasklet. */
  1732. ipath_schedule_send(qp);
  1733. goto unlock;
  1734. }
  1735. case OP(COMPARE_SWAP):
  1736. case OP(FETCH_ADD): {
  1737. struct ib_atomic_eth *ateth;
  1738. struct ipath_ack_entry *e;
  1739. u64 vaddr;
  1740. atomic64_t *maddr;
  1741. u64 sdata;
  1742. u32 rkey;
  1743. u8 next;
  1744. if (unlikely(!(qp->qp_access_flags &
  1745. IB_ACCESS_REMOTE_ATOMIC)))
  1746. goto nack_inv;
  1747. next = qp->r_head_ack_queue + 1;
  1748. if (next > IPATH_MAX_RDMA_ATOMIC)
  1749. next = 0;
  1750. spin_lock_irqsave(&qp->s_lock, flags);
  1751. /* Double check we can process this while holding the s_lock. */
  1752. if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK))
  1753. goto unlock;
  1754. if (unlikely(next == qp->s_tail_ack_queue)) {
  1755. if (!qp->s_ack_queue[next].sent)
  1756. goto nack_inv_unlck;
  1757. ipath_update_ack_queue(qp, next);
  1758. }
  1759. if (!header_in_data)
  1760. ateth = &ohdr->u.atomic_eth;
  1761. else
  1762. ateth = (struct ib_atomic_eth *)data;
  1763. vaddr = ((u64) be32_to_cpu(ateth->vaddr[0]) << 32) |
  1764. be32_to_cpu(ateth->vaddr[1]);
  1765. if (unlikely(vaddr & (sizeof(u64) - 1)))
  1766. goto nack_inv_unlck;
  1767. rkey = be32_to_cpu(ateth->rkey);
  1768. /* Check rkey & NAK */
  1769. if (unlikely(!ipath_rkey_ok(qp, &qp->r_sge,
  1770. sizeof(u64), vaddr, rkey,
  1771. IB_ACCESS_REMOTE_ATOMIC)))
  1772. goto nack_acc_unlck;
  1773. /* Perform atomic OP and save result. */
  1774. maddr = (atomic64_t *) qp->r_sge.sge.vaddr;
  1775. sdata = be64_to_cpu(ateth->swap_data);
  1776. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  1777. e->atomic_data = (opcode == OP(FETCH_ADD)) ?
  1778. (u64) atomic64_add_return(sdata, maddr) - sdata :
  1779. (u64) cmpxchg((u64 *) qp->r_sge.sge.vaddr,
  1780. be64_to_cpu(ateth->compare_data),
  1781. sdata);
  1782. e->opcode = opcode;
  1783. e->sent = 0;
  1784. e->psn = psn & IPATH_PSN_MASK;
  1785. qp->r_msn++;
  1786. qp->r_psn++;
  1787. qp->r_state = opcode;
  1788. qp->r_nak_state = 0;
  1789. qp->r_head_ack_queue = next;
  1790. /* Schedule the send tasklet. */
  1791. ipath_schedule_send(qp);
  1792. goto unlock;
  1793. }
  1794. default:
  1795. /* NAK unknown opcodes. */
  1796. goto nack_inv;
  1797. }
  1798. qp->r_psn++;
  1799. qp->r_state = opcode;
  1800. qp->r_ack_psn = psn;
  1801. qp->r_nak_state = 0;
  1802. /* Send an ACK if requested or required. */
  1803. if (psn & (1 << 31))
  1804. goto send_ack;
  1805. goto done;
  1806. rnr_nak:
  1807. qp->r_nak_state = IB_RNR_NAK | qp->r_min_rnr_timer;
  1808. qp->r_ack_psn = qp->r_psn;
  1809. goto send_ack;
  1810. nack_inv_unlck:
  1811. spin_unlock_irqrestore(&qp->s_lock, flags);
  1812. nack_inv:
  1813. ipath_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  1814. qp->r_nak_state = IB_NAK_INVALID_REQUEST;
  1815. qp->r_ack_psn = qp->r_psn;
  1816. goto send_ack;
  1817. nack_acc_unlck:
  1818. spin_unlock_irqrestore(&qp->s_lock, flags);
  1819. nack_acc:
  1820. ipath_rc_error(qp, IB_WC_LOC_PROT_ERR);
  1821. qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
  1822. qp->r_ack_psn = qp->r_psn;
  1823. send_ack:
  1824. send_rc_ack(qp);
  1825. goto done;
  1826. unlock:
  1827. spin_unlock_irqrestore(&qp->s_lock, flags);
  1828. done:
  1829. return;
  1830. }