ipath_diag.c 15 KB

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  1. /*
  2. * Copyright (c) 2006, 2007, 2008 QLogic Corporation. All rights reserved.
  3. * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. /*
  34. * This file contains support for diagnostic functions. It is accessed by
  35. * opening the ipath_diag device, normally minor number 129. Diagnostic use
  36. * of the InfiniPath chip may render the chip or board unusable until the
  37. * driver is unloaded, or in some cases, until the system is rebooted.
  38. *
  39. * Accesses to the chip through this interface are not similar to going
  40. * through the /sys/bus/pci resource mmap interface.
  41. */
  42. #include <linux/io.h>
  43. #include <linux/pci.h>
  44. #include <linux/vmalloc.h>
  45. #include <linux/fs.h>
  46. #include <linux/export.h>
  47. #include <asm/uaccess.h>
  48. #include "ipath_kernel.h"
  49. #include "ipath_common.h"
  50. int ipath_diag_inuse;
  51. static int diag_set_link;
  52. static int ipath_diag_open(struct inode *in, struct file *fp);
  53. static int ipath_diag_release(struct inode *in, struct file *fp);
  54. static ssize_t ipath_diag_read(struct file *fp, char __user *data,
  55. size_t count, loff_t *off);
  56. static ssize_t ipath_diag_write(struct file *fp, const char __user *data,
  57. size_t count, loff_t *off);
  58. static const struct file_operations diag_file_ops = {
  59. .owner = THIS_MODULE,
  60. .write = ipath_diag_write,
  61. .read = ipath_diag_read,
  62. .open = ipath_diag_open,
  63. .release = ipath_diag_release,
  64. .llseek = default_llseek,
  65. };
  66. static ssize_t ipath_diagpkt_write(struct file *fp,
  67. const char __user *data,
  68. size_t count, loff_t *off);
  69. static const struct file_operations diagpkt_file_ops = {
  70. .owner = THIS_MODULE,
  71. .write = ipath_diagpkt_write,
  72. .llseek = noop_llseek,
  73. };
  74. static atomic_t diagpkt_count = ATOMIC_INIT(0);
  75. static struct cdev *diagpkt_cdev;
  76. static struct device *diagpkt_dev;
  77. int ipath_diag_add(struct ipath_devdata *dd)
  78. {
  79. char name[16];
  80. int ret = 0;
  81. if (atomic_inc_return(&diagpkt_count) == 1) {
  82. ret = ipath_cdev_init(IPATH_DIAGPKT_MINOR,
  83. "ipath_diagpkt", &diagpkt_file_ops,
  84. &diagpkt_cdev, &diagpkt_dev);
  85. if (ret) {
  86. ipath_dev_err(dd, "Couldn't create ipath_diagpkt "
  87. "device: %d", ret);
  88. goto done;
  89. }
  90. }
  91. snprintf(name, sizeof(name), "ipath_diag%d", dd->ipath_unit);
  92. ret = ipath_cdev_init(IPATH_DIAG_MINOR_BASE + dd->ipath_unit, name,
  93. &diag_file_ops, &dd->diag_cdev,
  94. &dd->diag_dev);
  95. if (ret)
  96. ipath_dev_err(dd, "Couldn't create %s device: %d",
  97. name, ret);
  98. done:
  99. return ret;
  100. }
  101. void ipath_diag_remove(struct ipath_devdata *dd)
  102. {
  103. if (atomic_dec_and_test(&diagpkt_count))
  104. ipath_cdev_cleanup(&diagpkt_cdev, &diagpkt_dev);
  105. ipath_cdev_cleanup(&dd->diag_cdev, &dd->diag_dev);
  106. }
  107. /**
  108. * ipath_read_umem64 - read a 64-bit quantity from the chip into user space
  109. * @dd: the infinipath device
  110. * @uaddr: the location to store the data in user memory
  111. * @caddr: the source chip address (full pointer, not offset)
  112. * @count: number of bytes to copy (multiple of 32 bits)
  113. *
  114. * This function also localizes all chip memory accesses.
  115. * The copy should be written such that we read full cacheline packets
  116. * from the chip. This is usually used for a single qword
  117. *
  118. * NOTE: This assumes the chip address is 64-bit aligned.
  119. */
  120. static int ipath_read_umem64(struct ipath_devdata *dd, void __user *uaddr,
  121. const void __iomem *caddr, size_t count)
  122. {
  123. const u64 __iomem *reg_addr = caddr;
  124. const u64 __iomem *reg_end = reg_addr + (count / sizeof(u64));
  125. int ret;
  126. /* not very efficient, but it works for now */
  127. if (reg_addr < dd->ipath_kregbase || reg_end > dd->ipath_kregend) {
  128. ret = -EINVAL;
  129. goto bail;
  130. }
  131. while (reg_addr < reg_end) {
  132. u64 data = readq(reg_addr);
  133. if (copy_to_user(uaddr, &data, sizeof(u64))) {
  134. ret = -EFAULT;
  135. goto bail;
  136. }
  137. reg_addr++;
  138. uaddr += sizeof(u64);
  139. }
  140. ret = 0;
  141. bail:
  142. return ret;
  143. }
  144. /**
  145. * ipath_write_umem64 - write a 64-bit quantity to the chip from user space
  146. * @dd: the infinipath device
  147. * @caddr: the destination chip address (full pointer, not offset)
  148. * @uaddr: the source of the data in user memory
  149. * @count: the number of bytes to copy (multiple of 32 bits)
  150. *
  151. * This is usually used for a single qword
  152. * NOTE: This assumes the chip address is 64-bit aligned.
  153. */
  154. static int ipath_write_umem64(struct ipath_devdata *dd, void __iomem *caddr,
  155. const void __user *uaddr, size_t count)
  156. {
  157. u64 __iomem *reg_addr = caddr;
  158. const u64 __iomem *reg_end = reg_addr + (count / sizeof(u64));
  159. int ret;
  160. /* not very efficient, but it works for now */
  161. if (reg_addr < dd->ipath_kregbase || reg_end > dd->ipath_kregend) {
  162. ret = -EINVAL;
  163. goto bail;
  164. }
  165. while (reg_addr < reg_end) {
  166. u64 data;
  167. if (copy_from_user(&data, uaddr, sizeof(data))) {
  168. ret = -EFAULT;
  169. goto bail;
  170. }
  171. writeq(data, reg_addr);
  172. reg_addr++;
  173. uaddr += sizeof(u64);
  174. }
  175. ret = 0;
  176. bail:
  177. return ret;
  178. }
  179. /**
  180. * ipath_read_umem32 - read a 32-bit quantity from the chip into user space
  181. * @dd: the infinipath device
  182. * @uaddr: the location to store the data in user memory
  183. * @caddr: the source chip address (full pointer, not offset)
  184. * @count: number of bytes to copy
  185. *
  186. * read 32 bit values, not 64 bit; for memories that only
  187. * support 32 bit reads; usually a single dword.
  188. */
  189. static int ipath_read_umem32(struct ipath_devdata *dd, void __user *uaddr,
  190. const void __iomem *caddr, size_t count)
  191. {
  192. const u32 __iomem *reg_addr = caddr;
  193. const u32 __iomem *reg_end = reg_addr + (count / sizeof(u32));
  194. int ret;
  195. if (reg_addr < (u32 __iomem *) dd->ipath_kregbase ||
  196. reg_end > (u32 __iomem *) dd->ipath_kregend) {
  197. ret = -EINVAL;
  198. goto bail;
  199. }
  200. /* not very efficient, but it works for now */
  201. while (reg_addr < reg_end) {
  202. u32 data = readl(reg_addr);
  203. if (copy_to_user(uaddr, &data, sizeof(data))) {
  204. ret = -EFAULT;
  205. goto bail;
  206. }
  207. reg_addr++;
  208. uaddr += sizeof(u32);
  209. }
  210. ret = 0;
  211. bail:
  212. return ret;
  213. }
  214. /**
  215. * ipath_write_umem32 - write a 32-bit quantity to the chip from user space
  216. * @dd: the infinipath device
  217. * @caddr: the destination chip address (full pointer, not offset)
  218. * @uaddr: the source of the data in user memory
  219. * @count: number of bytes to copy
  220. *
  221. * write 32 bit values, not 64 bit; for memories that only
  222. * support 32 bit write; usually a single dword.
  223. */
  224. static int ipath_write_umem32(struct ipath_devdata *dd, void __iomem *caddr,
  225. const void __user *uaddr, size_t count)
  226. {
  227. u32 __iomem *reg_addr = caddr;
  228. const u32 __iomem *reg_end = reg_addr + (count / sizeof(u32));
  229. int ret;
  230. if (reg_addr < (u32 __iomem *) dd->ipath_kregbase ||
  231. reg_end > (u32 __iomem *) dd->ipath_kregend) {
  232. ret = -EINVAL;
  233. goto bail;
  234. }
  235. while (reg_addr < reg_end) {
  236. u32 data;
  237. if (copy_from_user(&data, uaddr, sizeof(data))) {
  238. ret = -EFAULT;
  239. goto bail;
  240. }
  241. writel(data, reg_addr);
  242. reg_addr++;
  243. uaddr += sizeof(u32);
  244. }
  245. ret = 0;
  246. bail:
  247. return ret;
  248. }
  249. static int ipath_diag_open(struct inode *in, struct file *fp)
  250. {
  251. int unit = iminor(in) - IPATH_DIAG_MINOR_BASE;
  252. struct ipath_devdata *dd;
  253. int ret;
  254. mutex_lock(&ipath_mutex);
  255. if (ipath_diag_inuse) {
  256. ret = -EBUSY;
  257. goto bail;
  258. }
  259. dd = ipath_lookup(unit);
  260. if (dd == NULL || !(dd->ipath_flags & IPATH_PRESENT) ||
  261. !dd->ipath_kregbase) {
  262. ret = -ENODEV;
  263. goto bail;
  264. }
  265. fp->private_data = dd;
  266. ipath_diag_inuse = -2;
  267. diag_set_link = 0;
  268. ret = 0;
  269. /* Only expose a way to reset the device if we
  270. make it into diag mode. */
  271. ipath_expose_reset(&dd->pcidev->dev);
  272. bail:
  273. mutex_unlock(&ipath_mutex);
  274. return ret;
  275. }
  276. /**
  277. * ipath_diagpkt_write - write an IB packet
  278. * @fp: the diag data device file pointer
  279. * @data: ipath_diag_pkt structure saying where to get the packet
  280. * @count: size of data to write
  281. * @off: unused by this code
  282. */
  283. static ssize_t ipath_diagpkt_write(struct file *fp,
  284. const char __user *data,
  285. size_t count, loff_t *off)
  286. {
  287. u32 __iomem *piobuf;
  288. u32 plen, pbufn, maxlen_reserve;
  289. struct ipath_diag_pkt odp;
  290. struct ipath_diag_xpkt dp;
  291. u32 *tmpbuf = NULL;
  292. struct ipath_devdata *dd;
  293. ssize_t ret = 0;
  294. u64 val;
  295. u32 l_state, lt_state; /* LinkState, LinkTrainingState */
  296. if (count == sizeof(dp)) {
  297. if (copy_from_user(&dp, data, sizeof(dp))) {
  298. ret = -EFAULT;
  299. goto bail;
  300. }
  301. } else if (count == sizeof(odp)) {
  302. if (copy_from_user(&odp, data, sizeof(odp))) {
  303. ret = -EFAULT;
  304. goto bail;
  305. }
  306. dp.len = odp.len;
  307. dp.unit = odp.unit;
  308. dp.data = odp.data;
  309. dp.pbc_wd = 0;
  310. } else {
  311. ret = -EINVAL;
  312. goto bail;
  313. }
  314. /* send count must be an exact number of dwords */
  315. if (dp.len & 3) {
  316. ret = -EINVAL;
  317. goto bail;
  318. }
  319. plen = dp.len >> 2;
  320. dd = ipath_lookup(dp.unit);
  321. if (!dd || !(dd->ipath_flags & IPATH_PRESENT) ||
  322. !dd->ipath_kregbase) {
  323. ipath_cdbg(VERBOSE, "illegal unit %u for diag data send\n",
  324. dp.unit);
  325. ret = -ENODEV;
  326. goto bail;
  327. }
  328. if (ipath_diag_inuse && !diag_set_link &&
  329. !(dd->ipath_flags & IPATH_LINKACTIVE)) {
  330. diag_set_link = 1;
  331. ipath_cdbg(VERBOSE, "Trying to set to set link active for "
  332. "diag pkt\n");
  333. ipath_set_linkstate(dd, IPATH_IB_LINKARM);
  334. ipath_set_linkstate(dd, IPATH_IB_LINKACTIVE);
  335. }
  336. if (!(dd->ipath_flags & IPATH_INITTED)) {
  337. /* no hardware, freeze, etc. */
  338. ipath_cdbg(VERBOSE, "unit %u not usable\n", dd->ipath_unit);
  339. ret = -ENODEV;
  340. goto bail;
  341. }
  342. /*
  343. * Want to skip check for l_state if using custom PBC,
  344. * because we might be trying to force an SM packet out.
  345. * first-cut, skip _all_ state checking in that case.
  346. */
  347. val = ipath_ib_state(dd, dd->ipath_lastibcstat);
  348. lt_state = ipath_ib_linktrstate(dd, dd->ipath_lastibcstat);
  349. l_state = ipath_ib_linkstate(dd, dd->ipath_lastibcstat);
  350. if (!dp.pbc_wd && (lt_state != INFINIPATH_IBCS_LT_STATE_LINKUP ||
  351. (val != dd->ib_init && val != dd->ib_arm &&
  352. val != dd->ib_active))) {
  353. ipath_cdbg(VERBOSE, "unit %u not ready (state %llx)\n",
  354. dd->ipath_unit, (unsigned long long) val);
  355. ret = -EINVAL;
  356. goto bail;
  357. }
  358. /*
  359. * need total length before first word written, plus 2 Dwords. One Dword
  360. * is for padding so we get the full user data when not aligned on
  361. * a word boundary. The other Dword is to make sure we have room for the
  362. * ICRC which gets tacked on later.
  363. */
  364. maxlen_reserve = 2 * sizeof(u32);
  365. if (dp.len > dd->ipath_ibmaxlen - maxlen_reserve) {
  366. ipath_dbg("Pkt len 0x%x > ibmaxlen %x\n",
  367. dp.len, dd->ipath_ibmaxlen);
  368. ret = -EINVAL;
  369. goto bail;
  370. }
  371. plen = sizeof(u32) + dp.len;
  372. tmpbuf = vmalloc(plen);
  373. if (!tmpbuf) {
  374. dev_info(&dd->pcidev->dev, "Unable to allocate tmp buffer, "
  375. "failing\n");
  376. ret = -ENOMEM;
  377. goto bail;
  378. }
  379. if (copy_from_user(tmpbuf,
  380. (const void __user *) (unsigned long) dp.data,
  381. dp.len)) {
  382. ret = -EFAULT;
  383. goto bail;
  384. }
  385. plen >>= 2; /* in dwords */
  386. piobuf = ipath_getpiobuf(dd, plen, &pbufn);
  387. if (!piobuf) {
  388. ipath_cdbg(VERBOSE, "No PIO buffers avail unit for %u\n",
  389. dd->ipath_unit);
  390. ret = -EBUSY;
  391. goto bail;
  392. }
  393. /* disarm it just to be extra sure */
  394. ipath_disarm_piobufs(dd, pbufn, 1);
  395. if (ipath_debug & __IPATH_PKTDBG)
  396. ipath_cdbg(VERBOSE, "unit %u 0x%x+1w pio%d\n",
  397. dd->ipath_unit, plen - 1, pbufn);
  398. if (dp.pbc_wd == 0)
  399. dp.pbc_wd = plen;
  400. writeq(dp.pbc_wd, piobuf);
  401. /*
  402. * Copy all by the trigger word, then flush, so it's written
  403. * to chip before trigger word, then write trigger word, then
  404. * flush again, so packet is sent.
  405. */
  406. if (dd->ipath_flags & IPATH_PIO_FLUSH_WC) {
  407. ipath_flush_wc();
  408. __iowrite32_copy(piobuf + 2, tmpbuf, plen - 1);
  409. ipath_flush_wc();
  410. __raw_writel(tmpbuf[plen - 1], piobuf + plen + 1);
  411. } else
  412. __iowrite32_copy(piobuf + 2, tmpbuf, plen);
  413. ipath_flush_wc();
  414. ret = sizeof(dp);
  415. bail:
  416. vfree(tmpbuf);
  417. return ret;
  418. }
  419. static int ipath_diag_release(struct inode *in, struct file *fp)
  420. {
  421. mutex_lock(&ipath_mutex);
  422. ipath_diag_inuse = 0;
  423. fp->private_data = NULL;
  424. mutex_unlock(&ipath_mutex);
  425. return 0;
  426. }
  427. static ssize_t ipath_diag_read(struct file *fp, char __user *data,
  428. size_t count, loff_t *off)
  429. {
  430. struct ipath_devdata *dd = fp->private_data;
  431. void __iomem *kreg_base;
  432. ssize_t ret;
  433. kreg_base = dd->ipath_kregbase;
  434. if (count == 0)
  435. ret = 0;
  436. else if ((count % 4) || (*off % 4))
  437. /* address or length is not 32-bit aligned, hence invalid */
  438. ret = -EINVAL;
  439. else if (ipath_diag_inuse < 1 && (*off || count != 8))
  440. ret = -EINVAL; /* prevent cat /dev/ipath_diag* */
  441. else if ((count % 8) || (*off % 8))
  442. /* address or length not 64-bit aligned; do 32-bit reads */
  443. ret = ipath_read_umem32(dd, data, kreg_base + *off, count);
  444. else
  445. ret = ipath_read_umem64(dd, data, kreg_base + *off, count);
  446. if (ret >= 0) {
  447. *off += count;
  448. ret = count;
  449. if (ipath_diag_inuse == -2)
  450. ipath_diag_inuse++;
  451. }
  452. return ret;
  453. }
  454. static ssize_t ipath_diag_write(struct file *fp, const char __user *data,
  455. size_t count, loff_t *off)
  456. {
  457. struct ipath_devdata *dd = fp->private_data;
  458. void __iomem *kreg_base;
  459. ssize_t ret;
  460. kreg_base = dd->ipath_kregbase;
  461. if (count == 0)
  462. ret = 0;
  463. else if ((count % 4) || (*off % 4))
  464. /* address or length is not 32-bit aligned, hence invalid */
  465. ret = -EINVAL;
  466. else if ((ipath_diag_inuse == -1 && (*off || count != 8)) ||
  467. ipath_diag_inuse == -2) /* read qw off 0, write qw off 0 */
  468. ret = -EINVAL; /* before any other write allowed */
  469. else if ((count % 8) || (*off % 8))
  470. /* address or length not 64-bit aligned; do 32-bit writes */
  471. ret = ipath_write_umem32(dd, kreg_base + *off, data, count);
  472. else
  473. ret = ipath_write_umem64(dd, kreg_base + *off, data, count);
  474. if (ret >= 0) {
  475. *off += count;
  476. ret = count;
  477. if (ipath_diag_inuse == -1)
  478. ipath_diag_inuse = 1; /* all read/write OK now */
  479. }
  480. return ret;
  481. }