ehca_mrmw.c 74 KB

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  1. /*
  2. * IBM eServer eHCA Infiniband device driver for Linux on POWER
  3. *
  4. * MR/MW functions
  5. *
  6. * Authors: Dietmar Decker <ddecker@de.ibm.com>
  7. * Christoph Raisch <raisch@de.ibm.com>
  8. * Hoang-Nam Nguyen <hnguyen@de.ibm.com>
  9. *
  10. * Copyright (c) 2005 IBM Corporation
  11. *
  12. * All rights reserved.
  13. *
  14. * This source code is distributed under a dual license of GPL v2.0 and OpenIB
  15. * BSD.
  16. *
  17. * OpenIB BSD License
  18. *
  19. * Redistribution and use in source and binary forms, with or without
  20. * modification, are permitted provided that the following conditions are met:
  21. *
  22. * Redistributions of source code must retain the above copyright notice, this
  23. * list of conditions and the following disclaimer.
  24. *
  25. * Redistributions in binary form must reproduce the above copyright notice,
  26. * this list of conditions and the following disclaimer in the documentation
  27. * and/or other materials
  28. * provided with the distribution.
  29. *
  30. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  31. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  32. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  33. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  34. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  35. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  36. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  37. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  38. * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  39. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  40. * POSSIBILITY OF SUCH DAMAGE.
  41. */
  42. #include <linux/slab.h>
  43. #include <rdma/ib_umem.h>
  44. #include "ehca_iverbs.h"
  45. #include "ehca_mrmw.h"
  46. #include "hcp_if.h"
  47. #include "hipz_hw.h"
  48. #define NUM_CHUNKS(length, chunk_size) \
  49. (((length) + (chunk_size - 1)) / (chunk_size))
  50. /* max number of rpages (per hcall register_rpages) */
  51. #define MAX_RPAGES 512
  52. /* DMEM toleration management */
  53. #define EHCA_SECTSHIFT SECTION_SIZE_BITS
  54. #define EHCA_SECTSIZE (1UL << EHCA_SECTSHIFT)
  55. #define EHCA_HUGEPAGESHIFT 34
  56. #define EHCA_HUGEPAGE_SIZE (1UL << EHCA_HUGEPAGESHIFT)
  57. #define EHCA_HUGEPAGE_PFN_MASK ((EHCA_HUGEPAGE_SIZE - 1) >> PAGE_SHIFT)
  58. #define EHCA_INVAL_ADDR 0xFFFFFFFFFFFFFFFFULL
  59. #define EHCA_DIR_INDEX_SHIFT 13 /* 8k Entries in 64k block */
  60. #define EHCA_TOP_INDEX_SHIFT (EHCA_DIR_INDEX_SHIFT * 2)
  61. #define EHCA_MAP_ENTRIES (1 << EHCA_DIR_INDEX_SHIFT)
  62. #define EHCA_TOP_MAP_SIZE (0x10000) /* currently fixed map size */
  63. #define EHCA_DIR_MAP_SIZE (0x10000)
  64. #define EHCA_ENT_MAP_SIZE (0x10000)
  65. #define EHCA_INDEX_MASK (EHCA_MAP_ENTRIES - 1)
  66. static unsigned long ehca_mr_len;
  67. /*
  68. * Memory map data structures
  69. */
  70. struct ehca_dir_bmap {
  71. u64 ent[EHCA_MAP_ENTRIES];
  72. };
  73. struct ehca_top_bmap {
  74. struct ehca_dir_bmap *dir[EHCA_MAP_ENTRIES];
  75. };
  76. struct ehca_bmap {
  77. struct ehca_top_bmap *top[EHCA_MAP_ENTRIES];
  78. };
  79. static struct ehca_bmap *ehca_bmap;
  80. static struct kmem_cache *mr_cache;
  81. static struct kmem_cache *mw_cache;
  82. enum ehca_mr_pgsize {
  83. EHCA_MR_PGSIZE4K = 0x1000L,
  84. EHCA_MR_PGSIZE64K = 0x10000L,
  85. EHCA_MR_PGSIZE1M = 0x100000L,
  86. EHCA_MR_PGSIZE16M = 0x1000000L
  87. };
  88. #define EHCA_MR_PGSHIFT4K 12
  89. #define EHCA_MR_PGSHIFT64K 16
  90. #define EHCA_MR_PGSHIFT1M 20
  91. #define EHCA_MR_PGSHIFT16M 24
  92. static u64 ehca_map_vaddr(void *caddr);
  93. static u32 ehca_encode_hwpage_size(u32 pgsize)
  94. {
  95. int log = ilog2(pgsize);
  96. WARN_ON(log < 12 || log > 24 || log & 3);
  97. return (log - 12) / 4;
  98. }
  99. static u64 ehca_get_max_hwpage_size(struct ehca_shca *shca)
  100. {
  101. return rounddown_pow_of_two(shca->hca_cap_mr_pgsize);
  102. }
  103. static struct ehca_mr *ehca_mr_new(void)
  104. {
  105. struct ehca_mr *me;
  106. me = kmem_cache_zalloc(mr_cache, GFP_KERNEL);
  107. if (me)
  108. spin_lock_init(&me->mrlock);
  109. else
  110. ehca_gen_err("alloc failed");
  111. return me;
  112. }
  113. static void ehca_mr_delete(struct ehca_mr *me)
  114. {
  115. kmem_cache_free(mr_cache, me);
  116. }
  117. static struct ehca_mw *ehca_mw_new(void)
  118. {
  119. struct ehca_mw *me;
  120. me = kmem_cache_zalloc(mw_cache, GFP_KERNEL);
  121. if (me)
  122. spin_lock_init(&me->mwlock);
  123. else
  124. ehca_gen_err("alloc failed");
  125. return me;
  126. }
  127. static void ehca_mw_delete(struct ehca_mw *me)
  128. {
  129. kmem_cache_free(mw_cache, me);
  130. }
  131. /*----------------------------------------------------------------------*/
  132. struct ib_mr *ehca_get_dma_mr(struct ib_pd *pd, int mr_access_flags)
  133. {
  134. struct ib_mr *ib_mr;
  135. int ret;
  136. struct ehca_mr *e_maxmr;
  137. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  138. struct ehca_shca *shca =
  139. container_of(pd->device, struct ehca_shca, ib_device);
  140. if (shca->maxmr) {
  141. e_maxmr = ehca_mr_new();
  142. if (!e_maxmr) {
  143. ehca_err(&shca->ib_device, "out of memory");
  144. ib_mr = ERR_PTR(-ENOMEM);
  145. goto get_dma_mr_exit0;
  146. }
  147. ret = ehca_reg_maxmr(shca, e_maxmr,
  148. (void *)ehca_map_vaddr((void *)(KERNELBASE + PHYSICAL_START)),
  149. mr_access_flags, e_pd,
  150. &e_maxmr->ib.ib_mr.lkey,
  151. &e_maxmr->ib.ib_mr.rkey);
  152. if (ret) {
  153. ehca_mr_delete(e_maxmr);
  154. ib_mr = ERR_PTR(ret);
  155. goto get_dma_mr_exit0;
  156. }
  157. ib_mr = &e_maxmr->ib.ib_mr;
  158. } else {
  159. ehca_err(&shca->ib_device, "no internal max-MR exist!");
  160. ib_mr = ERR_PTR(-EINVAL);
  161. goto get_dma_mr_exit0;
  162. }
  163. get_dma_mr_exit0:
  164. if (IS_ERR(ib_mr))
  165. ehca_err(&shca->ib_device, "h_ret=%li pd=%p mr_access_flags=%x",
  166. PTR_ERR(ib_mr), pd, mr_access_flags);
  167. return ib_mr;
  168. } /* end ehca_get_dma_mr() */
  169. /*----------------------------------------------------------------------*/
  170. struct ib_mr *ehca_reg_phys_mr(struct ib_pd *pd,
  171. struct ib_phys_buf *phys_buf_array,
  172. int num_phys_buf,
  173. int mr_access_flags,
  174. u64 *iova_start)
  175. {
  176. struct ib_mr *ib_mr;
  177. int ret;
  178. struct ehca_mr *e_mr;
  179. struct ehca_shca *shca =
  180. container_of(pd->device, struct ehca_shca, ib_device);
  181. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  182. u64 size;
  183. if ((num_phys_buf <= 0) || !phys_buf_array) {
  184. ehca_err(pd->device, "bad input values: num_phys_buf=%x "
  185. "phys_buf_array=%p", num_phys_buf, phys_buf_array);
  186. ib_mr = ERR_PTR(-EINVAL);
  187. goto reg_phys_mr_exit0;
  188. }
  189. if (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  190. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  191. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  192. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE))) {
  193. /*
  194. * Remote Write Access requires Local Write Access
  195. * Remote Atomic Access requires Local Write Access
  196. */
  197. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  198. mr_access_flags);
  199. ib_mr = ERR_PTR(-EINVAL);
  200. goto reg_phys_mr_exit0;
  201. }
  202. /* check physical buffer list and calculate size */
  203. ret = ehca_mr_chk_buf_and_calc_size(phys_buf_array, num_phys_buf,
  204. iova_start, &size);
  205. if (ret) {
  206. ib_mr = ERR_PTR(ret);
  207. goto reg_phys_mr_exit0;
  208. }
  209. if ((size == 0) ||
  210. (((u64)iova_start + size) < (u64)iova_start)) {
  211. ehca_err(pd->device, "bad input values: size=%llx iova_start=%p",
  212. size, iova_start);
  213. ib_mr = ERR_PTR(-EINVAL);
  214. goto reg_phys_mr_exit0;
  215. }
  216. e_mr = ehca_mr_new();
  217. if (!e_mr) {
  218. ehca_err(pd->device, "out of memory");
  219. ib_mr = ERR_PTR(-ENOMEM);
  220. goto reg_phys_mr_exit0;
  221. }
  222. /* register MR on HCA */
  223. if (ehca_mr_is_maxmr(size, iova_start)) {
  224. e_mr->flags |= EHCA_MR_FLAG_MAXMR;
  225. ret = ehca_reg_maxmr(shca, e_mr, iova_start, mr_access_flags,
  226. e_pd, &e_mr->ib.ib_mr.lkey,
  227. &e_mr->ib.ib_mr.rkey);
  228. if (ret) {
  229. ib_mr = ERR_PTR(ret);
  230. goto reg_phys_mr_exit1;
  231. }
  232. } else {
  233. struct ehca_mr_pginfo pginfo;
  234. u32 num_kpages;
  235. u32 num_hwpages;
  236. u64 hw_pgsize;
  237. num_kpages = NUM_CHUNKS(((u64)iova_start % PAGE_SIZE) + size,
  238. PAGE_SIZE);
  239. /* for kernel space we try most possible pgsize */
  240. hw_pgsize = ehca_get_max_hwpage_size(shca);
  241. num_hwpages = NUM_CHUNKS(((u64)iova_start % hw_pgsize) + size,
  242. hw_pgsize);
  243. memset(&pginfo, 0, sizeof(pginfo));
  244. pginfo.type = EHCA_MR_PGI_PHYS;
  245. pginfo.num_kpages = num_kpages;
  246. pginfo.hwpage_size = hw_pgsize;
  247. pginfo.num_hwpages = num_hwpages;
  248. pginfo.u.phy.num_phys_buf = num_phys_buf;
  249. pginfo.u.phy.phys_buf_array = phys_buf_array;
  250. pginfo.next_hwpage =
  251. ((u64)iova_start & ~PAGE_MASK) / hw_pgsize;
  252. ret = ehca_reg_mr(shca, e_mr, iova_start, size, mr_access_flags,
  253. e_pd, &pginfo, &e_mr->ib.ib_mr.lkey,
  254. &e_mr->ib.ib_mr.rkey, EHCA_REG_MR);
  255. if (ret) {
  256. ib_mr = ERR_PTR(ret);
  257. goto reg_phys_mr_exit1;
  258. }
  259. }
  260. /* successful registration of all pages */
  261. return &e_mr->ib.ib_mr;
  262. reg_phys_mr_exit1:
  263. ehca_mr_delete(e_mr);
  264. reg_phys_mr_exit0:
  265. if (IS_ERR(ib_mr))
  266. ehca_err(pd->device, "h_ret=%li pd=%p phys_buf_array=%p "
  267. "num_phys_buf=%x mr_access_flags=%x iova_start=%p",
  268. PTR_ERR(ib_mr), pd, phys_buf_array,
  269. num_phys_buf, mr_access_flags, iova_start);
  270. return ib_mr;
  271. } /* end ehca_reg_phys_mr() */
  272. /*----------------------------------------------------------------------*/
  273. struct ib_mr *ehca_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
  274. u64 virt, int mr_access_flags,
  275. struct ib_udata *udata)
  276. {
  277. struct ib_mr *ib_mr;
  278. struct ehca_mr *e_mr;
  279. struct ehca_shca *shca =
  280. container_of(pd->device, struct ehca_shca, ib_device);
  281. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  282. struct ehca_mr_pginfo pginfo;
  283. int ret, page_shift;
  284. u32 num_kpages;
  285. u32 num_hwpages;
  286. u64 hwpage_size;
  287. if (!pd) {
  288. ehca_gen_err("bad pd=%p", pd);
  289. return ERR_PTR(-EFAULT);
  290. }
  291. if (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  292. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  293. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  294. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE))) {
  295. /*
  296. * Remote Write Access requires Local Write Access
  297. * Remote Atomic Access requires Local Write Access
  298. */
  299. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  300. mr_access_flags);
  301. ib_mr = ERR_PTR(-EINVAL);
  302. goto reg_user_mr_exit0;
  303. }
  304. if (length == 0 || virt + length < virt) {
  305. ehca_err(pd->device, "bad input values: length=%llx "
  306. "virt_base=%llx", length, virt);
  307. ib_mr = ERR_PTR(-EINVAL);
  308. goto reg_user_mr_exit0;
  309. }
  310. e_mr = ehca_mr_new();
  311. if (!e_mr) {
  312. ehca_err(pd->device, "out of memory");
  313. ib_mr = ERR_PTR(-ENOMEM);
  314. goto reg_user_mr_exit0;
  315. }
  316. e_mr->umem = ib_umem_get(pd->uobject->context, start, length,
  317. mr_access_flags, 0);
  318. if (IS_ERR(e_mr->umem)) {
  319. ib_mr = (void *)e_mr->umem;
  320. goto reg_user_mr_exit1;
  321. }
  322. if (e_mr->umem->page_size != PAGE_SIZE) {
  323. ehca_err(pd->device, "page size not supported, "
  324. "e_mr->umem->page_size=%x", e_mr->umem->page_size);
  325. ib_mr = ERR_PTR(-EINVAL);
  326. goto reg_user_mr_exit2;
  327. }
  328. /* determine number of MR pages */
  329. num_kpages = NUM_CHUNKS((virt % PAGE_SIZE) + length, PAGE_SIZE);
  330. /* select proper hw_pgsize */
  331. page_shift = PAGE_SHIFT;
  332. if (e_mr->umem->hugetlb) {
  333. /* determine page_shift, clamp between 4K and 16M */
  334. page_shift = (fls64(length - 1) + 3) & ~3;
  335. page_shift = min(max(page_shift, EHCA_MR_PGSHIFT4K),
  336. EHCA_MR_PGSHIFT16M);
  337. }
  338. hwpage_size = 1UL << page_shift;
  339. /* now that we have the desired page size, shift until it's
  340. * supported, too. 4K is always supported, so this terminates.
  341. */
  342. while (!(hwpage_size & shca->hca_cap_mr_pgsize))
  343. hwpage_size >>= 4;
  344. reg_user_mr_fallback:
  345. num_hwpages = NUM_CHUNKS((virt % hwpage_size) + length, hwpage_size);
  346. /* register MR on HCA */
  347. memset(&pginfo, 0, sizeof(pginfo));
  348. pginfo.type = EHCA_MR_PGI_USER;
  349. pginfo.hwpage_size = hwpage_size;
  350. pginfo.num_kpages = num_kpages;
  351. pginfo.num_hwpages = num_hwpages;
  352. pginfo.u.usr.region = e_mr->umem;
  353. pginfo.next_hwpage = e_mr->umem->offset / hwpage_size;
  354. pginfo.u.usr.next_chunk = list_prepare_entry(pginfo.u.usr.next_chunk,
  355. (&e_mr->umem->chunk_list),
  356. list);
  357. ret = ehca_reg_mr(shca, e_mr, (u64 *)virt, length, mr_access_flags,
  358. e_pd, &pginfo, &e_mr->ib.ib_mr.lkey,
  359. &e_mr->ib.ib_mr.rkey, EHCA_REG_MR);
  360. if (ret == -EINVAL && pginfo.hwpage_size > PAGE_SIZE) {
  361. ehca_warn(pd->device, "failed to register mr "
  362. "with hwpage_size=%llx", hwpage_size);
  363. ehca_info(pd->device, "try to register mr with "
  364. "kpage_size=%lx", PAGE_SIZE);
  365. /*
  366. * this means kpages are not contiguous for a hw page
  367. * try kernel page size as fallback solution
  368. */
  369. hwpage_size = PAGE_SIZE;
  370. goto reg_user_mr_fallback;
  371. }
  372. if (ret) {
  373. ib_mr = ERR_PTR(ret);
  374. goto reg_user_mr_exit2;
  375. }
  376. /* successful registration of all pages */
  377. return &e_mr->ib.ib_mr;
  378. reg_user_mr_exit2:
  379. ib_umem_release(e_mr->umem);
  380. reg_user_mr_exit1:
  381. ehca_mr_delete(e_mr);
  382. reg_user_mr_exit0:
  383. if (IS_ERR(ib_mr))
  384. ehca_err(pd->device, "rc=%li pd=%p mr_access_flags=%x udata=%p",
  385. PTR_ERR(ib_mr), pd, mr_access_flags, udata);
  386. return ib_mr;
  387. } /* end ehca_reg_user_mr() */
  388. /*----------------------------------------------------------------------*/
  389. int ehca_rereg_phys_mr(struct ib_mr *mr,
  390. int mr_rereg_mask,
  391. struct ib_pd *pd,
  392. struct ib_phys_buf *phys_buf_array,
  393. int num_phys_buf,
  394. int mr_access_flags,
  395. u64 *iova_start)
  396. {
  397. int ret;
  398. struct ehca_shca *shca =
  399. container_of(mr->device, struct ehca_shca, ib_device);
  400. struct ehca_mr *e_mr = container_of(mr, struct ehca_mr, ib.ib_mr);
  401. u64 new_size;
  402. u64 *new_start;
  403. u32 new_acl;
  404. struct ehca_pd *new_pd;
  405. u32 tmp_lkey, tmp_rkey;
  406. unsigned long sl_flags;
  407. u32 num_kpages = 0;
  408. u32 num_hwpages = 0;
  409. struct ehca_mr_pginfo pginfo;
  410. if (!(mr_rereg_mask & IB_MR_REREG_TRANS)) {
  411. /* TODO not supported, because PHYP rereg hCall needs pages */
  412. ehca_err(mr->device, "rereg without IB_MR_REREG_TRANS not "
  413. "supported yet, mr_rereg_mask=%x", mr_rereg_mask);
  414. ret = -EINVAL;
  415. goto rereg_phys_mr_exit0;
  416. }
  417. if (mr_rereg_mask & IB_MR_REREG_PD) {
  418. if (!pd) {
  419. ehca_err(mr->device, "rereg with bad pd, pd=%p "
  420. "mr_rereg_mask=%x", pd, mr_rereg_mask);
  421. ret = -EINVAL;
  422. goto rereg_phys_mr_exit0;
  423. }
  424. }
  425. if ((mr_rereg_mask &
  426. ~(IB_MR_REREG_TRANS | IB_MR_REREG_PD | IB_MR_REREG_ACCESS)) ||
  427. (mr_rereg_mask == 0)) {
  428. ret = -EINVAL;
  429. goto rereg_phys_mr_exit0;
  430. }
  431. /* check other parameters */
  432. if (e_mr == shca->maxmr) {
  433. /* should be impossible, however reject to be sure */
  434. ehca_err(mr->device, "rereg internal max-MR impossible, mr=%p "
  435. "shca->maxmr=%p mr->lkey=%x",
  436. mr, shca->maxmr, mr->lkey);
  437. ret = -EINVAL;
  438. goto rereg_phys_mr_exit0;
  439. }
  440. if (mr_rereg_mask & IB_MR_REREG_TRANS) { /* transl., i.e. addr/size */
  441. if (e_mr->flags & EHCA_MR_FLAG_FMR) {
  442. ehca_err(mr->device, "not supported for FMR, mr=%p "
  443. "flags=%x", mr, e_mr->flags);
  444. ret = -EINVAL;
  445. goto rereg_phys_mr_exit0;
  446. }
  447. if (!phys_buf_array || num_phys_buf <= 0) {
  448. ehca_err(mr->device, "bad input values mr_rereg_mask=%x"
  449. " phys_buf_array=%p num_phys_buf=%x",
  450. mr_rereg_mask, phys_buf_array, num_phys_buf);
  451. ret = -EINVAL;
  452. goto rereg_phys_mr_exit0;
  453. }
  454. }
  455. if ((mr_rereg_mask & IB_MR_REREG_ACCESS) && /* change ACL */
  456. (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  457. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  458. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  459. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)))) {
  460. /*
  461. * Remote Write Access requires Local Write Access
  462. * Remote Atomic Access requires Local Write Access
  463. */
  464. ehca_err(mr->device, "bad input values: mr_rereg_mask=%x "
  465. "mr_access_flags=%x", mr_rereg_mask, mr_access_flags);
  466. ret = -EINVAL;
  467. goto rereg_phys_mr_exit0;
  468. }
  469. /* set requested values dependent on rereg request */
  470. spin_lock_irqsave(&e_mr->mrlock, sl_flags);
  471. new_start = e_mr->start;
  472. new_size = e_mr->size;
  473. new_acl = e_mr->acl;
  474. new_pd = container_of(mr->pd, struct ehca_pd, ib_pd);
  475. if (mr_rereg_mask & IB_MR_REREG_TRANS) {
  476. u64 hw_pgsize = ehca_get_max_hwpage_size(shca);
  477. new_start = iova_start; /* change address */
  478. /* check physical buffer list and calculate size */
  479. ret = ehca_mr_chk_buf_and_calc_size(phys_buf_array,
  480. num_phys_buf, iova_start,
  481. &new_size);
  482. if (ret)
  483. goto rereg_phys_mr_exit1;
  484. if ((new_size == 0) ||
  485. (((u64)iova_start + new_size) < (u64)iova_start)) {
  486. ehca_err(mr->device, "bad input values: new_size=%llx "
  487. "iova_start=%p", new_size, iova_start);
  488. ret = -EINVAL;
  489. goto rereg_phys_mr_exit1;
  490. }
  491. num_kpages = NUM_CHUNKS(((u64)new_start % PAGE_SIZE) +
  492. new_size, PAGE_SIZE);
  493. num_hwpages = NUM_CHUNKS(((u64)new_start % hw_pgsize) +
  494. new_size, hw_pgsize);
  495. memset(&pginfo, 0, sizeof(pginfo));
  496. pginfo.type = EHCA_MR_PGI_PHYS;
  497. pginfo.num_kpages = num_kpages;
  498. pginfo.hwpage_size = hw_pgsize;
  499. pginfo.num_hwpages = num_hwpages;
  500. pginfo.u.phy.num_phys_buf = num_phys_buf;
  501. pginfo.u.phy.phys_buf_array = phys_buf_array;
  502. pginfo.next_hwpage =
  503. ((u64)iova_start & ~PAGE_MASK) / hw_pgsize;
  504. }
  505. if (mr_rereg_mask & IB_MR_REREG_ACCESS)
  506. new_acl = mr_access_flags;
  507. if (mr_rereg_mask & IB_MR_REREG_PD)
  508. new_pd = container_of(pd, struct ehca_pd, ib_pd);
  509. ret = ehca_rereg_mr(shca, e_mr, new_start, new_size, new_acl,
  510. new_pd, &pginfo, &tmp_lkey, &tmp_rkey);
  511. if (ret)
  512. goto rereg_phys_mr_exit1;
  513. /* successful reregistration */
  514. if (mr_rereg_mask & IB_MR_REREG_PD)
  515. mr->pd = pd;
  516. mr->lkey = tmp_lkey;
  517. mr->rkey = tmp_rkey;
  518. rereg_phys_mr_exit1:
  519. spin_unlock_irqrestore(&e_mr->mrlock, sl_flags);
  520. rereg_phys_mr_exit0:
  521. if (ret)
  522. ehca_err(mr->device, "ret=%i mr=%p mr_rereg_mask=%x pd=%p "
  523. "phys_buf_array=%p num_phys_buf=%x mr_access_flags=%x "
  524. "iova_start=%p",
  525. ret, mr, mr_rereg_mask, pd, phys_buf_array,
  526. num_phys_buf, mr_access_flags, iova_start);
  527. return ret;
  528. } /* end ehca_rereg_phys_mr() */
  529. /*----------------------------------------------------------------------*/
  530. int ehca_query_mr(struct ib_mr *mr, struct ib_mr_attr *mr_attr)
  531. {
  532. int ret = 0;
  533. u64 h_ret;
  534. struct ehca_shca *shca =
  535. container_of(mr->device, struct ehca_shca, ib_device);
  536. struct ehca_mr *e_mr = container_of(mr, struct ehca_mr, ib.ib_mr);
  537. unsigned long sl_flags;
  538. struct ehca_mr_hipzout_parms hipzout;
  539. if ((e_mr->flags & EHCA_MR_FLAG_FMR)) {
  540. ehca_err(mr->device, "not supported for FMR, mr=%p e_mr=%p "
  541. "e_mr->flags=%x", mr, e_mr, e_mr->flags);
  542. ret = -EINVAL;
  543. goto query_mr_exit0;
  544. }
  545. memset(mr_attr, 0, sizeof(struct ib_mr_attr));
  546. spin_lock_irqsave(&e_mr->mrlock, sl_flags);
  547. h_ret = hipz_h_query_mr(shca->ipz_hca_handle, e_mr, &hipzout);
  548. if (h_ret != H_SUCCESS) {
  549. ehca_err(mr->device, "hipz_mr_query failed, h_ret=%lli mr=%p "
  550. "hca_hndl=%llx mr_hndl=%llx lkey=%x",
  551. h_ret, mr, shca->ipz_hca_handle.handle,
  552. e_mr->ipz_mr_handle.handle, mr->lkey);
  553. ret = ehca2ib_return_code(h_ret);
  554. goto query_mr_exit1;
  555. }
  556. mr_attr->pd = mr->pd;
  557. mr_attr->device_virt_addr = hipzout.vaddr;
  558. mr_attr->size = hipzout.len;
  559. mr_attr->lkey = hipzout.lkey;
  560. mr_attr->rkey = hipzout.rkey;
  561. ehca_mrmw_reverse_map_acl(&hipzout.acl, &mr_attr->mr_access_flags);
  562. query_mr_exit1:
  563. spin_unlock_irqrestore(&e_mr->mrlock, sl_flags);
  564. query_mr_exit0:
  565. if (ret)
  566. ehca_err(mr->device, "ret=%i mr=%p mr_attr=%p",
  567. ret, mr, mr_attr);
  568. return ret;
  569. } /* end ehca_query_mr() */
  570. /*----------------------------------------------------------------------*/
  571. int ehca_dereg_mr(struct ib_mr *mr)
  572. {
  573. int ret = 0;
  574. u64 h_ret;
  575. struct ehca_shca *shca =
  576. container_of(mr->device, struct ehca_shca, ib_device);
  577. struct ehca_mr *e_mr = container_of(mr, struct ehca_mr, ib.ib_mr);
  578. if ((e_mr->flags & EHCA_MR_FLAG_FMR)) {
  579. ehca_err(mr->device, "not supported for FMR, mr=%p e_mr=%p "
  580. "e_mr->flags=%x", mr, e_mr, e_mr->flags);
  581. ret = -EINVAL;
  582. goto dereg_mr_exit0;
  583. } else if (e_mr == shca->maxmr) {
  584. /* should be impossible, however reject to be sure */
  585. ehca_err(mr->device, "dereg internal max-MR impossible, mr=%p "
  586. "shca->maxmr=%p mr->lkey=%x",
  587. mr, shca->maxmr, mr->lkey);
  588. ret = -EINVAL;
  589. goto dereg_mr_exit0;
  590. }
  591. /* TODO: BUSY: MR still has bound window(s) */
  592. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_mr);
  593. if (h_ret != H_SUCCESS) {
  594. ehca_err(mr->device, "hipz_free_mr failed, h_ret=%lli shca=%p "
  595. "e_mr=%p hca_hndl=%llx mr_hndl=%llx mr->lkey=%x",
  596. h_ret, shca, e_mr, shca->ipz_hca_handle.handle,
  597. e_mr->ipz_mr_handle.handle, mr->lkey);
  598. ret = ehca2ib_return_code(h_ret);
  599. goto dereg_mr_exit0;
  600. }
  601. if (e_mr->umem)
  602. ib_umem_release(e_mr->umem);
  603. /* successful deregistration */
  604. ehca_mr_delete(e_mr);
  605. dereg_mr_exit0:
  606. if (ret)
  607. ehca_err(mr->device, "ret=%i mr=%p", ret, mr);
  608. return ret;
  609. } /* end ehca_dereg_mr() */
  610. /*----------------------------------------------------------------------*/
  611. struct ib_mw *ehca_alloc_mw(struct ib_pd *pd)
  612. {
  613. struct ib_mw *ib_mw;
  614. u64 h_ret;
  615. struct ehca_mw *e_mw;
  616. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  617. struct ehca_shca *shca =
  618. container_of(pd->device, struct ehca_shca, ib_device);
  619. struct ehca_mw_hipzout_parms hipzout;
  620. e_mw = ehca_mw_new();
  621. if (!e_mw) {
  622. ib_mw = ERR_PTR(-ENOMEM);
  623. goto alloc_mw_exit0;
  624. }
  625. h_ret = hipz_h_alloc_resource_mw(shca->ipz_hca_handle, e_mw,
  626. e_pd->fw_pd, &hipzout);
  627. if (h_ret != H_SUCCESS) {
  628. ehca_err(pd->device, "hipz_mw_allocate failed, h_ret=%lli "
  629. "shca=%p hca_hndl=%llx mw=%p",
  630. h_ret, shca, shca->ipz_hca_handle.handle, e_mw);
  631. ib_mw = ERR_PTR(ehca2ib_return_code(h_ret));
  632. goto alloc_mw_exit1;
  633. }
  634. /* successful MW allocation */
  635. e_mw->ipz_mw_handle = hipzout.handle;
  636. e_mw->ib_mw.rkey = hipzout.rkey;
  637. return &e_mw->ib_mw;
  638. alloc_mw_exit1:
  639. ehca_mw_delete(e_mw);
  640. alloc_mw_exit0:
  641. if (IS_ERR(ib_mw))
  642. ehca_err(pd->device, "h_ret=%li pd=%p", PTR_ERR(ib_mw), pd);
  643. return ib_mw;
  644. } /* end ehca_alloc_mw() */
  645. /*----------------------------------------------------------------------*/
  646. int ehca_bind_mw(struct ib_qp *qp,
  647. struct ib_mw *mw,
  648. struct ib_mw_bind *mw_bind)
  649. {
  650. /* TODO: not supported up to now */
  651. ehca_gen_err("bind MW currently not supported by HCAD");
  652. return -EPERM;
  653. } /* end ehca_bind_mw() */
  654. /*----------------------------------------------------------------------*/
  655. int ehca_dealloc_mw(struct ib_mw *mw)
  656. {
  657. u64 h_ret;
  658. struct ehca_shca *shca =
  659. container_of(mw->device, struct ehca_shca, ib_device);
  660. struct ehca_mw *e_mw = container_of(mw, struct ehca_mw, ib_mw);
  661. h_ret = hipz_h_free_resource_mw(shca->ipz_hca_handle, e_mw);
  662. if (h_ret != H_SUCCESS) {
  663. ehca_err(mw->device, "hipz_free_mw failed, h_ret=%lli shca=%p "
  664. "mw=%p rkey=%x hca_hndl=%llx mw_hndl=%llx",
  665. h_ret, shca, mw, mw->rkey, shca->ipz_hca_handle.handle,
  666. e_mw->ipz_mw_handle.handle);
  667. return ehca2ib_return_code(h_ret);
  668. }
  669. /* successful deallocation */
  670. ehca_mw_delete(e_mw);
  671. return 0;
  672. } /* end ehca_dealloc_mw() */
  673. /*----------------------------------------------------------------------*/
  674. struct ib_fmr *ehca_alloc_fmr(struct ib_pd *pd,
  675. int mr_access_flags,
  676. struct ib_fmr_attr *fmr_attr)
  677. {
  678. struct ib_fmr *ib_fmr;
  679. struct ehca_shca *shca =
  680. container_of(pd->device, struct ehca_shca, ib_device);
  681. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  682. struct ehca_mr *e_fmr;
  683. int ret;
  684. u32 tmp_lkey, tmp_rkey;
  685. struct ehca_mr_pginfo pginfo;
  686. u64 hw_pgsize;
  687. /* check other parameters */
  688. if (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  689. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  690. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  691. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE))) {
  692. /*
  693. * Remote Write Access requires Local Write Access
  694. * Remote Atomic Access requires Local Write Access
  695. */
  696. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  697. mr_access_flags);
  698. ib_fmr = ERR_PTR(-EINVAL);
  699. goto alloc_fmr_exit0;
  700. }
  701. if (mr_access_flags & IB_ACCESS_MW_BIND) {
  702. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  703. mr_access_flags);
  704. ib_fmr = ERR_PTR(-EINVAL);
  705. goto alloc_fmr_exit0;
  706. }
  707. if ((fmr_attr->max_pages == 0) || (fmr_attr->max_maps == 0)) {
  708. ehca_err(pd->device, "bad input values: fmr_attr->max_pages=%x "
  709. "fmr_attr->max_maps=%x fmr_attr->page_shift=%x",
  710. fmr_attr->max_pages, fmr_attr->max_maps,
  711. fmr_attr->page_shift);
  712. ib_fmr = ERR_PTR(-EINVAL);
  713. goto alloc_fmr_exit0;
  714. }
  715. hw_pgsize = 1 << fmr_attr->page_shift;
  716. if (!(hw_pgsize & shca->hca_cap_mr_pgsize)) {
  717. ehca_err(pd->device, "unsupported fmr_attr->page_shift=%x",
  718. fmr_attr->page_shift);
  719. ib_fmr = ERR_PTR(-EINVAL);
  720. goto alloc_fmr_exit0;
  721. }
  722. e_fmr = ehca_mr_new();
  723. if (!e_fmr) {
  724. ib_fmr = ERR_PTR(-ENOMEM);
  725. goto alloc_fmr_exit0;
  726. }
  727. e_fmr->flags |= EHCA_MR_FLAG_FMR;
  728. /* register MR on HCA */
  729. memset(&pginfo, 0, sizeof(pginfo));
  730. pginfo.hwpage_size = hw_pgsize;
  731. /*
  732. * pginfo.num_hwpages==0, ie register_rpages() will not be called
  733. * but deferred to map_phys_fmr()
  734. */
  735. ret = ehca_reg_mr(shca, e_fmr, NULL,
  736. fmr_attr->max_pages * (1 << fmr_attr->page_shift),
  737. mr_access_flags, e_pd, &pginfo,
  738. &tmp_lkey, &tmp_rkey, EHCA_REG_MR);
  739. if (ret) {
  740. ib_fmr = ERR_PTR(ret);
  741. goto alloc_fmr_exit1;
  742. }
  743. /* successful */
  744. e_fmr->hwpage_size = hw_pgsize;
  745. e_fmr->fmr_page_size = 1 << fmr_attr->page_shift;
  746. e_fmr->fmr_max_pages = fmr_attr->max_pages;
  747. e_fmr->fmr_max_maps = fmr_attr->max_maps;
  748. e_fmr->fmr_map_cnt = 0;
  749. return &e_fmr->ib.ib_fmr;
  750. alloc_fmr_exit1:
  751. ehca_mr_delete(e_fmr);
  752. alloc_fmr_exit0:
  753. return ib_fmr;
  754. } /* end ehca_alloc_fmr() */
  755. /*----------------------------------------------------------------------*/
  756. int ehca_map_phys_fmr(struct ib_fmr *fmr,
  757. u64 *page_list,
  758. int list_len,
  759. u64 iova)
  760. {
  761. int ret;
  762. struct ehca_shca *shca =
  763. container_of(fmr->device, struct ehca_shca, ib_device);
  764. struct ehca_mr *e_fmr = container_of(fmr, struct ehca_mr, ib.ib_fmr);
  765. struct ehca_pd *e_pd = container_of(fmr->pd, struct ehca_pd, ib_pd);
  766. struct ehca_mr_pginfo pginfo;
  767. u32 tmp_lkey, tmp_rkey;
  768. if (!(e_fmr->flags & EHCA_MR_FLAG_FMR)) {
  769. ehca_err(fmr->device, "not a FMR, e_fmr=%p e_fmr->flags=%x",
  770. e_fmr, e_fmr->flags);
  771. ret = -EINVAL;
  772. goto map_phys_fmr_exit0;
  773. }
  774. ret = ehca_fmr_check_page_list(e_fmr, page_list, list_len);
  775. if (ret)
  776. goto map_phys_fmr_exit0;
  777. if (iova % e_fmr->fmr_page_size) {
  778. /* only whole-numbered pages */
  779. ehca_err(fmr->device, "bad iova, iova=%llx fmr_page_size=%x",
  780. iova, e_fmr->fmr_page_size);
  781. ret = -EINVAL;
  782. goto map_phys_fmr_exit0;
  783. }
  784. if (e_fmr->fmr_map_cnt >= e_fmr->fmr_max_maps) {
  785. /* HCAD does not limit the maps, however trace this anyway */
  786. ehca_info(fmr->device, "map limit exceeded, fmr=%p "
  787. "e_fmr->fmr_map_cnt=%x e_fmr->fmr_max_maps=%x",
  788. fmr, e_fmr->fmr_map_cnt, e_fmr->fmr_max_maps);
  789. }
  790. memset(&pginfo, 0, sizeof(pginfo));
  791. pginfo.type = EHCA_MR_PGI_FMR;
  792. pginfo.num_kpages = list_len;
  793. pginfo.hwpage_size = e_fmr->hwpage_size;
  794. pginfo.num_hwpages =
  795. list_len * e_fmr->fmr_page_size / pginfo.hwpage_size;
  796. pginfo.u.fmr.page_list = page_list;
  797. pginfo.next_hwpage =
  798. (iova & (e_fmr->fmr_page_size-1)) / pginfo.hwpage_size;
  799. pginfo.u.fmr.fmr_pgsize = e_fmr->fmr_page_size;
  800. ret = ehca_rereg_mr(shca, e_fmr, (u64 *)iova,
  801. list_len * e_fmr->fmr_page_size,
  802. e_fmr->acl, e_pd, &pginfo, &tmp_lkey, &tmp_rkey);
  803. if (ret)
  804. goto map_phys_fmr_exit0;
  805. /* successful reregistration */
  806. e_fmr->fmr_map_cnt++;
  807. e_fmr->ib.ib_fmr.lkey = tmp_lkey;
  808. e_fmr->ib.ib_fmr.rkey = tmp_rkey;
  809. return 0;
  810. map_phys_fmr_exit0:
  811. if (ret)
  812. ehca_err(fmr->device, "ret=%i fmr=%p page_list=%p list_len=%x "
  813. "iova=%llx", ret, fmr, page_list, list_len, iova);
  814. return ret;
  815. } /* end ehca_map_phys_fmr() */
  816. /*----------------------------------------------------------------------*/
  817. int ehca_unmap_fmr(struct list_head *fmr_list)
  818. {
  819. int ret = 0;
  820. struct ib_fmr *ib_fmr;
  821. struct ehca_shca *shca = NULL;
  822. struct ehca_shca *prev_shca;
  823. struct ehca_mr *e_fmr;
  824. u32 num_fmr = 0;
  825. u32 unmap_fmr_cnt = 0;
  826. /* check all FMR belong to same SHCA, and check internal flag */
  827. list_for_each_entry(ib_fmr, fmr_list, list) {
  828. prev_shca = shca;
  829. shca = container_of(ib_fmr->device, struct ehca_shca,
  830. ib_device);
  831. e_fmr = container_of(ib_fmr, struct ehca_mr, ib.ib_fmr);
  832. if ((shca != prev_shca) && prev_shca) {
  833. ehca_err(&shca->ib_device, "SHCA mismatch, shca=%p "
  834. "prev_shca=%p e_fmr=%p",
  835. shca, prev_shca, e_fmr);
  836. ret = -EINVAL;
  837. goto unmap_fmr_exit0;
  838. }
  839. if (!(e_fmr->flags & EHCA_MR_FLAG_FMR)) {
  840. ehca_err(&shca->ib_device, "not a FMR, e_fmr=%p "
  841. "e_fmr->flags=%x", e_fmr, e_fmr->flags);
  842. ret = -EINVAL;
  843. goto unmap_fmr_exit0;
  844. }
  845. num_fmr++;
  846. }
  847. /* loop over all FMRs to unmap */
  848. list_for_each_entry(ib_fmr, fmr_list, list) {
  849. unmap_fmr_cnt++;
  850. e_fmr = container_of(ib_fmr, struct ehca_mr, ib.ib_fmr);
  851. shca = container_of(ib_fmr->device, struct ehca_shca,
  852. ib_device);
  853. ret = ehca_unmap_one_fmr(shca, e_fmr);
  854. if (ret) {
  855. /* unmap failed, stop unmapping of rest of FMRs */
  856. ehca_err(&shca->ib_device, "unmap of one FMR failed, "
  857. "stop rest, e_fmr=%p num_fmr=%x "
  858. "unmap_fmr_cnt=%x lkey=%x", e_fmr, num_fmr,
  859. unmap_fmr_cnt, e_fmr->ib.ib_fmr.lkey);
  860. goto unmap_fmr_exit0;
  861. }
  862. }
  863. unmap_fmr_exit0:
  864. if (ret)
  865. ehca_gen_err("ret=%i fmr_list=%p num_fmr=%x unmap_fmr_cnt=%x",
  866. ret, fmr_list, num_fmr, unmap_fmr_cnt);
  867. return ret;
  868. } /* end ehca_unmap_fmr() */
  869. /*----------------------------------------------------------------------*/
  870. int ehca_dealloc_fmr(struct ib_fmr *fmr)
  871. {
  872. int ret;
  873. u64 h_ret;
  874. struct ehca_shca *shca =
  875. container_of(fmr->device, struct ehca_shca, ib_device);
  876. struct ehca_mr *e_fmr = container_of(fmr, struct ehca_mr, ib.ib_fmr);
  877. if (!(e_fmr->flags & EHCA_MR_FLAG_FMR)) {
  878. ehca_err(fmr->device, "not a FMR, e_fmr=%p e_fmr->flags=%x",
  879. e_fmr, e_fmr->flags);
  880. ret = -EINVAL;
  881. goto free_fmr_exit0;
  882. }
  883. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_fmr);
  884. if (h_ret != H_SUCCESS) {
  885. ehca_err(fmr->device, "hipz_free_mr failed, h_ret=%lli e_fmr=%p "
  886. "hca_hndl=%llx fmr_hndl=%llx fmr->lkey=%x",
  887. h_ret, e_fmr, shca->ipz_hca_handle.handle,
  888. e_fmr->ipz_mr_handle.handle, fmr->lkey);
  889. ret = ehca2ib_return_code(h_ret);
  890. goto free_fmr_exit0;
  891. }
  892. /* successful deregistration */
  893. ehca_mr_delete(e_fmr);
  894. return 0;
  895. free_fmr_exit0:
  896. if (ret)
  897. ehca_err(&shca->ib_device, "ret=%i fmr=%p", ret, fmr);
  898. return ret;
  899. } /* end ehca_dealloc_fmr() */
  900. /*----------------------------------------------------------------------*/
  901. static int ehca_reg_bmap_mr_rpages(struct ehca_shca *shca,
  902. struct ehca_mr *e_mr,
  903. struct ehca_mr_pginfo *pginfo);
  904. int ehca_reg_mr(struct ehca_shca *shca,
  905. struct ehca_mr *e_mr,
  906. u64 *iova_start,
  907. u64 size,
  908. int acl,
  909. struct ehca_pd *e_pd,
  910. struct ehca_mr_pginfo *pginfo,
  911. u32 *lkey, /*OUT*/
  912. u32 *rkey, /*OUT*/
  913. enum ehca_reg_type reg_type)
  914. {
  915. int ret;
  916. u64 h_ret;
  917. u32 hipz_acl;
  918. struct ehca_mr_hipzout_parms hipzout;
  919. ehca_mrmw_map_acl(acl, &hipz_acl);
  920. ehca_mrmw_set_pgsize_hipz_acl(pginfo->hwpage_size, &hipz_acl);
  921. if (ehca_use_hp_mr == 1)
  922. hipz_acl |= 0x00000001;
  923. h_ret = hipz_h_alloc_resource_mr(shca->ipz_hca_handle, e_mr,
  924. (u64)iova_start, size, hipz_acl,
  925. e_pd->fw_pd, &hipzout);
  926. if (h_ret != H_SUCCESS) {
  927. ehca_err(&shca->ib_device, "hipz_alloc_mr failed, h_ret=%lli "
  928. "hca_hndl=%llx", h_ret, shca->ipz_hca_handle.handle);
  929. ret = ehca2ib_return_code(h_ret);
  930. goto ehca_reg_mr_exit0;
  931. }
  932. e_mr->ipz_mr_handle = hipzout.handle;
  933. if (reg_type == EHCA_REG_BUSMAP_MR)
  934. ret = ehca_reg_bmap_mr_rpages(shca, e_mr, pginfo);
  935. else if (reg_type == EHCA_REG_MR)
  936. ret = ehca_reg_mr_rpages(shca, e_mr, pginfo);
  937. else
  938. ret = -EINVAL;
  939. if (ret)
  940. goto ehca_reg_mr_exit1;
  941. /* successful registration */
  942. e_mr->num_kpages = pginfo->num_kpages;
  943. e_mr->num_hwpages = pginfo->num_hwpages;
  944. e_mr->hwpage_size = pginfo->hwpage_size;
  945. e_mr->start = iova_start;
  946. e_mr->size = size;
  947. e_mr->acl = acl;
  948. *lkey = hipzout.lkey;
  949. *rkey = hipzout.rkey;
  950. return 0;
  951. ehca_reg_mr_exit1:
  952. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_mr);
  953. if (h_ret != H_SUCCESS) {
  954. ehca_err(&shca->ib_device, "h_ret=%lli shca=%p e_mr=%p "
  955. "iova_start=%p size=%llx acl=%x e_pd=%p lkey=%x "
  956. "pginfo=%p num_kpages=%llx num_hwpages=%llx ret=%i",
  957. h_ret, shca, e_mr, iova_start, size, acl, e_pd,
  958. hipzout.lkey, pginfo, pginfo->num_kpages,
  959. pginfo->num_hwpages, ret);
  960. ehca_err(&shca->ib_device, "internal error in ehca_reg_mr, "
  961. "not recoverable");
  962. }
  963. ehca_reg_mr_exit0:
  964. if (ret)
  965. ehca_err(&shca->ib_device, "ret=%i shca=%p e_mr=%p "
  966. "iova_start=%p size=%llx acl=%x e_pd=%p pginfo=%p "
  967. "num_kpages=%llx num_hwpages=%llx",
  968. ret, shca, e_mr, iova_start, size, acl, e_pd, pginfo,
  969. pginfo->num_kpages, pginfo->num_hwpages);
  970. return ret;
  971. } /* end ehca_reg_mr() */
  972. /*----------------------------------------------------------------------*/
  973. int ehca_reg_mr_rpages(struct ehca_shca *shca,
  974. struct ehca_mr *e_mr,
  975. struct ehca_mr_pginfo *pginfo)
  976. {
  977. int ret = 0;
  978. u64 h_ret;
  979. u32 rnum;
  980. u64 rpage;
  981. u32 i;
  982. u64 *kpage;
  983. if (!pginfo->num_hwpages) /* in case of fmr */
  984. return 0;
  985. kpage = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
  986. if (!kpage) {
  987. ehca_err(&shca->ib_device, "kpage alloc failed");
  988. ret = -ENOMEM;
  989. goto ehca_reg_mr_rpages_exit0;
  990. }
  991. /* max MAX_RPAGES ehca mr pages per register call */
  992. for (i = 0; i < NUM_CHUNKS(pginfo->num_hwpages, MAX_RPAGES); i++) {
  993. if (i == NUM_CHUNKS(pginfo->num_hwpages, MAX_RPAGES) - 1) {
  994. rnum = pginfo->num_hwpages % MAX_RPAGES; /* last shot */
  995. if (rnum == 0)
  996. rnum = MAX_RPAGES; /* last shot is full */
  997. } else
  998. rnum = MAX_RPAGES;
  999. ret = ehca_set_pagebuf(pginfo, rnum, kpage);
  1000. if (ret) {
  1001. ehca_err(&shca->ib_device, "ehca_set_pagebuf "
  1002. "bad rc, ret=%i rnum=%x kpage=%p",
  1003. ret, rnum, kpage);
  1004. goto ehca_reg_mr_rpages_exit1;
  1005. }
  1006. if (rnum > 1) {
  1007. rpage = virt_to_abs(kpage);
  1008. if (!rpage) {
  1009. ehca_err(&shca->ib_device, "kpage=%p i=%x",
  1010. kpage, i);
  1011. ret = -EFAULT;
  1012. goto ehca_reg_mr_rpages_exit1;
  1013. }
  1014. } else
  1015. rpage = *kpage;
  1016. h_ret = hipz_h_register_rpage_mr(
  1017. shca->ipz_hca_handle, e_mr,
  1018. ehca_encode_hwpage_size(pginfo->hwpage_size),
  1019. 0, rpage, rnum);
  1020. if (i == NUM_CHUNKS(pginfo->num_hwpages, MAX_RPAGES) - 1) {
  1021. /*
  1022. * check for 'registration complete'==H_SUCCESS
  1023. * and for 'page registered'==H_PAGE_REGISTERED
  1024. */
  1025. if (h_ret != H_SUCCESS) {
  1026. ehca_err(&shca->ib_device, "last "
  1027. "hipz_reg_rpage_mr failed, h_ret=%lli "
  1028. "e_mr=%p i=%x hca_hndl=%llx mr_hndl=%llx"
  1029. " lkey=%x", h_ret, e_mr, i,
  1030. shca->ipz_hca_handle.handle,
  1031. e_mr->ipz_mr_handle.handle,
  1032. e_mr->ib.ib_mr.lkey);
  1033. ret = ehca2ib_return_code(h_ret);
  1034. break;
  1035. } else
  1036. ret = 0;
  1037. } else if (h_ret != H_PAGE_REGISTERED) {
  1038. ehca_err(&shca->ib_device, "hipz_reg_rpage_mr failed, "
  1039. "h_ret=%lli e_mr=%p i=%x lkey=%x hca_hndl=%llx "
  1040. "mr_hndl=%llx", h_ret, e_mr, i,
  1041. e_mr->ib.ib_mr.lkey,
  1042. shca->ipz_hca_handle.handle,
  1043. e_mr->ipz_mr_handle.handle);
  1044. ret = ehca2ib_return_code(h_ret);
  1045. break;
  1046. } else
  1047. ret = 0;
  1048. } /* end for(i) */
  1049. ehca_reg_mr_rpages_exit1:
  1050. ehca_free_fw_ctrlblock(kpage);
  1051. ehca_reg_mr_rpages_exit0:
  1052. if (ret)
  1053. ehca_err(&shca->ib_device, "ret=%i shca=%p e_mr=%p pginfo=%p "
  1054. "num_kpages=%llx num_hwpages=%llx", ret, shca, e_mr,
  1055. pginfo, pginfo->num_kpages, pginfo->num_hwpages);
  1056. return ret;
  1057. } /* end ehca_reg_mr_rpages() */
  1058. /*----------------------------------------------------------------------*/
  1059. inline int ehca_rereg_mr_rereg1(struct ehca_shca *shca,
  1060. struct ehca_mr *e_mr,
  1061. u64 *iova_start,
  1062. u64 size,
  1063. u32 acl,
  1064. struct ehca_pd *e_pd,
  1065. struct ehca_mr_pginfo *pginfo,
  1066. u32 *lkey, /*OUT*/
  1067. u32 *rkey) /*OUT*/
  1068. {
  1069. int ret;
  1070. u64 h_ret;
  1071. u32 hipz_acl;
  1072. u64 *kpage;
  1073. u64 rpage;
  1074. struct ehca_mr_pginfo pginfo_save;
  1075. struct ehca_mr_hipzout_parms hipzout;
  1076. ehca_mrmw_map_acl(acl, &hipz_acl);
  1077. ehca_mrmw_set_pgsize_hipz_acl(pginfo->hwpage_size, &hipz_acl);
  1078. kpage = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
  1079. if (!kpage) {
  1080. ehca_err(&shca->ib_device, "kpage alloc failed");
  1081. ret = -ENOMEM;
  1082. goto ehca_rereg_mr_rereg1_exit0;
  1083. }
  1084. pginfo_save = *pginfo;
  1085. ret = ehca_set_pagebuf(pginfo, pginfo->num_hwpages, kpage);
  1086. if (ret) {
  1087. ehca_err(&shca->ib_device, "set pagebuf failed, e_mr=%p "
  1088. "pginfo=%p type=%x num_kpages=%llx num_hwpages=%llx "
  1089. "kpage=%p", e_mr, pginfo, pginfo->type,
  1090. pginfo->num_kpages, pginfo->num_hwpages, kpage);
  1091. goto ehca_rereg_mr_rereg1_exit1;
  1092. }
  1093. rpage = virt_to_abs(kpage);
  1094. if (!rpage) {
  1095. ehca_err(&shca->ib_device, "kpage=%p", kpage);
  1096. ret = -EFAULT;
  1097. goto ehca_rereg_mr_rereg1_exit1;
  1098. }
  1099. h_ret = hipz_h_reregister_pmr(shca->ipz_hca_handle, e_mr,
  1100. (u64)iova_start, size, hipz_acl,
  1101. e_pd->fw_pd, rpage, &hipzout);
  1102. if (h_ret != H_SUCCESS) {
  1103. /*
  1104. * reregistration unsuccessful, try it again with the 3 hCalls,
  1105. * e.g. this is required in case H_MR_CONDITION
  1106. * (MW bound or MR is shared)
  1107. */
  1108. ehca_warn(&shca->ib_device, "hipz_h_reregister_pmr failed "
  1109. "(Rereg1), h_ret=%lli e_mr=%p", h_ret, e_mr);
  1110. *pginfo = pginfo_save;
  1111. ret = -EAGAIN;
  1112. } else if ((u64 *)hipzout.vaddr != iova_start) {
  1113. ehca_err(&shca->ib_device, "PHYP changed iova_start in "
  1114. "rereg_pmr, iova_start=%p iova_start_out=%llx e_mr=%p "
  1115. "mr_handle=%llx lkey=%x lkey_out=%x", iova_start,
  1116. hipzout.vaddr, e_mr, e_mr->ipz_mr_handle.handle,
  1117. e_mr->ib.ib_mr.lkey, hipzout.lkey);
  1118. ret = -EFAULT;
  1119. } else {
  1120. /*
  1121. * successful reregistration
  1122. * note: start and start_out are identical for eServer HCAs
  1123. */
  1124. e_mr->num_kpages = pginfo->num_kpages;
  1125. e_mr->num_hwpages = pginfo->num_hwpages;
  1126. e_mr->hwpage_size = pginfo->hwpage_size;
  1127. e_mr->start = iova_start;
  1128. e_mr->size = size;
  1129. e_mr->acl = acl;
  1130. *lkey = hipzout.lkey;
  1131. *rkey = hipzout.rkey;
  1132. }
  1133. ehca_rereg_mr_rereg1_exit1:
  1134. ehca_free_fw_ctrlblock(kpage);
  1135. ehca_rereg_mr_rereg1_exit0:
  1136. if ( ret && (ret != -EAGAIN) )
  1137. ehca_err(&shca->ib_device, "ret=%i lkey=%x rkey=%x "
  1138. "pginfo=%p num_kpages=%llx num_hwpages=%llx",
  1139. ret, *lkey, *rkey, pginfo, pginfo->num_kpages,
  1140. pginfo->num_hwpages);
  1141. return ret;
  1142. } /* end ehca_rereg_mr_rereg1() */
  1143. /*----------------------------------------------------------------------*/
  1144. int ehca_rereg_mr(struct ehca_shca *shca,
  1145. struct ehca_mr *e_mr,
  1146. u64 *iova_start,
  1147. u64 size,
  1148. int acl,
  1149. struct ehca_pd *e_pd,
  1150. struct ehca_mr_pginfo *pginfo,
  1151. u32 *lkey,
  1152. u32 *rkey)
  1153. {
  1154. int ret = 0;
  1155. u64 h_ret;
  1156. int rereg_1_hcall = 1; /* 1: use hipz_h_reregister_pmr directly */
  1157. int rereg_3_hcall = 0; /* 1: use 3 hipz calls for reregistration */
  1158. /* first determine reregistration hCall(s) */
  1159. if ((pginfo->num_hwpages > MAX_RPAGES) ||
  1160. (e_mr->num_hwpages > MAX_RPAGES) ||
  1161. (pginfo->num_hwpages > e_mr->num_hwpages)) {
  1162. ehca_dbg(&shca->ib_device, "Rereg3 case, "
  1163. "pginfo->num_hwpages=%llx e_mr->num_hwpages=%x",
  1164. pginfo->num_hwpages, e_mr->num_hwpages);
  1165. rereg_1_hcall = 0;
  1166. rereg_3_hcall = 1;
  1167. }
  1168. if (e_mr->flags & EHCA_MR_FLAG_MAXMR) { /* check for max-MR */
  1169. rereg_1_hcall = 0;
  1170. rereg_3_hcall = 1;
  1171. e_mr->flags &= ~EHCA_MR_FLAG_MAXMR;
  1172. ehca_err(&shca->ib_device, "Rereg MR for max-MR! e_mr=%p",
  1173. e_mr);
  1174. }
  1175. if (rereg_1_hcall) {
  1176. ret = ehca_rereg_mr_rereg1(shca, e_mr, iova_start, size,
  1177. acl, e_pd, pginfo, lkey, rkey);
  1178. if (ret) {
  1179. if (ret == -EAGAIN)
  1180. rereg_3_hcall = 1;
  1181. else
  1182. goto ehca_rereg_mr_exit0;
  1183. }
  1184. }
  1185. if (rereg_3_hcall) {
  1186. struct ehca_mr save_mr;
  1187. /* first deregister old MR */
  1188. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_mr);
  1189. if (h_ret != H_SUCCESS) {
  1190. ehca_err(&shca->ib_device, "hipz_free_mr failed, "
  1191. "h_ret=%lli e_mr=%p hca_hndl=%llx mr_hndl=%llx "
  1192. "mr->lkey=%x",
  1193. h_ret, e_mr, shca->ipz_hca_handle.handle,
  1194. e_mr->ipz_mr_handle.handle,
  1195. e_mr->ib.ib_mr.lkey);
  1196. ret = ehca2ib_return_code(h_ret);
  1197. goto ehca_rereg_mr_exit0;
  1198. }
  1199. /* clean ehca_mr_t, without changing struct ib_mr and lock */
  1200. save_mr = *e_mr;
  1201. ehca_mr_deletenew(e_mr);
  1202. /* set some MR values */
  1203. e_mr->flags = save_mr.flags;
  1204. e_mr->hwpage_size = save_mr.hwpage_size;
  1205. e_mr->fmr_page_size = save_mr.fmr_page_size;
  1206. e_mr->fmr_max_pages = save_mr.fmr_max_pages;
  1207. e_mr->fmr_max_maps = save_mr.fmr_max_maps;
  1208. e_mr->fmr_map_cnt = save_mr.fmr_map_cnt;
  1209. ret = ehca_reg_mr(shca, e_mr, iova_start, size, acl,
  1210. e_pd, pginfo, lkey, rkey, EHCA_REG_MR);
  1211. if (ret) {
  1212. u32 offset = (u64)(&e_mr->flags) - (u64)e_mr;
  1213. memcpy(&e_mr->flags, &(save_mr.flags),
  1214. sizeof(struct ehca_mr) - offset);
  1215. goto ehca_rereg_mr_exit0;
  1216. }
  1217. }
  1218. ehca_rereg_mr_exit0:
  1219. if (ret)
  1220. ehca_err(&shca->ib_device, "ret=%i shca=%p e_mr=%p "
  1221. "iova_start=%p size=%llx acl=%x e_pd=%p pginfo=%p "
  1222. "num_kpages=%llx lkey=%x rkey=%x rereg_1_hcall=%x "
  1223. "rereg_3_hcall=%x", ret, shca, e_mr, iova_start, size,
  1224. acl, e_pd, pginfo, pginfo->num_kpages, *lkey, *rkey,
  1225. rereg_1_hcall, rereg_3_hcall);
  1226. return ret;
  1227. } /* end ehca_rereg_mr() */
  1228. /*----------------------------------------------------------------------*/
  1229. int ehca_unmap_one_fmr(struct ehca_shca *shca,
  1230. struct ehca_mr *e_fmr)
  1231. {
  1232. int ret = 0;
  1233. u64 h_ret;
  1234. struct ehca_pd *e_pd =
  1235. container_of(e_fmr->ib.ib_fmr.pd, struct ehca_pd, ib_pd);
  1236. struct ehca_mr save_fmr;
  1237. u32 tmp_lkey, tmp_rkey;
  1238. struct ehca_mr_pginfo pginfo;
  1239. struct ehca_mr_hipzout_parms hipzout;
  1240. struct ehca_mr save_mr;
  1241. if (e_fmr->fmr_max_pages <= MAX_RPAGES) {
  1242. /*
  1243. * note: after using rereg hcall with len=0,
  1244. * rereg hcall must be used again for registering pages
  1245. */
  1246. h_ret = hipz_h_reregister_pmr(shca->ipz_hca_handle, e_fmr, 0,
  1247. 0, 0, e_pd->fw_pd, 0, &hipzout);
  1248. if (h_ret == H_SUCCESS) {
  1249. /* successful reregistration */
  1250. e_fmr->start = NULL;
  1251. e_fmr->size = 0;
  1252. tmp_lkey = hipzout.lkey;
  1253. tmp_rkey = hipzout.rkey;
  1254. return 0;
  1255. }
  1256. /*
  1257. * should not happen, because length checked above,
  1258. * FMRs are not shared and no MW bound to FMRs
  1259. */
  1260. ehca_err(&shca->ib_device, "hipz_reregister_pmr failed "
  1261. "(Rereg1), h_ret=%lli e_fmr=%p hca_hndl=%llx "
  1262. "mr_hndl=%llx lkey=%x lkey_out=%x",
  1263. h_ret, e_fmr, shca->ipz_hca_handle.handle,
  1264. e_fmr->ipz_mr_handle.handle,
  1265. e_fmr->ib.ib_fmr.lkey, hipzout.lkey);
  1266. /* try free and rereg */
  1267. }
  1268. /* first free old FMR */
  1269. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_fmr);
  1270. if (h_ret != H_SUCCESS) {
  1271. ehca_err(&shca->ib_device, "hipz_free_mr failed, "
  1272. "h_ret=%lli e_fmr=%p hca_hndl=%llx mr_hndl=%llx "
  1273. "lkey=%x",
  1274. h_ret, e_fmr, shca->ipz_hca_handle.handle,
  1275. e_fmr->ipz_mr_handle.handle,
  1276. e_fmr->ib.ib_fmr.lkey);
  1277. ret = ehca2ib_return_code(h_ret);
  1278. goto ehca_unmap_one_fmr_exit0;
  1279. }
  1280. /* clean ehca_mr_t, without changing lock */
  1281. save_fmr = *e_fmr;
  1282. ehca_mr_deletenew(e_fmr);
  1283. /* set some MR values */
  1284. e_fmr->flags = save_fmr.flags;
  1285. e_fmr->hwpage_size = save_fmr.hwpage_size;
  1286. e_fmr->fmr_page_size = save_fmr.fmr_page_size;
  1287. e_fmr->fmr_max_pages = save_fmr.fmr_max_pages;
  1288. e_fmr->fmr_max_maps = save_fmr.fmr_max_maps;
  1289. e_fmr->fmr_map_cnt = save_fmr.fmr_map_cnt;
  1290. e_fmr->acl = save_fmr.acl;
  1291. memset(&pginfo, 0, sizeof(pginfo));
  1292. pginfo.type = EHCA_MR_PGI_FMR;
  1293. ret = ehca_reg_mr(shca, e_fmr, NULL,
  1294. (e_fmr->fmr_max_pages * e_fmr->fmr_page_size),
  1295. e_fmr->acl, e_pd, &pginfo, &tmp_lkey,
  1296. &tmp_rkey, EHCA_REG_MR);
  1297. if (ret) {
  1298. u32 offset = (u64)(&e_fmr->flags) - (u64)e_fmr;
  1299. memcpy(&e_fmr->flags, &(save_mr.flags),
  1300. sizeof(struct ehca_mr) - offset);
  1301. }
  1302. ehca_unmap_one_fmr_exit0:
  1303. if (ret)
  1304. ehca_err(&shca->ib_device, "ret=%i tmp_lkey=%x tmp_rkey=%x "
  1305. "fmr_max_pages=%x",
  1306. ret, tmp_lkey, tmp_rkey, e_fmr->fmr_max_pages);
  1307. return ret;
  1308. } /* end ehca_unmap_one_fmr() */
  1309. /*----------------------------------------------------------------------*/
  1310. int ehca_reg_smr(struct ehca_shca *shca,
  1311. struct ehca_mr *e_origmr,
  1312. struct ehca_mr *e_newmr,
  1313. u64 *iova_start,
  1314. int acl,
  1315. struct ehca_pd *e_pd,
  1316. u32 *lkey, /*OUT*/
  1317. u32 *rkey) /*OUT*/
  1318. {
  1319. int ret = 0;
  1320. u64 h_ret;
  1321. u32 hipz_acl;
  1322. struct ehca_mr_hipzout_parms hipzout;
  1323. ehca_mrmw_map_acl(acl, &hipz_acl);
  1324. ehca_mrmw_set_pgsize_hipz_acl(e_origmr->hwpage_size, &hipz_acl);
  1325. h_ret = hipz_h_register_smr(shca->ipz_hca_handle, e_newmr, e_origmr,
  1326. (u64)iova_start, hipz_acl, e_pd->fw_pd,
  1327. &hipzout);
  1328. if (h_ret != H_SUCCESS) {
  1329. ehca_err(&shca->ib_device, "hipz_reg_smr failed, h_ret=%lli "
  1330. "shca=%p e_origmr=%p e_newmr=%p iova_start=%p acl=%x "
  1331. "e_pd=%p hca_hndl=%llx mr_hndl=%llx lkey=%x",
  1332. h_ret, shca, e_origmr, e_newmr, iova_start, acl, e_pd,
  1333. shca->ipz_hca_handle.handle,
  1334. e_origmr->ipz_mr_handle.handle,
  1335. e_origmr->ib.ib_mr.lkey);
  1336. ret = ehca2ib_return_code(h_ret);
  1337. goto ehca_reg_smr_exit0;
  1338. }
  1339. /* successful registration */
  1340. e_newmr->num_kpages = e_origmr->num_kpages;
  1341. e_newmr->num_hwpages = e_origmr->num_hwpages;
  1342. e_newmr->hwpage_size = e_origmr->hwpage_size;
  1343. e_newmr->start = iova_start;
  1344. e_newmr->size = e_origmr->size;
  1345. e_newmr->acl = acl;
  1346. e_newmr->ipz_mr_handle = hipzout.handle;
  1347. *lkey = hipzout.lkey;
  1348. *rkey = hipzout.rkey;
  1349. return 0;
  1350. ehca_reg_smr_exit0:
  1351. if (ret)
  1352. ehca_err(&shca->ib_device, "ret=%i shca=%p e_origmr=%p "
  1353. "e_newmr=%p iova_start=%p acl=%x e_pd=%p",
  1354. ret, shca, e_origmr, e_newmr, iova_start, acl, e_pd);
  1355. return ret;
  1356. } /* end ehca_reg_smr() */
  1357. /*----------------------------------------------------------------------*/
  1358. static inline void *ehca_calc_sectbase(int top, int dir, int idx)
  1359. {
  1360. unsigned long ret = idx;
  1361. ret |= dir << EHCA_DIR_INDEX_SHIFT;
  1362. ret |= top << EHCA_TOP_INDEX_SHIFT;
  1363. return abs_to_virt(ret << SECTION_SIZE_BITS);
  1364. }
  1365. #define ehca_bmap_valid(entry) \
  1366. ((u64)entry != (u64)EHCA_INVAL_ADDR)
  1367. static u64 ehca_reg_mr_section(int top, int dir, int idx, u64 *kpage,
  1368. struct ehca_shca *shca, struct ehca_mr *mr,
  1369. struct ehca_mr_pginfo *pginfo)
  1370. {
  1371. u64 h_ret = 0;
  1372. unsigned long page = 0;
  1373. u64 rpage = virt_to_abs(kpage);
  1374. int page_count;
  1375. void *sectbase = ehca_calc_sectbase(top, dir, idx);
  1376. if ((unsigned long)sectbase & (pginfo->hwpage_size - 1)) {
  1377. ehca_err(&shca->ib_device, "reg_mr_section will probably fail:"
  1378. "hwpage_size does not fit to "
  1379. "section start address");
  1380. }
  1381. page_count = EHCA_SECTSIZE / pginfo->hwpage_size;
  1382. while (page < page_count) {
  1383. u64 rnum;
  1384. for (rnum = 0; (rnum < MAX_RPAGES) && (page < page_count);
  1385. rnum++) {
  1386. void *pg = sectbase + ((page++) * pginfo->hwpage_size);
  1387. kpage[rnum] = virt_to_abs(pg);
  1388. }
  1389. h_ret = hipz_h_register_rpage_mr(shca->ipz_hca_handle, mr,
  1390. ehca_encode_hwpage_size(pginfo->hwpage_size),
  1391. 0, rpage, rnum);
  1392. if ((h_ret != H_SUCCESS) && (h_ret != H_PAGE_REGISTERED)) {
  1393. ehca_err(&shca->ib_device, "register_rpage_mr failed");
  1394. return h_ret;
  1395. }
  1396. }
  1397. return h_ret;
  1398. }
  1399. static u64 ehca_reg_mr_sections(int top, int dir, u64 *kpage,
  1400. struct ehca_shca *shca, struct ehca_mr *mr,
  1401. struct ehca_mr_pginfo *pginfo)
  1402. {
  1403. u64 hret = H_SUCCESS;
  1404. int idx;
  1405. for (idx = 0; idx < EHCA_MAP_ENTRIES; idx++) {
  1406. if (!ehca_bmap_valid(ehca_bmap->top[top]->dir[dir]->ent[idx]))
  1407. continue;
  1408. hret = ehca_reg_mr_section(top, dir, idx, kpage, shca, mr,
  1409. pginfo);
  1410. if ((hret != H_SUCCESS) && (hret != H_PAGE_REGISTERED))
  1411. return hret;
  1412. }
  1413. return hret;
  1414. }
  1415. static u64 ehca_reg_mr_dir_sections(int top, u64 *kpage, struct ehca_shca *shca,
  1416. struct ehca_mr *mr,
  1417. struct ehca_mr_pginfo *pginfo)
  1418. {
  1419. u64 hret = H_SUCCESS;
  1420. int dir;
  1421. for (dir = 0; dir < EHCA_MAP_ENTRIES; dir++) {
  1422. if (!ehca_bmap_valid(ehca_bmap->top[top]->dir[dir]))
  1423. continue;
  1424. hret = ehca_reg_mr_sections(top, dir, kpage, shca, mr, pginfo);
  1425. if ((hret != H_SUCCESS) && (hret != H_PAGE_REGISTERED))
  1426. return hret;
  1427. }
  1428. return hret;
  1429. }
  1430. /* register internal max-MR to internal SHCA */
  1431. int ehca_reg_internal_maxmr(
  1432. struct ehca_shca *shca,
  1433. struct ehca_pd *e_pd,
  1434. struct ehca_mr **e_maxmr) /*OUT*/
  1435. {
  1436. int ret;
  1437. struct ehca_mr *e_mr;
  1438. u64 *iova_start;
  1439. u64 size_maxmr;
  1440. struct ehca_mr_pginfo pginfo;
  1441. struct ib_phys_buf ib_pbuf;
  1442. u32 num_kpages;
  1443. u32 num_hwpages;
  1444. u64 hw_pgsize;
  1445. if (!ehca_bmap) {
  1446. ret = -EFAULT;
  1447. goto ehca_reg_internal_maxmr_exit0;
  1448. }
  1449. e_mr = ehca_mr_new();
  1450. if (!e_mr) {
  1451. ehca_err(&shca->ib_device, "out of memory");
  1452. ret = -ENOMEM;
  1453. goto ehca_reg_internal_maxmr_exit0;
  1454. }
  1455. e_mr->flags |= EHCA_MR_FLAG_MAXMR;
  1456. /* register internal max-MR on HCA */
  1457. size_maxmr = ehca_mr_len;
  1458. iova_start = (u64 *)ehca_map_vaddr((void *)(KERNELBASE + PHYSICAL_START));
  1459. ib_pbuf.addr = 0;
  1460. ib_pbuf.size = size_maxmr;
  1461. num_kpages = NUM_CHUNKS(((u64)iova_start % PAGE_SIZE) + size_maxmr,
  1462. PAGE_SIZE);
  1463. hw_pgsize = ehca_get_max_hwpage_size(shca);
  1464. num_hwpages = NUM_CHUNKS(((u64)iova_start % hw_pgsize) + size_maxmr,
  1465. hw_pgsize);
  1466. memset(&pginfo, 0, sizeof(pginfo));
  1467. pginfo.type = EHCA_MR_PGI_PHYS;
  1468. pginfo.num_kpages = num_kpages;
  1469. pginfo.num_hwpages = num_hwpages;
  1470. pginfo.hwpage_size = hw_pgsize;
  1471. pginfo.u.phy.num_phys_buf = 1;
  1472. pginfo.u.phy.phys_buf_array = &ib_pbuf;
  1473. ret = ehca_reg_mr(shca, e_mr, iova_start, size_maxmr, 0, e_pd,
  1474. &pginfo, &e_mr->ib.ib_mr.lkey,
  1475. &e_mr->ib.ib_mr.rkey, EHCA_REG_BUSMAP_MR);
  1476. if (ret) {
  1477. ehca_err(&shca->ib_device, "reg of internal max MR failed, "
  1478. "e_mr=%p iova_start=%p size_maxmr=%llx num_kpages=%x "
  1479. "num_hwpages=%x", e_mr, iova_start, size_maxmr,
  1480. num_kpages, num_hwpages);
  1481. goto ehca_reg_internal_maxmr_exit1;
  1482. }
  1483. /* successful registration of all pages */
  1484. e_mr->ib.ib_mr.device = e_pd->ib_pd.device;
  1485. e_mr->ib.ib_mr.pd = &e_pd->ib_pd;
  1486. e_mr->ib.ib_mr.uobject = NULL;
  1487. atomic_inc(&(e_pd->ib_pd.usecnt));
  1488. atomic_set(&(e_mr->ib.ib_mr.usecnt), 0);
  1489. *e_maxmr = e_mr;
  1490. return 0;
  1491. ehca_reg_internal_maxmr_exit1:
  1492. ehca_mr_delete(e_mr);
  1493. ehca_reg_internal_maxmr_exit0:
  1494. if (ret)
  1495. ehca_err(&shca->ib_device, "ret=%i shca=%p e_pd=%p e_maxmr=%p",
  1496. ret, shca, e_pd, e_maxmr);
  1497. return ret;
  1498. } /* end ehca_reg_internal_maxmr() */
  1499. /*----------------------------------------------------------------------*/
  1500. int ehca_reg_maxmr(struct ehca_shca *shca,
  1501. struct ehca_mr *e_newmr,
  1502. u64 *iova_start,
  1503. int acl,
  1504. struct ehca_pd *e_pd,
  1505. u32 *lkey,
  1506. u32 *rkey)
  1507. {
  1508. u64 h_ret;
  1509. struct ehca_mr *e_origmr = shca->maxmr;
  1510. u32 hipz_acl;
  1511. struct ehca_mr_hipzout_parms hipzout;
  1512. ehca_mrmw_map_acl(acl, &hipz_acl);
  1513. ehca_mrmw_set_pgsize_hipz_acl(e_origmr->hwpage_size, &hipz_acl);
  1514. h_ret = hipz_h_register_smr(shca->ipz_hca_handle, e_newmr, e_origmr,
  1515. (u64)iova_start, hipz_acl, e_pd->fw_pd,
  1516. &hipzout);
  1517. if (h_ret != H_SUCCESS) {
  1518. ehca_err(&shca->ib_device, "hipz_reg_smr failed, h_ret=%lli "
  1519. "e_origmr=%p hca_hndl=%llx mr_hndl=%llx lkey=%x",
  1520. h_ret, e_origmr, shca->ipz_hca_handle.handle,
  1521. e_origmr->ipz_mr_handle.handle,
  1522. e_origmr->ib.ib_mr.lkey);
  1523. return ehca2ib_return_code(h_ret);
  1524. }
  1525. /* successful registration */
  1526. e_newmr->num_kpages = e_origmr->num_kpages;
  1527. e_newmr->num_hwpages = e_origmr->num_hwpages;
  1528. e_newmr->hwpage_size = e_origmr->hwpage_size;
  1529. e_newmr->start = iova_start;
  1530. e_newmr->size = e_origmr->size;
  1531. e_newmr->acl = acl;
  1532. e_newmr->ipz_mr_handle = hipzout.handle;
  1533. *lkey = hipzout.lkey;
  1534. *rkey = hipzout.rkey;
  1535. return 0;
  1536. } /* end ehca_reg_maxmr() */
  1537. /*----------------------------------------------------------------------*/
  1538. int ehca_dereg_internal_maxmr(struct ehca_shca *shca)
  1539. {
  1540. int ret;
  1541. struct ehca_mr *e_maxmr;
  1542. struct ib_pd *ib_pd;
  1543. if (!shca->maxmr) {
  1544. ehca_err(&shca->ib_device, "bad call, shca=%p", shca);
  1545. ret = -EINVAL;
  1546. goto ehca_dereg_internal_maxmr_exit0;
  1547. }
  1548. e_maxmr = shca->maxmr;
  1549. ib_pd = e_maxmr->ib.ib_mr.pd;
  1550. shca->maxmr = NULL; /* remove internal max-MR indication from SHCA */
  1551. ret = ehca_dereg_mr(&e_maxmr->ib.ib_mr);
  1552. if (ret) {
  1553. ehca_err(&shca->ib_device, "dereg internal max-MR failed, "
  1554. "ret=%i e_maxmr=%p shca=%p lkey=%x",
  1555. ret, e_maxmr, shca, e_maxmr->ib.ib_mr.lkey);
  1556. shca->maxmr = e_maxmr;
  1557. goto ehca_dereg_internal_maxmr_exit0;
  1558. }
  1559. atomic_dec(&ib_pd->usecnt);
  1560. ehca_dereg_internal_maxmr_exit0:
  1561. if (ret)
  1562. ehca_err(&shca->ib_device, "ret=%i shca=%p shca->maxmr=%p",
  1563. ret, shca, shca->maxmr);
  1564. return ret;
  1565. } /* end ehca_dereg_internal_maxmr() */
  1566. /*----------------------------------------------------------------------*/
  1567. /*
  1568. * check physical buffer array of MR verbs for validness and
  1569. * calculates MR size
  1570. */
  1571. int ehca_mr_chk_buf_and_calc_size(struct ib_phys_buf *phys_buf_array,
  1572. int num_phys_buf,
  1573. u64 *iova_start,
  1574. u64 *size)
  1575. {
  1576. struct ib_phys_buf *pbuf = phys_buf_array;
  1577. u64 size_count = 0;
  1578. u32 i;
  1579. if (num_phys_buf == 0) {
  1580. ehca_gen_err("bad phys buf array len, num_phys_buf=0");
  1581. return -EINVAL;
  1582. }
  1583. /* check first buffer */
  1584. if (((u64)iova_start & ~PAGE_MASK) != (pbuf->addr & ~PAGE_MASK)) {
  1585. ehca_gen_err("iova_start/addr mismatch, iova_start=%p "
  1586. "pbuf->addr=%llx pbuf->size=%llx",
  1587. iova_start, pbuf->addr, pbuf->size);
  1588. return -EINVAL;
  1589. }
  1590. if (((pbuf->addr + pbuf->size) % PAGE_SIZE) &&
  1591. (num_phys_buf > 1)) {
  1592. ehca_gen_err("addr/size mismatch in 1st buf, pbuf->addr=%llx "
  1593. "pbuf->size=%llx", pbuf->addr, pbuf->size);
  1594. return -EINVAL;
  1595. }
  1596. for (i = 0; i < num_phys_buf; i++) {
  1597. if ((i > 0) && (pbuf->addr % PAGE_SIZE)) {
  1598. ehca_gen_err("bad address, i=%x pbuf->addr=%llx "
  1599. "pbuf->size=%llx",
  1600. i, pbuf->addr, pbuf->size);
  1601. return -EINVAL;
  1602. }
  1603. if (((i > 0) && /* not 1st */
  1604. (i < (num_phys_buf - 1)) && /* not last */
  1605. (pbuf->size % PAGE_SIZE)) || (pbuf->size == 0)) {
  1606. ehca_gen_err("bad size, i=%x pbuf->size=%llx",
  1607. i, pbuf->size);
  1608. return -EINVAL;
  1609. }
  1610. size_count += pbuf->size;
  1611. pbuf++;
  1612. }
  1613. *size = size_count;
  1614. return 0;
  1615. } /* end ehca_mr_chk_buf_and_calc_size() */
  1616. /*----------------------------------------------------------------------*/
  1617. /* check page list of map FMR verb for validness */
  1618. int ehca_fmr_check_page_list(struct ehca_mr *e_fmr,
  1619. u64 *page_list,
  1620. int list_len)
  1621. {
  1622. u32 i;
  1623. u64 *page;
  1624. if ((list_len == 0) || (list_len > e_fmr->fmr_max_pages)) {
  1625. ehca_gen_err("bad list_len, list_len=%x "
  1626. "e_fmr->fmr_max_pages=%x fmr=%p",
  1627. list_len, e_fmr->fmr_max_pages, e_fmr);
  1628. return -EINVAL;
  1629. }
  1630. /* each page must be aligned */
  1631. page = page_list;
  1632. for (i = 0; i < list_len; i++) {
  1633. if (*page % e_fmr->fmr_page_size) {
  1634. ehca_gen_err("bad page, i=%x *page=%llx page=%p fmr=%p "
  1635. "fmr_page_size=%x", i, *page, page, e_fmr,
  1636. e_fmr->fmr_page_size);
  1637. return -EINVAL;
  1638. }
  1639. page++;
  1640. }
  1641. return 0;
  1642. } /* end ehca_fmr_check_page_list() */
  1643. /*----------------------------------------------------------------------*/
  1644. /* PAGE_SIZE >= pginfo->hwpage_size */
  1645. static int ehca_set_pagebuf_user1(struct ehca_mr_pginfo *pginfo,
  1646. u32 number,
  1647. u64 *kpage)
  1648. {
  1649. int ret = 0;
  1650. struct ib_umem_chunk *prev_chunk;
  1651. struct ib_umem_chunk *chunk;
  1652. u64 pgaddr;
  1653. u32 i = 0;
  1654. u32 j = 0;
  1655. int hwpages_per_kpage = PAGE_SIZE / pginfo->hwpage_size;
  1656. /* loop over desired chunk entries */
  1657. chunk = pginfo->u.usr.next_chunk;
  1658. prev_chunk = pginfo->u.usr.next_chunk;
  1659. list_for_each_entry_continue(
  1660. chunk, (&(pginfo->u.usr.region->chunk_list)), list) {
  1661. for (i = pginfo->u.usr.next_nmap; i < chunk->nmap; ) {
  1662. pgaddr = page_to_pfn(sg_page(&chunk->page_list[i]))
  1663. << PAGE_SHIFT ;
  1664. *kpage = phys_to_abs(pgaddr +
  1665. (pginfo->next_hwpage *
  1666. pginfo->hwpage_size));
  1667. if ( !(*kpage) ) {
  1668. ehca_gen_err("pgaddr=%llx "
  1669. "chunk->page_list[i]=%llx "
  1670. "i=%x next_hwpage=%llx",
  1671. pgaddr, (u64)sg_dma_address(
  1672. &chunk->page_list[i]),
  1673. i, pginfo->next_hwpage);
  1674. return -EFAULT;
  1675. }
  1676. (pginfo->hwpage_cnt)++;
  1677. (pginfo->next_hwpage)++;
  1678. kpage++;
  1679. if (pginfo->next_hwpage % hwpages_per_kpage == 0) {
  1680. (pginfo->kpage_cnt)++;
  1681. (pginfo->u.usr.next_nmap)++;
  1682. pginfo->next_hwpage = 0;
  1683. i++;
  1684. }
  1685. j++;
  1686. if (j >= number) break;
  1687. }
  1688. if ((pginfo->u.usr.next_nmap >= chunk->nmap) &&
  1689. (j >= number)) {
  1690. pginfo->u.usr.next_nmap = 0;
  1691. prev_chunk = chunk;
  1692. break;
  1693. } else if (pginfo->u.usr.next_nmap >= chunk->nmap) {
  1694. pginfo->u.usr.next_nmap = 0;
  1695. prev_chunk = chunk;
  1696. } else if (j >= number)
  1697. break;
  1698. else
  1699. prev_chunk = chunk;
  1700. }
  1701. pginfo->u.usr.next_chunk =
  1702. list_prepare_entry(prev_chunk,
  1703. (&(pginfo->u.usr.region->chunk_list)),
  1704. list);
  1705. return ret;
  1706. }
  1707. /*
  1708. * check given pages for contiguous layout
  1709. * last page addr is returned in prev_pgaddr for further check
  1710. */
  1711. static int ehca_check_kpages_per_ate(struct scatterlist *page_list,
  1712. int start_idx, int end_idx,
  1713. u64 *prev_pgaddr)
  1714. {
  1715. int t;
  1716. for (t = start_idx; t <= end_idx; t++) {
  1717. u64 pgaddr = page_to_pfn(sg_page(&page_list[t])) << PAGE_SHIFT;
  1718. if (ehca_debug_level >= 3)
  1719. ehca_gen_dbg("chunk_page=%llx value=%016llx", pgaddr,
  1720. *(u64 *)abs_to_virt(phys_to_abs(pgaddr)));
  1721. if (pgaddr - PAGE_SIZE != *prev_pgaddr) {
  1722. ehca_gen_err("uncontiguous page found pgaddr=%llx "
  1723. "prev_pgaddr=%llx page_list_i=%x",
  1724. pgaddr, *prev_pgaddr, t);
  1725. return -EINVAL;
  1726. }
  1727. *prev_pgaddr = pgaddr;
  1728. }
  1729. return 0;
  1730. }
  1731. /* PAGE_SIZE < pginfo->hwpage_size */
  1732. static int ehca_set_pagebuf_user2(struct ehca_mr_pginfo *pginfo,
  1733. u32 number,
  1734. u64 *kpage)
  1735. {
  1736. int ret = 0;
  1737. struct ib_umem_chunk *prev_chunk;
  1738. struct ib_umem_chunk *chunk;
  1739. u64 pgaddr, prev_pgaddr;
  1740. u32 i = 0;
  1741. u32 j = 0;
  1742. int kpages_per_hwpage = pginfo->hwpage_size / PAGE_SIZE;
  1743. int nr_kpages = kpages_per_hwpage;
  1744. /* loop over desired chunk entries */
  1745. chunk = pginfo->u.usr.next_chunk;
  1746. prev_chunk = pginfo->u.usr.next_chunk;
  1747. list_for_each_entry_continue(
  1748. chunk, (&(pginfo->u.usr.region->chunk_list)), list) {
  1749. for (i = pginfo->u.usr.next_nmap; i < chunk->nmap; ) {
  1750. if (nr_kpages == kpages_per_hwpage) {
  1751. pgaddr = ( page_to_pfn(sg_page(&chunk->page_list[i]))
  1752. << PAGE_SHIFT );
  1753. *kpage = phys_to_abs(pgaddr);
  1754. if ( !(*kpage) ) {
  1755. ehca_gen_err("pgaddr=%llx i=%x",
  1756. pgaddr, i);
  1757. ret = -EFAULT;
  1758. return ret;
  1759. }
  1760. /*
  1761. * The first page in a hwpage must be aligned;
  1762. * the first MR page is exempt from this rule.
  1763. */
  1764. if (pgaddr & (pginfo->hwpage_size - 1)) {
  1765. if (pginfo->hwpage_cnt) {
  1766. ehca_gen_err(
  1767. "invalid alignment "
  1768. "pgaddr=%llx i=%x "
  1769. "mr_pgsize=%llx",
  1770. pgaddr, i,
  1771. pginfo->hwpage_size);
  1772. ret = -EFAULT;
  1773. return ret;
  1774. }
  1775. /* first MR page */
  1776. pginfo->kpage_cnt =
  1777. (pgaddr &
  1778. (pginfo->hwpage_size - 1)) >>
  1779. PAGE_SHIFT;
  1780. nr_kpages -= pginfo->kpage_cnt;
  1781. *kpage = phys_to_abs(
  1782. pgaddr &
  1783. ~(pginfo->hwpage_size - 1));
  1784. }
  1785. if (ehca_debug_level >= 3) {
  1786. u64 val = *(u64 *)abs_to_virt(
  1787. phys_to_abs(pgaddr));
  1788. ehca_gen_dbg("kpage=%llx chunk_page=%llx "
  1789. "value=%016llx",
  1790. *kpage, pgaddr, val);
  1791. }
  1792. prev_pgaddr = pgaddr;
  1793. i++;
  1794. pginfo->kpage_cnt++;
  1795. pginfo->u.usr.next_nmap++;
  1796. nr_kpages--;
  1797. if (!nr_kpages)
  1798. goto next_kpage;
  1799. continue;
  1800. }
  1801. if (i + nr_kpages > chunk->nmap) {
  1802. ret = ehca_check_kpages_per_ate(
  1803. chunk->page_list, i,
  1804. chunk->nmap - 1, &prev_pgaddr);
  1805. if (ret) return ret;
  1806. pginfo->kpage_cnt += chunk->nmap - i;
  1807. pginfo->u.usr.next_nmap += chunk->nmap - i;
  1808. nr_kpages -= chunk->nmap - i;
  1809. break;
  1810. }
  1811. ret = ehca_check_kpages_per_ate(chunk->page_list, i,
  1812. i + nr_kpages - 1,
  1813. &prev_pgaddr);
  1814. if (ret) return ret;
  1815. i += nr_kpages;
  1816. pginfo->kpage_cnt += nr_kpages;
  1817. pginfo->u.usr.next_nmap += nr_kpages;
  1818. next_kpage:
  1819. nr_kpages = kpages_per_hwpage;
  1820. (pginfo->hwpage_cnt)++;
  1821. kpage++;
  1822. j++;
  1823. if (j >= number) break;
  1824. }
  1825. if ((pginfo->u.usr.next_nmap >= chunk->nmap) &&
  1826. (j >= number)) {
  1827. pginfo->u.usr.next_nmap = 0;
  1828. prev_chunk = chunk;
  1829. break;
  1830. } else if (pginfo->u.usr.next_nmap >= chunk->nmap) {
  1831. pginfo->u.usr.next_nmap = 0;
  1832. prev_chunk = chunk;
  1833. } else if (j >= number)
  1834. break;
  1835. else
  1836. prev_chunk = chunk;
  1837. }
  1838. pginfo->u.usr.next_chunk =
  1839. list_prepare_entry(prev_chunk,
  1840. (&(pginfo->u.usr.region->chunk_list)),
  1841. list);
  1842. return ret;
  1843. }
  1844. static int ehca_set_pagebuf_phys(struct ehca_mr_pginfo *pginfo,
  1845. u32 number, u64 *kpage)
  1846. {
  1847. int ret = 0;
  1848. struct ib_phys_buf *pbuf;
  1849. u64 num_hw, offs_hw;
  1850. u32 i = 0;
  1851. /* loop over desired phys_buf_array entries */
  1852. while (i < number) {
  1853. pbuf = pginfo->u.phy.phys_buf_array + pginfo->u.phy.next_buf;
  1854. num_hw = NUM_CHUNKS((pbuf->addr % pginfo->hwpage_size) +
  1855. pbuf->size, pginfo->hwpage_size);
  1856. offs_hw = (pbuf->addr & ~(pginfo->hwpage_size - 1)) /
  1857. pginfo->hwpage_size;
  1858. while (pginfo->next_hwpage < offs_hw + num_hw) {
  1859. /* sanity check */
  1860. if ((pginfo->kpage_cnt >= pginfo->num_kpages) ||
  1861. (pginfo->hwpage_cnt >= pginfo->num_hwpages)) {
  1862. ehca_gen_err("kpage_cnt >= num_kpages, "
  1863. "kpage_cnt=%llx num_kpages=%llx "
  1864. "hwpage_cnt=%llx "
  1865. "num_hwpages=%llx i=%x",
  1866. pginfo->kpage_cnt,
  1867. pginfo->num_kpages,
  1868. pginfo->hwpage_cnt,
  1869. pginfo->num_hwpages, i);
  1870. return -EFAULT;
  1871. }
  1872. *kpage = phys_to_abs(
  1873. (pbuf->addr & ~(pginfo->hwpage_size - 1)) +
  1874. (pginfo->next_hwpage * pginfo->hwpage_size));
  1875. if ( !(*kpage) && pbuf->addr ) {
  1876. ehca_gen_err("pbuf->addr=%llx pbuf->size=%llx "
  1877. "next_hwpage=%llx", pbuf->addr,
  1878. pbuf->size, pginfo->next_hwpage);
  1879. return -EFAULT;
  1880. }
  1881. (pginfo->hwpage_cnt)++;
  1882. (pginfo->next_hwpage)++;
  1883. if (PAGE_SIZE >= pginfo->hwpage_size) {
  1884. if (pginfo->next_hwpage %
  1885. (PAGE_SIZE / pginfo->hwpage_size) == 0)
  1886. (pginfo->kpage_cnt)++;
  1887. } else
  1888. pginfo->kpage_cnt += pginfo->hwpage_size /
  1889. PAGE_SIZE;
  1890. kpage++;
  1891. i++;
  1892. if (i >= number) break;
  1893. }
  1894. if (pginfo->next_hwpage >= offs_hw + num_hw) {
  1895. (pginfo->u.phy.next_buf)++;
  1896. pginfo->next_hwpage = 0;
  1897. }
  1898. }
  1899. return ret;
  1900. }
  1901. static int ehca_set_pagebuf_fmr(struct ehca_mr_pginfo *pginfo,
  1902. u32 number, u64 *kpage)
  1903. {
  1904. int ret = 0;
  1905. u64 *fmrlist;
  1906. u32 i;
  1907. /* loop over desired page_list entries */
  1908. fmrlist = pginfo->u.fmr.page_list + pginfo->u.fmr.next_listelem;
  1909. for (i = 0; i < number; i++) {
  1910. *kpage = phys_to_abs((*fmrlist & ~(pginfo->hwpage_size - 1)) +
  1911. pginfo->next_hwpage * pginfo->hwpage_size);
  1912. if ( !(*kpage) ) {
  1913. ehca_gen_err("*fmrlist=%llx fmrlist=%p "
  1914. "next_listelem=%llx next_hwpage=%llx",
  1915. *fmrlist, fmrlist,
  1916. pginfo->u.fmr.next_listelem,
  1917. pginfo->next_hwpage);
  1918. return -EFAULT;
  1919. }
  1920. (pginfo->hwpage_cnt)++;
  1921. if (pginfo->u.fmr.fmr_pgsize >= pginfo->hwpage_size) {
  1922. if (pginfo->next_hwpage %
  1923. (pginfo->u.fmr.fmr_pgsize /
  1924. pginfo->hwpage_size) == 0) {
  1925. (pginfo->kpage_cnt)++;
  1926. (pginfo->u.fmr.next_listelem)++;
  1927. fmrlist++;
  1928. pginfo->next_hwpage = 0;
  1929. } else
  1930. (pginfo->next_hwpage)++;
  1931. } else {
  1932. unsigned int cnt_per_hwpage = pginfo->hwpage_size /
  1933. pginfo->u.fmr.fmr_pgsize;
  1934. unsigned int j;
  1935. u64 prev = *kpage;
  1936. /* check if adrs are contiguous */
  1937. for (j = 1; j < cnt_per_hwpage; j++) {
  1938. u64 p = phys_to_abs(fmrlist[j] &
  1939. ~(pginfo->hwpage_size - 1));
  1940. if (prev + pginfo->u.fmr.fmr_pgsize != p) {
  1941. ehca_gen_err("uncontiguous fmr pages "
  1942. "found prev=%llx p=%llx "
  1943. "idx=%x", prev, p, i + j);
  1944. return -EINVAL;
  1945. }
  1946. prev = p;
  1947. }
  1948. pginfo->kpage_cnt += cnt_per_hwpage;
  1949. pginfo->u.fmr.next_listelem += cnt_per_hwpage;
  1950. fmrlist += cnt_per_hwpage;
  1951. }
  1952. kpage++;
  1953. }
  1954. return ret;
  1955. }
  1956. /* setup page buffer from page info */
  1957. int ehca_set_pagebuf(struct ehca_mr_pginfo *pginfo,
  1958. u32 number,
  1959. u64 *kpage)
  1960. {
  1961. int ret;
  1962. switch (pginfo->type) {
  1963. case EHCA_MR_PGI_PHYS:
  1964. ret = ehca_set_pagebuf_phys(pginfo, number, kpage);
  1965. break;
  1966. case EHCA_MR_PGI_USER:
  1967. ret = PAGE_SIZE >= pginfo->hwpage_size ?
  1968. ehca_set_pagebuf_user1(pginfo, number, kpage) :
  1969. ehca_set_pagebuf_user2(pginfo, number, kpage);
  1970. break;
  1971. case EHCA_MR_PGI_FMR:
  1972. ret = ehca_set_pagebuf_fmr(pginfo, number, kpage);
  1973. break;
  1974. default:
  1975. ehca_gen_err("bad pginfo->type=%x", pginfo->type);
  1976. ret = -EFAULT;
  1977. break;
  1978. }
  1979. return ret;
  1980. } /* end ehca_set_pagebuf() */
  1981. /*----------------------------------------------------------------------*/
  1982. /*
  1983. * check MR if it is a max-MR, i.e. uses whole memory
  1984. * in case it's a max-MR 1 is returned, else 0
  1985. */
  1986. int ehca_mr_is_maxmr(u64 size,
  1987. u64 *iova_start)
  1988. {
  1989. /* a MR is treated as max-MR only if it fits following: */
  1990. if ((size == ehca_mr_len) &&
  1991. (iova_start == (void *)ehca_map_vaddr((void *)(KERNELBASE + PHYSICAL_START)))) {
  1992. ehca_gen_dbg("this is a max-MR");
  1993. return 1;
  1994. } else
  1995. return 0;
  1996. } /* end ehca_mr_is_maxmr() */
  1997. /*----------------------------------------------------------------------*/
  1998. /* map access control for MR/MW. This routine is used for MR and MW. */
  1999. void ehca_mrmw_map_acl(int ib_acl,
  2000. u32 *hipz_acl)
  2001. {
  2002. *hipz_acl = 0;
  2003. if (ib_acl & IB_ACCESS_REMOTE_READ)
  2004. *hipz_acl |= HIPZ_ACCESSCTRL_R_READ;
  2005. if (ib_acl & IB_ACCESS_REMOTE_WRITE)
  2006. *hipz_acl |= HIPZ_ACCESSCTRL_R_WRITE;
  2007. if (ib_acl & IB_ACCESS_REMOTE_ATOMIC)
  2008. *hipz_acl |= HIPZ_ACCESSCTRL_R_ATOMIC;
  2009. if (ib_acl & IB_ACCESS_LOCAL_WRITE)
  2010. *hipz_acl |= HIPZ_ACCESSCTRL_L_WRITE;
  2011. if (ib_acl & IB_ACCESS_MW_BIND)
  2012. *hipz_acl |= HIPZ_ACCESSCTRL_MW_BIND;
  2013. } /* end ehca_mrmw_map_acl() */
  2014. /*----------------------------------------------------------------------*/
  2015. /* sets page size in hipz access control for MR/MW. */
  2016. void ehca_mrmw_set_pgsize_hipz_acl(u32 pgsize, u32 *hipz_acl) /*INOUT*/
  2017. {
  2018. *hipz_acl |= (ehca_encode_hwpage_size(pgsize) << 24);
  2019. } /* end ehca_mrmw_set_pgsize_hipz_acl() */
  2020. /*----------------------------------------------------------------------*/
  2021. /*
  2022. * reverse map access control for MR/MW.
  2023. * This routine is used for MR and MW.
  2024. */
  2025. void ehca_mrmw_reverse_map_acl(const u32 *hipz_acl,
  2026. int *ib_acl) /*OUT*/
  2027. {
  2028. *ib_acl = 0;
  2029. if (*hipz_acl & HIPZ_ACCESSCTRL_R_READ)
  2030. *ib_acl |= IB_ACCESS_REMOTE_READ;
  2031. if (*hipz_acl & HIPZ_ACCESSCTRL_R_WRITE)
  2032. *ib_acl |= IB_ACCESS_REMOTE_WRITE;
  2033. if (*hipz_acl & HIPZ_ACCESSCTRL_R_ATOMIC)
  2034. *ib_acl |= IB_ACCESS_REMOTE_ATOMIC;
  2035. if (*hipz_acl & HIPZ_ACCESSCTRL_L_WRITE)
  2036. *ib_acl |= IB_ACCESS_LOCAL_WRITE;
  2037. if (*hipz_acl & HIPZ_ACCESSCTRL_MW_BIND)
  2038. *ib_acl |= IB_ACCESS_MW_BIND;
  2039. } /* end ehca_mrmw_reverse_map_acl() */
  2040. /*----------------------------------------------------------------------*/
  2041. /*
  2042. * MR destructor and constructor
  2043. * used in Reregister MR verb, sets all fields in ehca_mr_t to 0,
  2044. * except struct ib_mr and spinlock
  2045. */
  2046. void ehca_mr_deletenew(struct ehca_mr *mr)
  2047. {
  2048. mr->flags = 0;
  2049. mr->num_kpages = 0;
  2050. mr->num_hwpages = 0;
  2051. mr->acl = 0;
  2052. mr->start = NULL;
  2053. mr->fmr_page_size = 0;
  2054. mr->fmr_max_pages = 0;
  2055. mr->fmr_max_maps = 0;
  2056. mr->fmr_map_cnt = 0;
  2057. memset(&mr->ipz_mr_handle, 0, sizeof(mr->ipz_mr_handle));
  2058. memset(&mr->galpas, 0, sizeof(mr->galpas));
  2059. } /* end ehca_mr_deletenew() */
  2060. int ehca_init_mrmw_cache(void)
  2061. {
  2062. mr_cache = kmem_cache_create("ehca_cache_mr",
  2063. sizeof(struct ehca_mr), 0,
  2064. SLAB_HWCACHE_ALIGN,
  2065. NULL);
  2066. if (!mr_cache)
  2067. return -ENOMEM;
  2068. mw_cache = kmem_cache_create("ehca_cache_mw",
  2069. sizeof(struct ehca_mw), 0,
  2070. SLAB_HWCACHE_ALIGN,
  2071. NULL);
  2072. if (!mw_cache) {
  2073. kmem_cache_destroy(mr_cache);
  2074. mr_cache = NULL;
  2075. return -ENOMEM;
  2076. }
  2077. return 0;
  2078. }
  2079. void ehca_cleanup_mrmw_cache(void)
  2080. {
  2081. if (mr_cache)
  2082. kmem_cache_destroy(mr_cache);
  2083. if (mw_cache)
  2084. kmem_cache_destroy(mw_cache);
  2085. }
  2086. static inline int ehca_init_top_bmap(struct ehca_top_bmap *ehca_top_bmap,
  2087. int dir)
  2088. {
  2089. if (!ehca_bmap_valid(ehca_top_bmap->dir[dir])) {
  2090. ehca_top_bmap->dir[dir] =
  2091. kmalloc(sizeof(struct ehca_dir_bmap), GFP_KERNEL);
  2092. if (!ehca_top_bmap->dir[dir])
  2093. return -ENOMEM;
  2094. /* Set map block to 0xFF according to EHCA_INVAL_ADDR */
  2095. memset(ehca_top_bmap->dir[dir], 0xFF, EHCA_ENT_MAP_SIZE);
  2096. }
  2097. return 0;
  2098. }
  2099. static inline int ehca_init_bmap(struct ehca_bmap *ehca_bmap, int top, int dir)
  2100. {
  2101. if (!ehca_bmap_valid(ehca_bmap->top[top])) {
  2102. ehca_bmap->top[top] =
  2103. kmalloc(sizeof(struct ehca_top_bmap), GFP_KERNEL);
  2104. if (!ehca_bmap->top[top])
  2105. return -ENOMEM;
  2106. /* Set map block to 0xFF according to EHCA_INVAL_ADDR */
  2107. memset(ehca_bmap->top[top], 0xFF, EHCA_DIR_MAP_SIZE);
  2108. }
  2109. return ehca_init_top_bmap(ehca_bmap->top[top], dir);
  2110. }
  2111. static inline int ehca_calc_index(unsigned long i, unsigned long s)
  2112. {
  2113. return (i >> s) & EHCA_INDEX_MASK;
  2114. }
  2115. void ehca_destroy_busmap(void)
  2116. {
  2117. int top, dir;
  2118. if (!ehca_bmap)
  2119. return;
  2120. for (top = 0; top < EHCA_MAP_ENTRIES; top++) {
  2121. if (!ehca_bmap_valid(ehca_bmap->top[top]))
  2122. continue;
  2123. for (dir = 0; dir < EHCA_MAP_ENTRIES; dir++) {
  2124. if (!ehca_bmap_valid(ehca_bmap->top[top]->dir[dir]))
  2125. continue;
  2126. kfree(ehca_bmap->top[top]->dir[dir]);
  2127. }
  2128. kfree(ehca_bmap->top[top]);
  2129. }
  2130. kfree(ehca_bmap);
  2131. ehca_bmap = NULL;
  2132. }
  2133. static int ehca_update_busmap(unsigned long pfn, unsigned long nr_pages)
  2134. {
  2135. unsigned long i, start_section, end_section;
  2136. int top, dir, idx;
  2137. if (!nr_pages)
  2138. return 0;
  2139. if (!ehca_bmap) {
  2140. ehca_bmap = kmalloc(sizeof(struct ehca_bmap), GFP_KERNEL);
  2141. if (!ehca_bmap)
  2142. return -ENOMEM;
  2143. /* Set map block to 0xFF according to EHCA_INVAL_ADDR */
  2144. memset(ehca_bmap, 0xFF, EHCA_TOP_MAP_SIZE);
  2145. }
  2146. start_section = phys_to_abs(pfn * PAGE_SIZE) / EHCA_SECTSIZE;
  2147. end_section = phys_to_abs((pfn + nr_pages) * PAGE_SIZE) / EHCA_SECTSIZE;
  2148. for (i = start_section; i < end_section; i++) {
  2149. int ret;
  2150. top = ehca_calc_index(i, EHCA_TOP_INDEX_SHIFT);
  2151. dir = ehca_calc_index(i, EHCA_DIR_INDEX_SHIFT);
  2152. idx = i & EHCA_INDEX_MASK;
  2153. ret = ehca_init_bmap(ehca_bmap, top, dir);
  2154. if (ret) {
  2155. ehca_destroy_busmap();
  2156. return ret;
  2157. }
  2158. ehca_bmap->top[top]->dir[dir]->ent[idx] = ehca_mr_len;
  2159. ehca_mr_len += EHCA_SECTSIZE;
  2160. }
  2161. return 0;
  2162. }
  2163. static int ehca_is_hugepage(unsigned long pfn)
  2164. {
  2165. int page_order;
  2166. if (pfn & EHCA_HUGEPAGE_PFN_MASK)
  2167. return 0;
  2168. page_order = compound_order(pfn_to_page(pfn));
  2169. if (page_order + PAGE_SHIFT != EHCA_HUGEPAGESHIFT)
  2170. return 0;
  2171. return 1;
  2172. }
  2173. static int ehca_create_busmap_callback(unsigned long initial_pfn,
  2174. unsigned long total_nr_pages, void *arg)
  2175. {
  2176. int ret;
  2177. unsigned long pfn, start_pfn, end_pfn, nr_pages;
  2178. if ((total_nr_pages * PAGE_SIZE) < EHCA_HUGEPAGE_SIZE)
  2179. return ehca_update_busmap(initial_pfn, total_nr_pages);
  2180. /* Given chunk is >= 16GB -> check for hugepages */
  2181. start_pfn = initial_pfn;
  2182. end_pfn = initial_pfn + total_nr_pages;
  2183. pfn = start_pfn;
  2184. while (pfn < end_pfn) {
  2185. if (ehca_is_hugepage(pfn)) {
  2186. /* Add mem found in front of the hugepage */
  2187. nr_pages = pfn - start_pfn;
  2188. ret = ehca_update_busmap(start_pfn, nr_pages);
  2189. if (ret)
  2190. return ret;
  2191. /* Skip the hugepage */
  2192. pfn += (EHCA_HUGEPAGE_SIZE / PAGE_SIZE);
  2193. start_pfn = pfn;
  2194. } else
  2195. pfn += (EHCA_SECTSIZE / PAGE_SIZE);
  2196. }
  2197. /* Add mem found behind the hugepage(s) */
  2198. nr_pages = pfn - start_pfn;
  2199. return ehca_update_busmap(start_pfn, nr_pages);
  2200. }
  2201. int ehca_create_busmap(void)
  2202. {
  2203. int ret;
  2204. ehca_mr_len = 0;
  2205. ret = walk_system_ram_range(0, 1ULL << MAX_PHYSMEM_BITS, NULL,
  2206. ehca_create_busmap_callback);
  2207. return ret;
  2208. }
  2209. static int ehca_reg_bmap_mr_rpages(struct ehca_shca *shca,
  2210. struct ehca_mr *e_mr,
  2211. struct ehca_mr_pginfo *pginfo)
  2212. {
  2213. int top;
  2214. u64 hret, *kpage;
  2215. kpage = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
  2216. if (!kpage) {
  2217. ehca_err(&shca->ib_device, "kpage alloc failed");
  2218. return -ENOMEM;
  2219. }
  2220. for (top = 0; top < EHCA_MAP_ENTRIES; top++) {
  2221. if (!ehca_bmap_valid(ehca_bmap->top[top]))
  2222. continue;
  2223. hret = ehca_reg_mr_dir_sections(top, kpage, shca, e_mr, pginfo);
  2224. if ((hret != H_PAGE_REGISTERED) && (hret != H_SUCCESS))
  2225. break;
  2226. }
  2227. ehca_free_fw_ctrlblock(kpage);
  2228. if (hret == H_SUCCESS)
  2229. return 0; /* Everything is fine */
  2230. else {
  2231. ehca_err(&shca->ib_device, "ehca_reg_bmap_mr_rpages failed, "
  2232. "h_ret=%lli e_mr=%p top=%x lkey=%x "
  2233. "hca_hndl=%llx mr_hndl=%llx", hret, e_mr, top,
  2234. e_mr->ib.ib_mr.lkey,
  2235. shca->ipz_hca_handle.handle,
  2236. e_mr->ipz_mr_handle.handle);
  2237. return ehca2ib_return_code(hret);
  2238. }
  2239. }
  2240. static u64 ehca_map_vaddr(void *caddr)
  2241. {
  2242. int top, dir, idx;
  2243. unsigned long abs_addr, offset;
  2244. u64 entry;
  2245. if (!ehca_bmap)
  2246. return EHCA_INVAL_ADDR;
  2247. abs_addr = virt_to_abs(caddr);
  2248. top = ehca_calc_index(abs_addr, EHCA_TOP_INDEX_SHIFT + EHCA_SECTSHIFT);
  2249. if (!ehca_bmap_valid(ehca_bmap->top[top]))
  2250. return EHCA_INVAL_ADDR;
  2251. dir = ehca_calc_index(abs_addr, EHCA_DIR_INDEX_SHIFT + EHCA_SECTSHIFT);
  2252. if (!ehca_bmap_valid(ehca_bmap->top[top]->dir[dir]))
  2253. return EHCA_INVAL_ADDR;
  2254. idx = ehca_calc_index(abs_addr, EHCA_SECTSHIFT);
  2255. entry = ehca_bmap->top[top]->dir[dir]->ent[idx];
  2256. if (ehca_bmap_valid(entry)) {
  2257. offset = (unsigned long)caddr & (EHCA_SECTSIZE - 1);
  2258. return entry | offset;
  2259. } else
  2260. return EHCA_INVAL_ADDR;
  2261. }
  2262. static int ehca_dma_mapping_error(struct ib_device *dev, u64 dma_addr)
  2263. {
  2264. return dma_addr == EHCA_INVAL_ADDR;
  2265. }
  2266. static u64 ehca_dma_map_single(struct ib_device *dev, void *cpu_addr,
  2267. size_t size, enum dma_data_direction direction)
  2268. {
  2269. if (cpu_addr)
  2270. return ehca_map_vaddr(cpu_addr);
  2271. else
  2272. return EHCA_INVAL_ADDR;
  2273. }
  2274. static void ehca_dma_unmap_single(struct ib_device *dev, u64 addr, size_t size,
  2275. enum dma_data_direction direction)
  2276. {
  2277. /* This is only a stub; nothing to be done here */
  2278. }
  2279. static u64 ehca_dma_map_page(struct ib_device *dev, struct page *page,
  2280. unsigned long offset, size_t size,
  2281. enum dma_data_direction direction)
  2282. {
  2283. u64 addr;
  2284. if (offset + size > PAGE_SIZE)
  2285. return EHCA_INVAL_ADDR;
  2286. addr = ehca_map_vaddr(page_address(page));
  2287. if (!ehca_dma_mapping_error(dev, addr))
  2288. addr += offset;
  2289. return addr;
  2290. }
  2291. static void ehca_dma_unmap_page(struct ib_device *dev, u64 addr, size_t size,
  2292. enum dma_data_direction direction)
  2293. {
  2294. /* This is only a stub; nothing to be done here */
  2295. }
  2296. static int ehca_dma_map_sg(struct ib_device *dev, struct scatterlist *sgl,
  2297. int nents, enum dma_data_direction direction)
  2298. {
  2299. struct scatterlist *sg;
  2300. int i;
  2301. for_each_sg(sgl, sg, nents, i) {
  2302. u64 addr;
  2303. addr = ehca_map_vaddr(sg_virt(sg));
  2304. if (ehca_dma_mapping_error(dev, addr))
  2305. return 0;
  2306. sg->dma_address = addr;
  2307. sg->dma_length = sg->length;
  2308. }
  2309. return nents;
  2310. }
  2311. static void ehca_dma_unmap_sg(struct ib_device *dev, struct scatterlist *sg,
  2312. int nents, enum dma_data_direction direction)
  2313. {
  2314. /* This is only a stub; nothing to be done here */
  2315. }
  2316. static u64 ehca_dma_address(struct ib_device *dev, struct scatterlist *sg)
  2317. {
  2318. return sg->dma_address;
  2319. }
  2320. static unsigned int ehca_dma_len(struct ib_device *dev, struct scatterlist *sg)
  2321. {
  2322. return sg->length;
  2323. }
  2324. static void ehca_dma_sync_single_for_cpu(struct ib_device *dev, u64 addr,
  2325. size_t size,
  2326. enum dma_data_direction dir)
  2327. {
  2328. dma_sync_single_for_cpu(dev->dma_device, addr, size, dir);
  2329. }
  2330. static void ehca_dma_sync_single_for_device(struct ib_device *dev, u64 addr,
  2331. size_t size,
  2332. enum dma_data_direction dir)
  2333. {
  2334. dma_sync_single_for_device(dev->dma_device, addr, size, dir);
  2335. }
  2336. static void *ehca_dma_alloc_coherent(struct ib_device *dev, size_t size,
  2337. u64 *dma_handle, gfp_t flag)
  2338. {
  2339. struct page *p;
  2340. void *addr = NULL;
  2341. u64 dma_addr;
  2342. p = alloc_pages(flag, get_order(size));
  2343. if (p) {
  2344. addr = page_address(p);
  2345. dma_addr = ehca_map_vaddr(addr);
  2346. if (ehca_dma_mapping_error(dev, dma_addr)) {
  2347. free_pages((unsigned long)addr, get_order(size));
  2348. return NULL;
  2349. }
  2350. if (dma_handle)
  2351. *dma_handle = dma_addr;
  2352. return addr;
  2353. }
  2354. return NULL;
  2355. }
  2356. static void ehca_dma_free_coherent(struct ib_device *dev, size_t size,
  2357. void *cpu_addr, u64 dma_handle)
  2358. {
  2359. if (cpu_addr && size)
  2360. free_pages((unsigned long)cpu_addr, get_order(size));
  2361. }
  2362. struct ib_dma_mapping_ops ehca_dma_mapping_ops = {
  2363. .mapping_error = ehca_dma_mapping_error,
  2364. .map_single = ehca_dma_map_single,
  2365. .unmap_single = ehca_dma_unmap_single,
  2366. .map_page = ehca_dma_map_page,
  2367. .unmap_page = ehca_dma_unmap_page,
  2368. .map_sg = ehca_dma_map_sg,
  2369. .unmap_sg = ehca_dma_unmap_sg,
  2370. .dma_address = ehca_dma_address,
  2371. .dma_len = ehca_dma_len,
  2372. .sync_single_for_cpu = ehca_dma_sync_single_for_cpu,
  2373. .sync_single_for_device = ehca_dma_sync_single_for_device,
  2374. .alloc_coherent = ehca_dma_alloc_coherent,
  2375. .free_coherent = ehca_dma_free_coherent,
  2376. };