ev.c 5.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200
  1. /*
  2. * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/slab.h>
  33. #include <linux/mman.h>
  34. #include <net/sock.h>
  35. #include "iw_cxgb4.h"
  36. static void post_qp_event(struct c4iw_dev *dev, struct c4iw_cq *chp,
  37. struct c4iw_qp *qhp,
  38. struct t4_cqe *err_cqe,
  39. enum ib_event_type ib_event)
  40. {
  41. struct ib_event event;
  42. struct c4iw_qp_attributes attrs;
  43. unsigned long flag;
  44. if ((qhp->attr.state == C4IW_QP_STATE_ERROR) ||
  45. (qhp->attr.state == C4IW_QP_STATE_TERMINATE)) {
  46. PDBG("%s AE received after RTS - "
  47. "qp state %d qpid 0x%x status 0x%x\n", __func__,
  48. qhp->attr.state, qhp->wq.sq.qid, CQE_STATUS(err_cqe));
  49. return;
  50. }
  51. printk(KERN_ERR MOD "AE qpid 0x%x opcode %d status 0x%x "
  52. "type %d wrid.hi 0x%x wrid.lo 0x%x\n",
  53. CQE_QPID(err_cqe), CQE_OPCODE(err_cqe),
  54. CQE_STATUS(err_cqe), CQE_TYPE(err_cqe),
  55. CQE_WRID_HI(err_cqe), CQE_WRID_LOW(err_cqe));
  56. if (qhp->attr.state == C4IW_QP_STATE_RTS) {
  57. attrs.next_state = C4IW_QP_STATE_TERMINATE;
  58. c4iw_modify_qp(qhp->rhp, qhp, C4IW_QP_ATTR_NEXT_STATE,
  59. &attrs, 0);
  60. }
  61. event.event = ib_event;
  62. event.device = chp->ibcq.device;
  63. if (ib_event == IB_EVENT_CQ_ERR)
  64. event.element.cq = &chp->ibcq;
  65. else
  66. event.element.qp = &qhp->ibqp;
  67. if (qhp->ibqp.event_handler)
  68. (*qhp->ibqp.event_handler)(&event, qhp->ibqp.qp_context);
  69. spin_lock_irqsave(&chp->comp_handler_lock, flag);
  70. (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context);
  71. spin_unlock_irqrestore(&chp->comp_handler_lock, flag);
  72. }
  73. void c4iw_ev_dispatch(struct c4iw_dev *dev, struct t4_cqe *err_cqe)
  74. {
  75. struct c4iw_cq *chp;
  76. struct c4iw_qp *qhp;
  77. u32 cqid;
  78. spin_lock(&dev->lock);
  79. qhp = get_qhp(dev, CQE_QPID(err_cqe));
  80. if (!qhp) {
  81. printk(KERN_ERR MOD "BAD AE qpid 0x%x opcode %d "
  82. "status 0x%x type %d wrid.hi 0x%x wrid.lo 0x%x\n",
  83. CQE_QPID(err_cqe),
  84. CQE_OPCODE(err_cqe), CQE_STATUS(err_cqe),
  85. CQE_TYPE(err_cqe), CQE_WRID_HI(err_cqe),
  86. CQE_WRID_LOW(err_cqe));
  87. spin_unlock(&dev->lock);
  88. goto out;
  89. }
  90. if (SQ_TYPE(err_cqe))
  91. cqid = qhp->attr.scq;
  92. else
  93. cqid = qhp->attr.rcq;
  94. chp = get_chp(dev, cqid);
  95. if (!chp) {
  96. printk(KERN_ERR MOD "BAD AE cqid 0x%x qpid 0x%x opcode %d "
  97. "status 0x%x type %d wrid.hi 0x%x wrid.lo 0x%x\n",
  98. cqid, CQE_QPID(err_cqe),
  99. CQE_OPCODE(err_cqe), CQE_STATUS(err_cqe),
  100. CQE_TYPE(err_cqe), CQE_WRID_HI(err_cqe),
  101. CQE_WRID_LOW(err_cqe));
  102. spin_unlock(&dev->lock);
  103. goto out;
  104. }
  105. c4iw_qp_add_ref(&qhp->ibqp);
  106. atomic_inc(&chp->refcnt);
  107. spin_unlock(&dev->lock);
  108. /* Bad incoming write */
  109. if (RQ_TYPE(err_cqe) &&
  110. (CQE_OPCODE(err_cqe) == FW_RI_RDMA_WRITE)) {
  111. post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_REQ_ERR);
  112. goto done;
  113. }
  114. switch (CQE_STATUS(err_cqe)) {
  115. /* Completion Events */
  116. case T4_ERR_SUCCESS:
  117. printk(KERN_ERR MOD "AE with status 0!\n");
  118. break;
  119. case T4_ERR_STAG:
  120. case T4_ERR_PDID:
  121. case T4_ERR_QPID:
  122. case T4_ERR_ACCESS:
  123. case T4_ERR_WRAP:
  124. case T4_ERR_BOUND:
  125. case T4_ERR_INVALIDATE_SHARED_MR:
  126. case T4_ERR_INVALIDATE_MR_WITH_MW_BOUND:
  127. post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_ACCESS_ERR);
  128. break;
  129. /* Device Fatal Errors */
  130. case T4_ERR_ECC:
  131. case T4_ERR_ECC_PSTAG:
  132. case T4_ERR_INTERNAL_ERR:
  133. post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_DEVICE_FATAL);
  134. break;
  135. /* QP Fatal Errors */
  136. case T4_ERR_OUT_OF_RQE:
  137. case T4_ERR_PBL_ADDR_BOUND:
  138. case T4_ERR_CRC:
  139. case T4_ERR_MARKER:
  140. case T4_ERR_PDU_LEN_ERR:
  141. case T4_ERR_DDP_VERSION:
  142. case T4_ERR_RDMA_VERSION:
  143. case T4_ERR_OPCODE:
  144. case T4_ERR_DDP_QUEUE_NUM:
  145. case T4_ERR_MSN:
  146. case T4_ERR_TBIT:
  147. case T4_ERR_MO:
  148. case T4_ERR_MSN_GAP:
  149. case T4_ERR_MSN_RANGE:
  150. case T4_ERR_RQE_ADDR_BOUND:
  151. case T4_ERR_IRD_OVERFLOW:
  152. post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_FATAL);
  153. break;
  154. default:
  155. printk(KERN_ERR MOD "Unknown T4 status 0x%x QPID 0x%x\n",
  156. CQE_STATUS(err_cqe), qhp->wq.sq.qid);
  157. post_qp_event(dev, chp, qhp, err_cqe, IB_EVENT_QP_FATAL);
  158. break;
  159. }
  160. done:
  161. if (atomic_dec_and_test(&chp->refcnt))
  162. wake_up(&chp->wait);
  163. c4iw_qp_rem_ref(&qhp->ibqp);
  164. out:
  165. return;
  166. }
  167. int c4iw_ev_handler(struct c4iw_dev *dev, u32 qid)
  168. {
  169. struct c4iw_cq *chp;
  170. unsigned long flag;
  171. chp = get_chp(dev, qid);
  172. if (chp) {
  173. spin_lock_irqsave(&chp->comp_handler_lock, flag);
  174. (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context);
  175. spin_unlock_irqrestore(&chp->comp_handler_lock, flag);
  176. } else
  177. PDBG("%s unknown cqid 0x%x\n", __func__, qid);
  178. return 0;
  179. }