gpio-sch.c 6.5 KB

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  1. /*
  2. * GPIO interface for Intel Poulsbo SCH
  3. *
  4. * Copyright (c) 2010 CompuLab Ltd
  5. * Author: Denis Turischev <denis@compulab.co.il>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License 2 as published
  9. * by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; see the file COPYING. If not, write to
  18. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/init.h>
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/io.h>
  24. #include <linux/errno.h>
  25. #include <linux/acpi.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/pci_ids.h>
  28. #include <linux/gpio.h>
  29. static DEFINE_SPINLOCK(gpio_lock);
  30. #define CGEN (0x00)
  31. #define CGIO (0x04)
  32. #define CGLV (0x08)
  33. #define RGEN (0x20)
  34. #define RGIO (0x24)
  35. #define RGLV (0x28)
  36. static unsigned short gpio_ba;
  37. static int sch_gpio_core_direction_in(struct gpio_chip *gc, unsigned gpio_num)
  38. {
  39. u8 curr_dirs;
  40. unsigned short offset, bit;
  41. spin_lock(&gpio_lock);
  42. offset = CGIO + gpio_num / 8;
  43. bit = gpio_num % 8;
  44. curr_dirs = inb(gpio_ba + offset);
  45. if (!(curr_dirs & (1 << bit)))
  46. outb(curr_dirs | (1 << bit), gpio_ba + offset);
  47. spin_unlock(&gpio_lock);
  48. return 0;
  49. }
  50. static int sch_gpio_core_get(struct gpio_chip *gc, unsigned gpio_num)
  51. {
  52. int res;
  53. unsigned short offset, bit;
  54. offset = CGLV + gpio_num / 8;
  55. bit = gpio_num % 8;
  56. res = !!(inb(gpio_ba + offset) & (1 << bit));
  57. return res;
  58. }
  59. static void sch_gpio_core_set(struct gpio_chip *gc, unsigned gpio_num, int val)
  60. {
  61. u8 curr_vals;
  62. unsigned short offset, bit;
  63. spin_lock(&gpio_lock);
  64. offset = CGLV + gpio_num / 8;
  65. bit = gpio_num % 8;
  66. curr_vals = inb(gpio_ba + offset);
  67. if (val)
  68. outb(curr_vals | (1 << bit), gpio_ba + offset);
  69. else
  70. outb((curr_vals & ~(1 << bit)), gpio_ba + offset);
  71. spin_unlock(&gpio_lock);
  72. }
  73. static int sch_gpio_core_direction_out(struct gpio_chip *gc,
  74. unsigned gpio_num, int val)
  75. {
  76. u8 curr_dirs;
  77. unsigned short offset, bit;
  78. sch_gpio_core_set(gc, gpio_num, val);
  79. spin_lock(&gpio_lock);
  80. offset = CGIO + gpio_num / 8;
  81. bit = gpio_num % 8;
  82. curr_dirs = inb(gpio_ba + offset);
  83. if (curr_dirs & (1 << bit))
  84. outb(curr_dirs & ~(1 << bit), gpio_ba + offset);
  85. spin_unlock(&gpio_lock);
  86. return 0;
  87. }
  88. static struct gpio_chip sch_gpio_core = {
  89. .label = "sch_gpio_core",
  90. .owner = THIS_MODULE,
  91. .direction_input = sch_gpio_core_direction_in,
  92. .get = sch_gpio_core_get,
  93. .direction_output = sch_gpio_core_direction_out,
  94. .set = sch_gpio_core_set,
  95. };
  96. static int sch_gpio_resume_direction_in(struct gpio_chip *gc,
  97. unsigned gpio_num)
  98. {
  99. u8 curr_dirs;
  100. spin_lock(&gpio_lock);
  101. curr_dirs = inb(gpio_ba + RGIO);
  102. if (!(curr_dirs & (1 << gpio_num)))
  103. outb(curr_dirs | (1 << gpio_num) , gpio_ba + RGIO);
  104. spin_unlock(&gpio_lock);
  105. return 0;
  106. }
  107. static int sch_gpio_resume_get(struct gpio_chip *gc, unsigned gpio_num)
  108. {
  109. return !!(inb(gpio_ba + RGLV) & (1 << gpio_num));
  110. }
  111. static void sch_gpio_resume_set(struct gpio_chip *gc,
  112. unsigned gpio_num, int val)
  113. {
  114. u8 curr_vals;
  115. spin_lock(&gpio_lock);
  116. curr_vals = inb(gpio_ba + RGLV);
  117. if (val)
  118. outb(curr_vals | (1 << gpio_num), gpio_ba + RGLV);
  119. else
  120. outb((curr_vals & ~(1 << gpio_num)), gpio_ba + RGLV);
  121. spin_unlock(&gpio_lock);
  122. }
  123. static int sch_gpio_resume_direction_out(struct gpio_chip *gc,
  124. unsigned gpio_num, int val)
  125. {
  126. u8 curr_dirs;
  127. sch_gpio_resume_set(gc, gpio_num, val);
  128. spin_lock(&gpio_lock);
  129. curr_dirs = inb(gpio_ba + RGIO);
  130. if (curr_dirs & (1 << gpio_num))
  131. outb(curr_dirs & ~(1 << gpio_num), gpio_ba + RGIO);
  132. spin_unlock(&gpio_lock);
  133. return 0;
  134. }
  135. static struct gpio_chip sch_gpio_resume = {
  136. .label = "sch_gpio_resume",
  137. .owner = THIS_MODULE,
  138. .direction_input = sch_gpio_resume_direction_in,
  139. .get = sch_gpio_resume_get,
  140. .direction_output = sch_gpio_resume_direction_out,
  141. .set = sch_gpio_resume_set,
  142. };
  143. static int __devinit sch_gpio_probe(struct platform_device *pdev)
  144. {
  145. struct resource *res;
  146. int err, id;
  147. id = pdev->id;
  148. if (!id)
  149. return -ENODEV;
  150. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  151. if (!res)
  152. return -EBUSY;
  153. if (!request_region(res->start, resource_size(res), pdev->name))
  154. return -EBUSY;
  155. gpio_ba = res->start;
  156. switch (id) {
  157. case PCI_DEVICE_ID_INTEL_SCH_LPC:
  158. sch_gpio_core.base = 0;
  159. sch_gpio_core.ngpio = 10;
  160. sch_gpio_resume.base = 10;
  161. sch_gpio_resume.ngpio = 4;
  162. /*
  163. * GPIO[6:0] enabled by default
  164. * GPIO7 is configured by the CMC as SLPIOVR
  165. * Enable GPIO[9:8] core powered gpios explicitly
  166. */
  167. outb(0x3, gpio_ba + CGEN + 1);
  168. /*
  169. * SUS_GPIO[2:0] enabled by default
  170. * Enable SUS_GPIO3 resume powered gpio explicitly
  171. */
  172. outb(0x8, gpio_ba + RGEN);
  173. break;
  174. case PCI_DEVICE_ID_INTEL_ITC_LPC:
  175. sch_gpio_core.base = 0;
  176. sch_gpio_core.ngpio = 5;
  177. sch_gpio_resume.base = 5;
  178. sch_gpio_resume.ngpio = 9;
  179. break;
  180. default:
  181. return -ENODEV;
  182. }
  183. sch_gpio_core.dev = &pdev->dev;
  184. sch_gpio_resume.dev = &pdev->dev;
  185. err = gpiochip_add(&sch_gpio_core);
  186. if (err < 0)
  187. goto err_sch_gpio_core;
  188. err = gpiochip_add(&sch_gpio_resume);
  189. if (err < 0)
  190. goto err_sch_gpio_resume;
  191. return 0;
  192. err_sch_gpio_resume:
  193. err = gpiochip_remove(&sch_gpio_core);
  194. if (err)
  195. dev_err(&pdev->dev, "%s failed, %d\n",
  196. "gpiochip_remove()", err);
  197. err_sch_gpio_core:
  198. release_region(res->start, resource_size(res));
  199. gpio_ba = 0;
  200. return err;
  201. }
  202. static int __devexit sch_gpio_remove(struct platform_device *pdev)
  203. {
  204. struct resource *res;
  205. if (gpio_ba) {
  206. int err;
  207. err = gpiochip_remove(&sch_gpio_core);
  208. if (err)
  209. dev_err(&pdev->dev, "%s failed, %d\n",
  210. "gpiochip_remove()", err);
  211. err = gpiochip_remove(&sch_gpio_resume);
  212. if (err)
  213. dev_err(&pdev->dev, "%s failed, %d\n",
  214. "gpiochip_remove()", err);
  215. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  216. release_region(res->start, resource_size(res));
  217. gpio_ba = 0;
  218. return err;
  219. }
  220. return 0;
  221. }
  222. static struct platform_driver sch_gpio_driver = {
  223. .driver = {
  224. .name = "sch_gpio",
  225. .owner = THIS_MODULE,
  226. },
  227. .probe = sch_gpio_probe,
  228. .remove = __devexit_p(sch_gpio_remove),
  229. };
  230. module_platform_driver(sch_gpio_driver);
  231. MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
  232. MODULE_DESCRIPTION("GPIO interface for Intel Poulsbo SCH");
  233. MODULE_LICENSE("GPL");
  234. MODULE_ALIAS("platform:sch_gpio");