coresight-tpiu.c 21 KB

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  1. /* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/init.h>
  15. #include <linux/device.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/io.h>
  18. #include <linux/err.h>
  19. #include <linux/slab.h>
  20. #include <linux/delay.h>
  21. #include <linux/mutex.h>
  22. #include <linux/clk.h>
  23. #include <linux/of_coresight.h>
  24. #include <linux/coresight.h>
  25. #include <linux/regulator/consumer.h>
  26. #include <linux/gpio.h>
  27. #include <linux/of_gpio.h>
  28. #include <mach/gpiomux.h>
  29. #include "coresight-priv.h"
  30. #define tpiu_writel(drvdata, val, off) __raw_writel((val), drvdata->base + off)
  31. #define tpiu_readl(drvdata, off) __raw_readl(drvdata->base + off)
  32. #define TPIU_LOCK(drvdata) \
  33. do { \
  34. mb(); \
  35. tpiu_writel(drvdata, 0x0, CORESIGHT_LAR); \
  36. } while (0)
  37. #define TPIU_UNLOCK(drvdata) \
  38. do { \
  39. tpiu_writel(drvdata, CORESIGHT_UNLOCK, CORESIGHT_LAR); \
  40. mb(); \
  41. } while (0)
  42. #define TPIU_SUPP_PORTSZ (0x000)
  43. #define TPIU_CURR_PORTSZ (0x004)
  44. #define TPIU_SUPP_TRIGMODES (0x100)
  45. #define TPIU_TRIG_CNTRVAL (0x104)
  46. #define TPIU_TRIG_MULT (0x108)
  47. #define TPIU_SUPP_TESTPATM (0x200)
  48. #define TPIU_CURR_TESTPATM (0x204)
  49. #define TPIU_TEST_PATREPCNTR (0x208)
  50. #define TPIU_FFSR (0x300)
  51. #define TPIU_FFCR (0x304)
  52. #define TPIU_FSYNC_CNTR (0x308)
  53. #define TPIU_EXTCTL_INPORT (0x400)
  54. #define TPIU_EXTCTL_OUTPORT (0x404)
  55. #define TPIU_ITTRFLINACK (0xEE4)
  56. #define TPIU_ITTRFLIN (0xEE8)
  57. #define TPIU_ITATBDATA0 (0xEEC)
  58. #define TPIU_ITATBCTR2 (0xEF0)
  59. #define TPIU_ITATBCTR1 (0xEF4)
  60. #define TPIU_ITATBCTR0 (0xEF8)
  61. enum tpiu_out_mode {
  62. TPIU_OUT_MODE_NONE,
  63. TPIU_OUT_MODE_MICTOR,
  64. TPIU_OUT_MODE_SDC,
  65. };
  66. enum tpiu_set {
  67. TPIU_SET_NONE,
  68. TPIU_SET_A,
  69. TPIU_SET_B,
  70. };
  71. struct tpiu_drvdata {
  72. void __iomem *base;
  73. struct device *dev;
  74. struct coresight_device *csdev;
  75. struct clk *clk;
  76. struct mutex mutex;
  77. enum tpiu_out_mode out_mode;
  78. struct regulator *reg;
  79. unsigned int reg_low;
  80. unsigned int reg_high;
  81. unsigned int reg_lpm;
  82. unsigned int reg_hpm;
  83. struct regulator *reg_io;
  84. unsigned int reg_low_io;
  85. unsigned int reg_high_io;
  86. unsigned int reg_lpm_io;
  87. unsigned int reg_hpm_io;
  88. enum tpiu_set set;
  89. unsigned int seta_gpiocnt;
  90. unsigned int *seta_gpios;
  91. struct gpiomux_setting *seta_cfgs;
  92. unsigned int setb_gpiocnt;
  93. unsigned int *setb_gpios;
  94. struct gpiomux_setting *setb_cfgs;
  95. bool enable;
  96. };
  97. struct gpiomux_setting old_cfg;
  98. static void tpiu_flush_and_stop(struct tpiu_drvdata *drvdata)
  99. {
  100. int count;
  101. uint32_t ffcr;
  102. ffcr = tpiu_readl(drvdata, TPIU_FFCR);
  103. ffcr |= BIT(12);
  104. tpiu_writel(drvdata, ffcr, TPIU_FFCR);
  105. ffcr |= BIT(6);
  106. tpiu_writel(drvdata, ffcr, TPIU_FFCR);
  107. /* Ensure flush completes */
  108. for (count = TIMEOUT_US; BVAL(tpiu_readl(drvdata, TPIU_FFCR), 6) != 0
  109. && count > 0; count--)
  110. udelay(1);
  111. WARN(count == 0, "timeout while flushing TPIU, TPIU_FFCR: %#x\n",
  112. tpiu_readl(drvdata, TPIU_FFCR));
  113. }
  114. static int __tpiu_enable_seta(struct tpiu_drvdata *drvdata)
  115. {
  116. int i, ret;
  117. if (!drvdata->seta_gpiocnt)
  118. return -EINVAL;
  119. for (i = 0; i < drvdata->seta_gpiocnt; i++) {
  120. ret = gpio_request(drvdata->seta_gpios[i], NULL);
  121. if (ret) {
  122. dev_err(drvdata->dev,
  123. "gpio_request failed for seta_gpio: %u\n",
  124. drvdata->seta_gpios[i]);
  125. goto err0;
  126. }
  127. ret = msm_gpiomux_write(drvdata->seta_gpios[i],
  128. GPIOMUX_ACTIVE,
  129. &drvdata->seta_cfgs[i],
  130. &old_cfg);
  131. if (ret < 0) {
  132. dev_err(drvdata->dev,
  133. "gpio write failed for seta_gpio: %u\n",
  134. drvdata->seta_gpios[i]);
  135. goto err1;
  136. }
  137. }
  138. return 0;
  139. err1:
  140. gpio_free(drvdata->seta_gpios[i]);
  141. err0:
  142. i--;
  143. while (i >= 0) {
  144. gpio_free(drvdata->seta_gpios[i]);
  145. i--;
  146. }
  147. return ret;
  148. }
  149. static int __tpiu_enable_setb(struct tpiu_drvdata *drvdata)
  150. {
  151. int i, ret;
  152. if (!drvdata->setb_gpiocnt)
  153. return -EINVAL;
  154. for (i = 0; i < drvdata->setb_gpiocnt; i++) {
  155. ret = gpio_request(drvdata->setb_gpios[i], NULL);
  156. if (ret) {
  157. dev_err(drvdata->dev,
  158. "gpio_request failed for setb_gpio: %u\n",
  159. drvdata->setb_gpios[i]);
  160. goto err0;
  161. }
  162. ret = msm_gpiomux_write(drvdata->setb_gpios[i],
  163. GPIOMUX_ACTIVE,
  164. &drvdata->setb_cfgs[i],
  165. &old_cfg);
  166. if (ret < 0) {
  167. dev_err(drvdata->dev,
  168. "gpio write failed for setb_gpio: %u\n",
  169. drvdata->setb_gpios[i]);
  170. goto err1;
  171. }
  172. }
  173. return 0;
  174. err1:
  175. gpio_free(drvdata->setb_gpios[i]);
  176. err0:
  177. i--;
  178. while (i >= 0) {
  179. gpio_free(drvdata->setb_gpios[i]);
  180. i--;
  181. }
  182. return ret;
  183. }
  184. static int __tpiu_enable_to_mictor(struct tpiu_drvdata *drvdata)
  185. {
  186. int ret;
  187. if (drvdata->set == TPIU_SET_A) {
  188. ret = __tpiu_enable_seta(drvdata);
  189. if (ret)
  190. return ret;
  191. } else if (drvdata->set == TPIU_SET_B) {
  192. ret = __tpiu_enable_setb(drvdata);
  193. if (ret)
  194. return ret;
  195. }
  196. TPIU_UNLOCK(drvdata);
  197. tpiu_writel(drvdata, 0x8000, TPIU_CURR_PORTSZ);
  198. tpiu_writel(drvdata, 0x101, TPIU_FFCR);
  199. TPIU_LOCK(drvdata);
  200. return 0;
  201. }
  202. static int tpiu_reg_set_optimum_mode(struct regulator *reg,
  203. unsigned int reg_hpm)
  204. {
  205. if (regulator_count_voltages(reg) <= 0)
  206. return 0;
  207. return regulator_set_optimum_mode(reg, reg_hpm);
  208. }
  209. static int tpiu_reg_set_voltage(struct regulator *reg, unsigned int reg_low,
  210. unsigned int reg_high)
  211. {
  212. if (regulator_count_voltages(reg) <= 0)
  213. return 0;
  214. return regulator_set_voltage(reg, reg_low, reg_high);
  215. }
  216. static int __tpiu_enable_to_sdc(struct tpiu_drvdata *drvdata)
  217. {
  218. int ret;
  219. if (!drvdata->reg || !drvdata->reg_io)
  220. return -EINVAL;
  221. ret = tpiu_reg_set_optimum_mode(drvdata->reg, drvdata->reg_hpm);
  222. if (ret < 0)
  223. return ret;
  224. ret = tpiu_reg_set_voltage(drvdata->reg, drvdata->reg_low,
  225. drvdata->reg_high);
  226. if (ret)
  227. goto err0;
  228. ret = regulator_enable(drvdata->reg);
  229. if (ret)
  230. goto err1;
  231. ret = tpiu_reg_set_optimum_mode(drvdata->reg_io, drvdata->reg_hpm_io);
  232. if (ret < 0)
  233. goto err2;
  234. ret = tpiu_reg_set_voltage(drvdata->reg_io, drvdata->reg_low_io,
  235. drvdata->reg_high_io);
  236. if (ret)
  237. goto err3;
  238. ret = regulator_enable(drvdata->reg_io);
  239. if (ret)
  240. goto err4;
  241. ret = clk_set_rate(drvdata->clk, CORESIGHT_CLK_RATE_FIXED);
  242. if (ret)
  243. goto err5;
  244. msm_tlmm_misc_reg_write(TLMM_SDC2_HDRV_PULL_CTL, 0x16D);
  245. msm_tlmm_misc_reg_write(TLMM_ETM_MODE_REG, 1);
  246. TPIU_UNLOCK(drvdata);
  247. tpiu_writel(drvdata, 0x8, TPIU_CURR_PORTSZ);
  248. tpiu_writel(drvdata, 0x103, TPIU_FFCR);
  249. TPIU_LOCK(drvdata);
  250. return 0;
  251. err5:
  252. regulator_disable(drvdata->reg_io);
  253. err4:
  254. tpiu_reg_set_voltage(drvdata->reg_io, 0, drvdata->reg_high_io);
  255. err3:
  256. tpiu_reg_set_optimum_mode(drvdata->reg_io, 0);
  257. err2:
  258. regulator_disable(drvdata->reg);
  259. err1:
  260. tpiu_reg_set_voltage(drvdata->reg, 0, drvdata->reg_high);
  261. err0:
  262. tpiu_reg_set_optimum_mode(drvdata->reg, 0);
  263. return ret;
  264. }
  265. static int tpiu_enable(struct coresight_device *csdev)
  266. {
  267. struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
  268. int ret;
  269. ret = clk_prepare_enable(drvdata->clk);
  270. if (ret)
  271. return ret;
  272. mutex_lock(&drvdata->mutex);
  273. if (drvdata->out_mode == TPIU_OUT_MODE_MICTOR)
  274. ret = __tpiu_enable_to_mictor(drvdata);
  275. else
  276. ret = __tpiu_enable_to_sdc(drvdata);
  277. if (ret)
  278. goto err;
  279. drvdata->enable = true;
  280. mutex_unlock(&drvdata->mutex);
  281. dev_info(drvdata->dev, "TPIU enabled\n");
  282. return 0;
  283. err:
  284. mutex_unlock(&drvdata->mutex);
  285. clk_disable_unprepare(drvdata->clk);
  286. return ret;
  287. }
  288. static void __tpiu_disable(struct tpiu_drvdata *drvdata)
  289. {
  290. TPIU_UNLOCK(drvdata);
  291. tpiu_flush_and_stop(drvdata);
  292. TPIU_LOCK(drvdata);
  293. }
  294. static void __tpiu_disable_seta(struct tpiu_drvdata *drvdata)
  295. {
  296. int i;
  297. for (i = 0; i < drvdata->seta_gpiocnt; i++)
  298. gpio_free(drvdata->seta_gpios[i]);
  299. }
  300. static void __tpiu_disable_setb(struct tpiu_drvdata *drvdata)
  301. {
  302. int i;
  303. for (i = 0; i < drvdata->setb_gpiocnt; i++)
  304. gpio_free(drvdata->setb_gpios[i]);
  305. }
  306. static void __tpiu_disable_to_mictor(struct tpiu_drvdata *drvdata)
  307. {
  308. __tpiu_disable(drvdata);
  309. if (drvdata->set == TPIU_SET_A)
  310. __tpiu_disable_seta(drvdata);
  311. else if (drvdata->set == TPIU_SET_B)
  312. __tpiu_disable_setb(drvdata);
  313. }
  314. static void __tpiu_disable_to_sdc(struct tpiu_drvdata *drvdata)
  315. {
  316. __tpiu_disable(drvdata);
  317. msm_tlmm_misc_reg_write(TLMM_ETM_MODE_REG, 0);
  318. clk_set_rate(drvdata->clk, CORESIGHT_CLK_RATE_TRACE);
  319. regulator_disable(drvdata->reg);
  320. tpiu_reg_set_voltage(drvdata->reg, 0, drvdata->reg_high);
  321. tpiu_reg_set_optimum_mode(drvdata->reg, 0);
  322. regulator_disable(drvdata->reg_io);
  323. tpiu_reg_set_voltage(drvdata->reg_io, 0, drvdata->reg_high_io);
  324. tpiu_reg_set_optimum_mode(drvdata->reg_io, 0);
  325. }
  326. static void tpiu_disable(struct coresight_device *csdev)
  327. {
  328. struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
  329. mutex_lock(&drvdata->mutex);
  330. if (drvdata->out_mode == TPIU_OUT_MODE_MICTOR)
  331. __tpiu_disable_to_mictor(drvdata);
  332. else
  333. __tpiu_disable_to_sdc(drvdata);
  334. drvdata->enable = false;
  335. mutex_unlock(&drvdata->mutex);
  336. clk_disable_unprepare(drvdata->clk);
  337. dev_info(drvdata->dev, "TPIU disabled\n");
  338. }
  339. static void tpiu_abort(struct coresight_device *csdev)
  340. {
  341. struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
  342. __tpiu_disable(drvdata);
  343. dev_info(drvdata->dev, "TPIU aborted\n");
  344. }
  345. static const struct coresight_ops_sink tpiu_sink_ops = {
  346. .enable = tpiu_enable,
  347. .disable = tpiu_disable,
  348. .abort = tpiu_abort,
  349. };
  350. static ssize_t tpiu_show_out_mode(struct device *dev,
  351. struct device_attribute *attr, char *buf)
  352. {
  353. struct tpiu_drvdata *drvdata = dev_get_drvdata(dev->parent);
  354. return scnprintf(buf, PAGE_SIZE, "%s\n",
  355. drvdata->out_mode == TPIU_OUT_MODE_MICTOR ?
  356. "mictor" : "sdc");
  357. }
  358. static ssize_t tpiu_store_out_mode(struct device *dev,
  359. struct device_attribute *attr,
  360. const char *buf, size_t size)
  361. {
  362. struct tpiu_drvdata *drvdata = dev_get_drvdata(dev->parent);
  363. char str[10] = "";
  364. int ret;
  365. if (strlen(buf) >= 10)
  366. return -EINVAL;
  367. if (sscanf(buf, "%s", str) != 1)
  368. return -EINVAL;
  369. mutex_lock(&drvdata->mutex);
  370. if (!strcmp(str, "mictor")) {
  371. if (drvdata->out_mode == TPIU_OUT_MODE_MICTOR)
  372. goto out;
  373. if (!drvdata->enable) {
  374. drvdata->out_mode = TPIU_OUT_MODE_MICTOR;
  375. goto out;
  376. }
  377. __tpiu_disable_to_sdc(drvdata);
  378. ret = __tpiu_enable_to_mictor(drvdata);
  379. if (ret) {
  380. dev_err(drvdata->dev, "failed to enable mictor\n");
  381. goto err;
  382. }
  383. drvdata->out_mode = TPIU_OUT_MODE_MICTOR;
  384. } else if (!strcmp(str, "sdc")) {
  385. if (drvdata->out_mode == TPIU_OUT_MODE_SDC)
  386. goto out;
  387. if (!drvdata->enable) {
  388. drvdata->out_mode = TPIU_OUT_MODE_SDC;
  389. goto out;
  390. }
  391. __tpiu_disable_to_mictor(drvdata);
  392. ret = __tpiu_enable_to_sdc(drvdata);
  393. if (ret) {
  394. dev_err(drvdata->dev, "failed to enable sdc\n");
  395. goto err;
  396. }
  397. drvdata->out_mode = TPIU_OUT_MODE_SDC;
  398. }
  399. out:
  400. mutex_unlock(&drvdata->mutex);
  401. return size;
  402. err:
  403. mutex_unlock(&drvdata->mutex);
  404. return ret;
  405. }
  406. static DEVICE_ATTR(out_mode, S_IRUGO | S_IWUSR, tpiu_show_out_mode,
  407. tpiu_store_out_mode);
  408. static const struct coresight_ops tpiu_cs_ops = {
  409. .sink_ops = &tpiu_sink_ops,
  410. };
  411. static ssize_t tpiu_show_set(struct device *dev,
  412. struct device_attribute *attr, char *buf)
  413. {
  414. struct tpiu_drvdata *drvdata = dev_get_drvdata(dev->parent);
  415. return scnprintf(buf, PAGE_SIZE, "%s\n",
  416. drvdata->set == TPIU_SET_A ?
  417. "a" : "b");
  418. }
  419. static ssize_t tpiu_store_set(struct device *dev, struct device_attribute *attr,
  420. const char *buf, size_t size)
  421. {
  422. struct tpiu_drvdata *drvdata = dev_get_drvdata(dev->parent);
  423. char str[10] = "";
  424. int ret;
  425. if (strlen(buf) >= 10)
  426. return -EINVAL;
  427. if (sscanf(buf, "%s", str) != 1)
  428. return -EINVAL;
  429. mutex_lock(&drvdata->mutex);
  430. if (!strcmp(str, "a")) {
  431. if (drvdata->set == TPIU_SET_A)
  432. goto out;
  433. if (!drvdata->enable || drvdata->out_mode !=
  434. TPIU_OUT_MODE_MICTOR) {
  435. drvdata->set = TPIU_SET_A;
  436. goto out;
  437. }
  438. __tpiu_disable_setb(drvdata);
  439. ret = __tpiu_enable_seta(drvdata);
  440. if (ret) {
  441. dev_err(drvdata->dev, "failed to enable set A\n");
  442. goto err;
  443. }
  444. drvdata->set = TPIU_SET_A;
  445. } else if (!strcmp(str, "b")) {
  446. if (drvdata->set == TPIU_SET_B)
  447. goto out;
  448. if (!drvdata->enable || drvdata->out_mode !=
  449. TPIU_OUT_MODE_MICTOR) {
  450. drvdata->set = TPIU_SET_B;
  451. goto out;
  452. }
  453. __tpiu_disable_seta(drvdata);
  454. ret = __tpiu_enable_setb(drvdata);
  455. if (ret) {
  456. dev_err(drvdata->dev, "failed to enable set B\n");
  457. goto err;
  458. }
  459. drvdata->set = TPIU_SET_B;
  460. }
  461. out:
  462. mutex_unlock(&drvdata->mutex);
  463. return size;
  464. err:
  465. mutex_unlock(&drvdata->mutex);
  466. return ret;
  467. }
  468. static DEVICE_ATTR(set, S_IRUGO | S_IWUSR, tpiu_show_set, tpiu_store_set);
  469. static struct attribute *tpiu_attrs[] = {
  470. &dev_attr_out_mode.attr,
  471. &dev_attr_set.attr,
  472. NULL,
  473. };
  474. static struct attribute_group tpiu_attr_grp = {
  475. .attrs = tpiu_attrs,
  476. };
  477. static const struct attribute_group *tpiu_attr_grps[] = {
  478. &tpiu_attr_grp,
  479. NULL,
  480. };
  481. static int __devinit tpiu_parse_of_data(struct platform_device *pdev,
  482. struct tpiu_drvdata *drvdata)
  483. {
  484. struct device_node *node = pdev->dev.of_node;
  485. struct device_node *reg_node = NULL;
  486. struct device *dev = &pdev->dev;
  487. const __be32 *prop;
  488. int i, len, gpio, ret;
  489. uint32_t *seta_cfgs, *setb_cfgs;
  490. reg_node = of_parse_phandle(node, "vdd-supply", 0);
  491. if (reg_node) {
  492. drvdata->reg = devm_regulator_get(dev, "vdd");
  493. if (IS_ERR(drvdata->reg))
  494. return PTR_ERR(drvdata->reg);
  495. prop = of_get_property(node, "qcom,vdd-voltage-level", &len);
  496. if (!prop || (len != (2 * sizeof(__be32)))) {
  497. dev_err(dev, "sdc voltage levels not specified\n");
  498. } else {
  499. drvdata->reg_low = be32_to_cpup(&prop[0]);
  500. drvdata->reg_high = be32_to_cpup(&prop[1]);
  501. }
  502. prop = of_get_property(node, "qcom,vdd-current-level", &len);
  503. if (!prop || (len != (2 * sizeof(__be32)))) {
  504. dev_err(dev, "sdc current levels not specified\n");
  505. } else {
  506. drvdata->reg_lpm = be32_to_cpup(&prop[0]);
  507. drvdata->reg_hpm = be32_to_cpup(&prop[1]);
  508. }
  509. of_node_put(reg_node);
  510. } else {
  511. dev_err(dev, "sdc voltage supply not specified or available\n");
  512. }
  513. reg_node = of_parse_phandle(node, "vdd-io-supply", 0);
  514. if (reg_node) {
  515. drvdata->reg_io = devm_regulator_get(dev, "vdd-io");
  516. if (IS_ERR(drvdata->reg_io))
  517. return PTR_ERR(drvdata->reg_io);
  518. prop = of_get_property(node, "qcom,vdd-io-voltage-level", &len);
  519. if (!prop || (len != (2 * sizeof(__be32)))) {
  520. dev_err(dev, "sdc io voltage levels not specified\n");
  521. } else {
  522. drvdata->reg_low_io = be32_to_cpup(&prop[0]);
  523. drvdata->reg_high_io = be32_to_cpup(&prop[1]);
  524. }
  525. prop = of_get_property(node, "qcom,vdd-io-current-level", &len);
  526. if (!prop || (len != (2 * sizeof(__be32)))) {
  527. dev_err(dev, "sdc io current levels not specified\n");
  528. } else {
  529. drvdata->reg_lpm_io = be32_to_cpup(&prop[0]);
  530. drvdata->reg_hpm_io = be32_to_cpup(&prop[1]);
  531. }
  532. of_node_put(reg_node);
  533. } else {
  534. dev_err(dev,
  535. "sdc io voltage supply not specified or available\n");
  536. }
  537. drvdata->out_mode = TPIU_OUT_MODE_MICTOR;
  538. drvdata->set = TPIU_SET_B;
  539. drvdata->seta_gpiocnt = of_gpio_named_count(node, "qcom,seta-gpios");
  540. if (drvdata->seta_gpiocnt) {
  541. drvdata->seta_gpios = devm_kzalloc(dev,
  542. sizeof(*drvdata->seta_gpios) *
  543. drvdata->seta_gpiocnt, GFP_KERNEL);
  544. if (!drvdata->seta_gpios)
  545. return -ENOMEM;
  546. for (i = 0; i < drvdata->seta_gpiocnt; i++) {
  547. gpio = of_get_named_gpio(node, "qcom,seta-gpios", i);
  548. if (!gpio_is_valid(gpio))
  549. return gpio;
  550. drvdata->seta_gpios[i] = gpio;
  551. }
  552. drvdata->seta_cfgs = devm_kzalloc(dev,
  553. sizeof(*drvdata->seta_cfgs) *
  554. drvdata->seta_gpiocnt, GFP_KERNEL);
  555. if (!drvdata->seta_cfgs)
  556. return -ENOMEM;
  557. seta_cfgs = devm_kzalloc(dev, sizeof(*seta_cfgs) *
  558. drvdata->seta_gpiocnt, GFP_KERNEL);
  559. if (!seta_cfgs)
  560. return -ENOMEM;
  561. ret = of_property_read_u32_array(node, "qcom,seta-gpios-func",
  562. (u32 *)seta_cfgs,
  563. drvdata->seta_gpiocnt);
  564. if (ret)
  565. return ret;
  566. for (i = 0; i < drvdata->seta_gpiocnt; i++)
  567. drvdata->seta_cfgs[i].func = seta_cfgs[i];
  568. ret = of_property_read_u32_array(node, "qcom,seta-gpios-drv",
  569. (u32 *)seta_cfgs,
  570. drvdata->seta_gpiocnt);
  571. if (ret)
  572. return ret;
  573. for (i = 0; i < drvdata->seta_gpiocnt; i++)
  574. drvdata->seta_cfgs[i].drv = seta_cfgs[i];
  575. ret = of_property_read_u32_array(node, "qcom,seta-gpios-pull",
  576. (u32 *)seta_cfgs,
  577. drvdata->seta_gpiocnt);
  578. if (ret)
  579. return ret;
  580. for (i = 0; i < drvdata->seta_gpiocnt; i++)
  581. drvdata->seta_cfgs[i].pull = seta_cfgs[i];
  582. ret = of_property_read_u32_array(node, "qcom,seta-gpios-dir",
  583. (u32 *)seta_cfgs,
  584. drvdata->seta_gpiocnt);
  585. if (ret)
  586. return ret;
  587. for (i = 0; i < drvdata->seta_gpiocnt; i++)
  588. drvdata->seta_cfgs[i].dir = seta_cfgs[i];
  589. devm_kfree(dev, seta_cfgs);
  590. } else {
  591. dev_err(dev, "seta gpios not specified\n");
  592. }
  593. drvdata->setb_gpiocnt = of_gpio_named_count(node, "qcom,setb-gpios");
  594. if (drvdata->setb_gpiocnt) {
  595. drvdata->setb_gpios = devm_kzalloc(dev,
  596. sizeof(*drvdata->setb_gpios) *
  597. drvdata->setb_gpiocnt, GFP_KERNEL);
  598. if (!drvdata->setb_gpios)
  599. return -ENOMEM;
  600. for (i = 0; i < drvdata->setb_gpiocnt; i++) {
  601. gpio = of_get_named_gpio(node, "qcom,setb-gpios", i);
  602. if (!gpio_is_valid(gpio))
  603. return gpio;
  604. drvdata->setb_gpios[i] = gpio;
  605. }
  606. drvdata->setb_cfgs = devm_kzalloc(dev,
  607. sizeof(*drvdata->setb_cfgs) *
  608. drvdata->setb_gpiocnt, GFP_KERNEL);
  609. if (!drvdata->setb_cfgs)
  610. return -ENOMEM;
  611. setb_cfgs = devm_kzalloc(dev, sizeof(*setb_cfgs) *
  612. drvdata->setb_gpiocnt, GFP_KERNEL);
  613. if (!setb_cfgs)
  614. return -ENOMEM;
  615. ret = of_property_read_u32_array(node, "qcom,setb-gpios-func",
  616. (u32 *)setb_cfgs,
  617. drvdata->setb_gpiocnt);
  618. if (ret)
  619. return ret;
  620. for (i = 0; i < drvdata->setb_gpiocnt; i++)
  621. drvdata->setb_cfgs[i].func = setb_cfgs[i];
  622. ret = of_property_read_u32_array(node, "qcom,setb-gpios-drv",
  623. (u32 *)setb_cfgs,
  624. drvdata->setb_gpiocnt);
  625. if (ret)
  626. return ret;
  627. for (i = 0; i < drvdata->setb_gpiocnt; i++)
  628. drvdata->setb_cfgs[i].drv = setb_cfgs[i];
  629. ret = of_property_read_u32_array(node, "qcom,setb-gpios-pull",
  630. (u32 *)setb_cfgs,
  631. drvdata->setb_gpiocnt);
  632. if (ret)
  633. return ret;
  634. for (i = 0; i < drvdata->setb_gpiocnt; i++)
  635. drvdata->setb_cfgs[i].pull = setb_cfgs[i];
  636. ret = of_property_read_u32_array(node, "qcom,setb-gpios-dir",
  637. (u32 *)setb_cfgs,
  638. drvdata->setb_gpiocnt);
  639. if (ret)
  640. return ret;
  641. for (i = 0; i < drvdata->setb_gpiocnt; i++)
  642. drvdata->setb_cfgs[i].dir = setb_cfgs[i];
  643. devm_kfree(dev, setb_cfgs);
  644. } else {
  645. dev_err(dev, "setb gpios not specified\n");
  646. }
  647. return 0;
  648. }
  649. static int __devinit tpiu_probe(struct platform_device *pdev)
  650. {
  651. int ret;
  652. struct device *dev = &pdev->dev;
  653. struct coresight_platform_data *pdata;
  654. struct tpiu_drvdata *drvdata;
  655. struct resource *res;
  656. struct coresight_desc *desc;
  657. if (coresight_fuse_access_disabled())
  658. return -EPERM;
  659. if (pdev->dev.of_node) {
  660. pdata = of_get_coresight_platform_data(dev, pdev->dev.of_node);
  661. if (IS_ERR(pdata))
  662. return PTR_ERR(pdata);
  663. pdev->dev.platform_data = pdata;
  664. }
  665. drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
  666. if (!drvdata)
  667. return -ENOMEM;
  668. drvdata->dev = &pdev->dev;
  669. platform_set_drvdata(pdev, drvdata);
  670. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tpiu-base");
  671. if (!res)
  672. return -ENODEV;
  673. drvdata->base = devm_ioremap(dev, res->start, resource_size(res));
  674. if (!drvdata->base)
  675. return -ENOMEM;
  676. mutex_init(&drvdata->mutex);
  677. drvdata->clk = devm_clk_get(dev, "core_clk");
  678. if (IS_ERR(drvdata->clk))
  679. return PTR_ERR(drvdata->clk);
  680. ret = clk_set_rate(drvdata->clk, CORESIGHT_CLK_RATE_TRACE);
  681. if (ret)
  682. return ret;
  683. ret = clk_prepare_enable(drvdata->clk);
  684. if (ret)
  685. return ret;
  686. /* Disable tpiu to support older targets that need this */
  687. __tpiu_disable(drvdata);
  688. clk_disable_unprepare(drvdata->clk);
  689. if (pdev->dev.of_node) {
  690. ret = tpiu_parse_of_data(pdev, drvdata);
  691. if (ret)
  692. return ret;
  693. }
  694. desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
  695. if (!desc)
  696. return -ENOMEM;
  697. desc->type = CORESIGHT_DEV_TYPE_SINK;
  698. desc->subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT;
  699. desc->ops = &tpiu_cs_ops;
  700. desc->pdata = pdev->dev.platform_data;
  701. desc->dev = &pdev->dev;
  702. desc->groups = tpiu_attr_grps;
  703. desc->owner = THIS_MODULE;
  704. drvdata->csdev = coresight_register(desc);
  705. if (IS_ERR(drvdata->csdev))
  706. return PTR_ERR(drvdata->csdev);
  707. dev_info(dev, "TPIU initialized\n");
  708. return 0;
  709. }
  710. static int __devexit tpiu_remove(struct platform_device *pdev)
  711. {
  712. struct tpiu_drvdata *drvdata = platform_get_drvdata(pdev);
  713. mutex_destroy(&drvdata->mutex);
  714. coresight_unregister(drvdata->csdev);
  715. return 0;
  716. }
  717. static struct of_device_id tpiu_match[] = {
  718. {.compatible = "arm,coresight-tpiu"},
  719. {}
  720. };
  721. static struct platform_driver tpiu_driver = {
  722. .probe = tpiu_probe,
  723. .remove = __devexit_p(tpiu_remove),
  724. .driver = {
  725. .name = "coresight-tpiu",
  726. .owner = THIS_MODULE,
  727. .of_match_table = tpiu_match,
  728. },
  729. };
  730. static int __init tpiu_init(void)
  731. {
  732. return platform_driver_register(&tpiu_driver);
  733. }
  734. module_init(tpiu_init);
  735. static void __exit tpiu_exit(void)
  736. {
  737. platform_driver_unregister(&tpiu_driver);
  738. }
  739. module_exit(tpiu_exit);
  740. MODULE_LICENSE("GPL v2");
  741. MODULE_DESCRIPTION("CoreSight Trace Port Interface Unit driver");