Kconfig.cpu 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452
  1. comment "Processor Type"
  2. choice
  3. prompt "CPU family support"
  4. default M68KCLASSIC if MMU
  5. default COLDFIRE if !MMU
  6. help
  7. The Freescale (was Motorola) M68K family of processors implements
  8. the full 68000 processor instruction set.
  9. The Freescale ColdFire family of processors is a modern derivitive
  10. of the 68000 processor family. They are mainly targeted at embedded
  11. applications, and are all System-On-Chip (SOC) devices, as opposed
  12. to stand alone CPUs. They implement a subset of the original 68000
  13. processor instruction set.
  14. If you anticipate running this kernel on a computer with a classic
  15. MC68xxx processor, select M68KCLASSIC.
  16. If you anticipate running this kernel on a computer with a ColdFire
  17. processor, select COLDFIRE.
  18. config M68KCLASSIC
  19. bool "Classic M68K CPU family support"
  20. config COLDFIRE
  21. bool "Coldfire CPU family support"
  22. select GENERIC_GPIO
  23. select ARCH_REQUIRE_GPIOLIB
  24. select CPU_HAS_NO_BITFIELDS
  25. select CPU_HAS_NO_MULDIV64
  26. select GENERIC_CSUM
  27. endchoice
  28. if M68KCLASSIC
  29. config M68000
  30. bool
  31. select CPU_HAS_NO_BITFIELDS
  32. select CPU_HAS_NO_MULDIV64
  33. select GENERIC_CSUM
  34. help
  35. The Freescale (was Motorola) 68000 CPU is the first generation of
  36. the well known M68K family of processors. The CPU core as well as
  37. being available as a stand alone CPU was also used in many
  38. System-On-Chip devices (eg 68328, 68302, etc). It does not contain
  39. a paging MMU.
  40. config MCPU32
  41. bool
  42. select CPU_HAS_NO_BITFIELDS
  43. help
  44. The Freescale (was then Motorola) CPU32 is a CPU core that is
  45. based on the 68020 processor. For the most part it is used in
  46. System-On-Chip parts, and does not contain a paging MMU.
  47. config M68020
  48. bool "68020 support"
  49. depends on MMU
  50. select GENERIC_ATOMIC64
  51. select CPU_HAS_ADDRESS_SPACES
  52. help
  53. If you anticipate running this kernel on a computer with a MC68020
  54. processor, say Y. Otherwise, say N. Note that the 68020 requires a
  55. 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
  56. Sun 3, which provides its own version.
  57. config M68030
  58. bool "68030 support"
  59. depends on MMU && !MMU_SUN3
  60. select GENERIC_ATOMIC64
  61. select CPU_HAS_ADDRESS_SPACES
  62. help
  63. If you anticipate running this kernel on a computer with a MC68030
  64. processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
  65. work, as it does not include an MMU (Memory Management Unit).
  66. config M68040
  67. bool "68040 support"
  68. depends on MMU && !MMU_SUN3
  69. select GENERIC_ATOMIC64
  70. select CPU_HAS_ADDRESS_SPACES
  71. help
  72. If you anticipate running this kernel on a computer with a MC68LC040
  73. or MC68040 processor, say Y. Otherwise, say N. Note that an
  74. MC68EC040 will not work, as it does not include an MMU (Memory
  75. Management Unit).
  76. config M68060
  77. bool "68060 support"
  78. depends on MMU && !MMU_SUN3
  79. select GENERIC_ATOMIC64
  80. select CPU_HAS_ADDRESS_SPACES
  81. help
  82. If you anticipate running this kernel on a computer with a MC68060
  83. processor, say Y. Otherwise, say N.
  84. config M68328
  85. bool "MC68328"
  86. depends on !MMU
  87. select M68000
  88. help
  89. Motorola 68328 processor support.
  90. config M68EZ328
  91. bool "MC68EZ328"
  92. depends on !MMU
  93. select M68000
  94. help
  95. Motorola 68EX328 processor support.
  96. config M68VZ328
  97. bool "MC68VZ328"
  98. depends on !MMU
  99. select M68000
  100. help
  101. Motorola 68VZ328 processor support.
  102. config M68360
  103. bool "MC68360"
  104. depends on !MMU
  105. select MCPU32
  106. help
  107. Motorola 68360 processor support.
  108. endif # M68KCLASSIC
  109. if COLDFIRE
  110. config M5206
  111. bool "MCF5206"
  112. depends on !MMU
  113. select COLDFIRE_SW_A7
  114. select HAVE_MBAR
  115. help
  116. Motorola ColdFire 5206 processor support.
  117. config M5206e
  118. bool "MCF5206e"
  119. depends on !MMU
  120. select COLDFIRE_SW_A7
  121. select HAVE_MBAR
  122. help
  123. Motorola ColdFire 5206e processor support.
  124. config M520x
  125. bool "MCF520x"
  126. depends on !MMU
  127. select GENERIC_CLOCKEVENTS
  128. select HAVE_CACHE_SPLIT
  129. help
  130. Freescale Coldfire 5207/5208 processor support.
  131. config M523x
  132. bool "MCF523x"
  133. depends on !MMU
  134. select GENERIC_CLOCKEVENTS
  135. select HAVE_CACHE_SPLIT
  136. select HAVE_IPSBAR
  137. help
  138. Freescale Coldfire 5230/1/2/4/5 processor support
  139. config M5249
  140. bool "MCF5249"
  141. depends on !MMU
  142. select COLDFIRE_SW_A7
  143. select HAVE_MBAR
  144. help
  145. Motorola ColdFire 5249 processor support.
  146. config M527x
  147. bool
  148. config M5271
  149. bool "MCF5271"
  150. depends on !MMU
  151. select M527x
  152. select HAVE_CACHE_SPLIT
  153. select HAVE_IPSBAR
  154. select GENERIC_CLOCKEVENTS
  155. help
  156. Freescale (Motorola) ColdFire 5270/5271 processor support.
  157. config M5272
  158. bool "MCF5272"
  159. depends on !MMU
  160. select COLDFIRE_SW_A7
  161. select HAVE_MBAR
  162. help
  163. Motorola ColdFire 5272 processor support.
  164. config M5275
  165. bool "MCF5275"
  166. depends on !MMU
  167. select M527x
  168. select HAVE_CACHE_SPLIT
  169. select HAVE_IPSBAR
  170. select GENERIC_CLOCKEVENTS
  171. help
  172. Freescale (Motorola) ColdFire 5274/5275 processor support.
  173. config M528x
  174. bool "MCF528x"
  175. depends on !MMU
  176. select GENERIC_CLOCKEVENTS
  177. select HAVE_CACHE_SPLIT
  178. select HAVE_IPSBAR
  179. help
  180. Motorola ColdFire 5280/5282 processor support.
  181. config M5307
  182. bool "MCF5307"
  183. depends on !MMU
  184. select COLDFIRE_SW_A7
  185. select HAVE_CACHE_CB
  186. select HAVE_MBAR
  187. help
  188. Motorola ColdFire 5307 processor support.
  189. config M532x
  190. bool "MCF532x"
  191. depends on !MMU
  192. select HAVE_CACHE_CB
  193. help
  194. Freescale (Motorola) ColdFire 532x processor support.
  195. config M5407
  196. bool "MCF5407"
  197. depends on !MMU
  198. select COLDFIRE_SW_A7
  199. select HAVE_CACHE_CB
  200. select HAVE_MBAR
  201. help
  202. Motorola ColdFire 5407 processor support.
  203. config M54xx
  204. bool
  205. config M547x
  206. bool "MCF547x"
  207. select M54xx
  208. select MMU_COLDFIRE if MMU
  209. select HAVE_CACHE_CB
  210. select HAVE_MBAR
  211. help
  212. Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
  213. config M548x
  214. bool "MCF548x"
  215. select MMU_COLDFIRE if MMU
  216. select M54xx
  217. select HAVE_CACHE_CB
  218. select HAVE_MBAR
  219. help
  220. Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
  221. endif # COLDFIRE
  222. comment "Processor Specific Options"
  223. config M68KFPU_EMU
  224. bool "Math emulation support (EXPERIMENTAL)"
  225. depends on MMU
  226. depends on EXPERIMENTAL
  227. help
  228. At some point in the future, this will cause floating-point math
  229. instructions to be emulated by the kernel on machines that lack a
  230. floating-point math coprocessor. Thrill-seekers and chronically
  231. sleep-deprived psychotic hacker types can say Y now, everyone else
  232. should probably wait a while.
  233. config M68KFPU_EMU_EXTRAPREC
  234. bool "Math emulation extra precision"
  235. depends on M68KFPU_EMU
  236. help
  237. The fpu uses normally a few bit more during calculations for
  238. correct rounding, the emulator can (often) do the same but this
  239. extra calculation can cost quite some time, so you can disable
  240. it here. The emulator will then "only" calculate with a 64 bit
  241. mantissa and round slightly incorrect, what is more than enough
  242. for normal usage.
  243. config M68KFPU_EMU_ONLY
  244. bool "Math emulation only kernel"
  245. depends on M68KFPU_EMU
  246. help
  247. This option prevents any floating-point instructions from being
  248. compiled into the kernel, thereby the kernel doesn't save any
  249. floating point context anymore during task switches, so this
  250. kernel will only be usable on machines without a floating-point
  251. math coprocessor. This makes the kernel a bit faster as no tests
  252. needs to be executed whether a floating-point instruction in the
  253. kernel should be executed or not.
  254. config ADVANCED
  255. bool "Advanced configuration options"
  256. depends on MMU
  257. ---help---
  258. This gives you access to some advanced options for the CPU. The
  259. defaults should be fine for most users, but these options may make
  260. it possible for you to improve performance somewhat if you know what
  261. you are doing.
  262. Note that the answer to this question won't directly affect the
  263. kernel: saying N will just cause the configurator to skip all
  264. the questions about these options.
  265. Most users should say N to this question.
  266. config RMW_INSNS
  267. bool "Use read-modify-write instructions"
  268. depends on ADVANCED
  269. ---help---
  270. This allows to use certain instructions that work with indivisible
  271. read-modify-write bus cycles. While this is faster than the
  272. workaround of disabling interrupts, it can conflict with DMA
  273. ( = direct memory access) on many Amiga systems, and it is also said
  274. to destabilize other machines. It is very likely that this will
  275. cause serious problems on any Amiga or Atari Medusa if set. The only
  276. configuration where it should work are 68030-based Ataris, where it
  277. apparently improves performance. But you've been warned! Unless you
  278. really know what you are doing, say N. Try Y only if you're quite
  279. adventurous.
  280. config SINGLE_MEMORY_CHUNK
  281. bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
  282. depends on MMU
  283. default y if SUN3
  284. select NEED_MULTIPLE_NODES
  285. help
  286. Ignore all but the first contiguous chunk of physical memory for VM
  287. purposes. This will save a few bytes kernel size and may speed up
  288. some operations. Say N if not sure.
  289. config ARCH_DISCONTIGMEM_ENABLE
  290. def_bool MMU && !SINGLE_MEMORY_CHUNK
  291. config 060_WRITETHROUGH
  292. bool "Use write-through caching for 68060 supervisor accesses"
  293. depends on ADVANCED && M68060
  294. ---help---
  295. The 68060 generally uses copyback caching of recently accessed data.
  296. Copyback caching means that memory writes will be held in an on-chip
  297. cache and only written back to memory some time later. Saying Y
  298. here will force supervisor (kernel) accesses to use writethrough
  299. caching. Writethrough caching means that data is written to memory
  300. straight away, so that cache and memory data always agree.
  301. Writethrough caching is less efficient, but is needed for some
  302. drivers on 68060 based systems where the 68060 bus snooping signal
  303. is hardwired on. The 53c710 SCSI driver is known to suffer from
  304. this problem.
  305. config M68K_L2_CACHE
  306. bool
  307. depends on MAC
  308. default y
  309. config NODES_SHIFT
  310. int
  311. default "3"
  312. depends on !SINGLE_MEMORY_CHUNK
  313. config FPU
  314. bool
  315. config COLDFIRE_SW_A7
  316. bool
  317. config HAVE_CACHE_SPLIT
  318. bool
  319. config HAVE_CACHE_CB
  320. bool
  321. config HAVE_MBAR
  322. bool
  323. config HAVE_IPSBAR
  324. bool
  325. config CLOCK_SET
  326. bool "Enable setting the CPU clock frequency"
  327. depends on COLDFIRE
  328. default n
  329. help
  330. On some CPU's you do not need to know what the core CPU clock
  331. frequency is. On these you can disable clock setting. On some
  332. traditional 68K parts, and on all ColdFire parts you need to set
  333. the appropriate CPU clock frequency. On these devices many of the
  334. onboard peripherals derive their timing from the master CPU clock
  335. frequency.
  336. config CLOCK_FREQ
  337. int "Set the core clock frequency"
  338. default "66666666"
  339. depends on CLOCK_SET
  340. help
  341. Define the CPU clock frequency in use. This is the core clock
  342. frequency, it may or may not be the same as the external clock
  343. crystal fitted to your board. Some processors have an internal
  344. PLL and can have their frequency programmed at run time, others
  345. use internal dividers. In general the kernel won't setup a PLL
  346. if it is fitted (there are some exceptions). This value will be
  347. specific to the exact CPU that you are using.
  348. config OLDMASK
  349. bool "Old mask 5307 (1H55J) silicon"
  350. depends on M5307
  351. help
  352. Build support for the older revision ColdFire 5307 silicon.
  353. Specifically this is the 1H55J mask revision.
  354. if HAVE_CACHE_SPLIT
  355. choice
  356. prompt "Split Cache Configuration"
  357. default CACHE_I
  358. config CACHE_I
  359. bool "Instruction"
  360. help
  361. Use all of the ColdFire CPU cache memory as an instruction cache.
  362. config CACHE_D
  363. bool "Data"
  364. help
  365. Use all of the ColdFire CPU cache memory as a data cache.
  366. config CACHE_BOTH
  367. bool "Both"
  368. help
  369. Split the ColdFire CPU cache, and use half as an instruction cache
  370. and half as a data cache.
  371. endchoice
  372. endif
  373. if HAVE_CACHE_CB
  374. choice
  375. prompt "Data cache mode"
  376. default CACHE_WRITETHRU
  377. config CACHE_WRITETHRU
  378. bool "Write-through"
  379. help
  380. The ColdFire CPU cache is set into Write-through mode.
  381. config CACHE_COPYBACK
  382. bool "Copy-back"
  383. help
  384. The ColdFire CPU cache is set into Copy-back mode.
  385. endchoice
  386. endif