sh_pfc.h 5.7 KB

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  1. /*
  2. * SuperH Pin Function Controller Support
  3. *
  4. * Copyright (c) 2008 Magnus Damm
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #ifndef __SH_PFC_H
  11. #define __SH_PFC_H
  12. #include <asm-generic/gpio.h>
  13. typedef unsigned short pinmux_enum_t;
  14. typedef unsigned short pinmux_flag_t;
  15. #define PINMUX_TYPE_NONE 0
  16. #define PINMUX_TYPE_FUNCTION 1
  17. #define PINMUX_TYPE_GPIO 2
  18. #define PINMUX_TYPE_OUTPUT 3
  19. #define PINMUX_TYPE_INPUT 4
  20. #define PINMUX_TYPE_INPUT_PULLUP 5
  21. #define PINMUX_TYPE_INPUT_PULLDOWN 6
  22. #define PINMUX_FLAG_TYPE (0x7)
  23. #define PINMUX_FLAG_WANT_PULLUP (1 << 3)
  24. #define PINMUX_FLAG_WANT_PULLDOWN (1 << 4)
  25. #define PINMUX_FLAG_DBIT_SHIFT 5
  26. #define PINMUX_FLAG_DBIT (0x1f << PINMUX_FLAG_DBIT_SHIFT)
  27. #define PINMUX_FLAG_DREG_SHIFT 10
  28. #define PINMUX_FLAG_DREG (0x3f << PINMUX_FLAG_DREG_SHIFT)
  29. struct pinmux_gpio {
  30. pinmux_enum_t enum_id;
  31. pinmux_flag_t flags;
  32. };
  33. #define PINMUX_GPIO(gpio, data_or_mark) [gpio] = { data_or_mark }
  34. #define PINMUX_DATA(data_or_mark, ids...) data_or_mark, ids, 0
  35. struct pinmux_cfg_reg {
  36. unsigned long reg, reg_width, field_width;
  37. unsigned long *cnt;
  38. pinmux_enum_t *enum_ids;
  39. unsigned long *var_field_width;
  40. };
  41. #define PINMUX_CFG_REG(name, r, r_width, f_width) \
  42. .reg = r, .reg_width = r_width, .field_width = f_width, \
  43. .cnt = (unsigned long [r_width / f_width]) {}, \
  44. .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)])
  45. #define PINMUX_CFG_REG_VAR(name, r, r_width, var_fw0, var_fwn...) \
  46. .reg = r, .reg_width = r_width, \
  47. .cnt = (unsigned long [r_width]) {}, \
  48. .var_field_width = (unsigned long [r_width]) { var_fw0, var_fwn, 0 }, \
  49. .enum_ids = (pinmux_enum_t [])
  50. struct pinmux_data_reg {
  51. unsigned long reg, reg_width, reg_shadow;
  52. pinmux_enum_t *enum_ids;
  53. void __iomem *mapped_reg;
  54. };
  55. #define PINMUX_DATA_REG(name, r, r_width) \
  56. .reg = r, .reg_width = r_width, \
  57. .enum_ids = (pinmux_enum_t [r_width]) \
  58. struct pinmux_irq {
  59. int irq;
  60. pinmux_enum_t *enum_ids;
  61. };
  62. #define PINMUX_IRQ(irq_nr, ids...) \
  63. { .irq = irq_nr, .enum_ids = (pinmux_enum_t []) { ids, 0 } } \
  64. struct pinmux_range {
  65. pinmux_enum_t begin;
  66. pinmux_enum_t end;
  67. pinmux_enum_t force;
  68. };
  69. struct pfc_window {
  70. phys_addr_t phys;
  71. void __iomem *virt;
  72. unsigned long size;
  73. };
  74. struct pinmux_info {
  75. char *name;
  76. pinmux_enum_t reserved_id;
  77. struct pinmux_range data;
  78. struct pinmux_range input;
  79. struct pinmux_range input_pd;
  80. struct pinmux_range input_pu;
  81. struct pinmux_range output;
  82. struct pinmux_range mark;
  83. struct pinmux_range function;
  84. unsigned first_gpio, last_gpio;
  85. struct pinmux_gpio *gpios;
  86. struct pinmux_cfg_reg *cfg_regs;
  87. struct pinmux_data_reg *data_regs;
  88. pinmux_enum_t *gpio_data;
  89. unsigned int gpio_data_size;
  90. struct pinmux_irq *gpio_irq;
  91. unsigned int gpio_irq_size;
  92. struct resource *resource;
  93. unsigned int num_resources;
  94. struct pfc_window *window;
  95. unsigned long unlock_reg;
  96. struct gpio_chip chip;
  97. };
  98. int register_pinmux(struct pinmux_info *pip);
  99. int unregister_pinmux(struct pinmux_info *pip);
  100. /* helper macro for port */
  101. #define PORT_1(fn, pfx, sfx) fn(pfx, sfx)
  102. #define PORT_10(fn, pfx, sfx) \
  103. PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \
  104. PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \
  105. PORT_1(fn, pfx##4, sfx), PORT_1(fn, pfx##5, sfx), \
  106. PORT_1(fn, pfx##6, sfx), PORT_1(fn, pfx##7, sfx), \
  107. PORT_1(fn, pfx##8, sfx), PORT_1(fn, pfx##9, sfx)
  108. #define PORT_90(fn, pfx, sfx) \
  109. PORT_10(fn, pfx##1, sfx), PORT_10(fn, pfx##2, sfx), \
  110. PORT_10(fn, pfx##3, sfx), PORT_10(fn, pfx##4, sfx), \
  111. PORT_10(fn, pfx##5, sfx), PORT_10(fn, pfx##6, sfx), \
  112. PORT_10(fn, pfx##7, sfx), PORT_10(fn, pfx##8, sfx), \
  113. PORT_10(fn, pfx##9, sfx)
  114. #define _PORT_ALL(pfx, sfx) pfx##_##sfx
  115. #define _GPIO_PORT(pfx, sfx) PINMUX_GPIO(GPIO_PORT##pfx, PORT##pfx##_DATA)
  116. #define PORT_ALL(str) CPU_ALL_PORT(_PORT_ALL, PORT, str)
  117. #define GPIO_PORT_ALL() CPU_ALL_PORT(_GPIO_PORT, , unused)
  118. #define GPIO_FN(str) PINMUX_GPIO(GPIO_FN_##str, str##_MARK)
  119. /* helper macro for pinmux_enum_t */
  120. #define PORT_DATA_I(nr) \
  121. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_IN)
  122. #define PORT_DATA_I_PD(nr) \
  123. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
  124. PORT##nr##_IN, PORT##nr##_IN_PD)
  125. #define PORT_DATA_I_PU(nr) \
  126. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
  127. PORT##nr##_IN, PORT##nr##_IN_PU)
  128. #define PORT_DATA_I_PU_PD(nr) \
  129. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, \
  130. PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
  131. #define PORT_DATA_O(nr) \
  132. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT)
  133. #define PORT_DATA_IO(nr) \
  134. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
  135. PORT##nr##_IN)
  136. #define PORT_DATA_IO_PD(nr) \
  137. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
  138. PORT##nr##_IN, PORT##nr##_IN_PD)
  139. #define PORT_DATA_IO_PU(nr) \
  140. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
  141. PORT##nr##_IN, PORT##nr##_IN_PU)
  142. #define PORT_DATA_IO_PU_PD(nr) \
  143. PINMUX_DATA(PORT##nr##_DATA, PORT##nr##_FN0, PORT##nr##_OUT, \
  144. PORT##nr##_IN, PORT##nr##_IN_PD, PORT##nr##_IN_PU)
  145. /* helper macro for top 4 bits in PORTnCR */
  146. #define _PCRH(in, in_pd, in_pu, out) \
  147. 0, (out), (in), 0, \
  148. 0, 0, 0, 0, \
  149. 0, 0, (in_pd), 0, \
  150. 0, 0, (in_pu), 0
  151. #define PORTCR(nr, reg) \
  152. { \
  153. PINMUX_CFG_REG("PORT" nr "CR", reg, 8, 4) { \
  154. _PCRH(PORT##nr##_IN, PORT##nr##_IN_PD, \
  155. PORT##nr##_IN_PU, PORT##nr##_OUT), \
  156. PORT##nr##_FN0, PORT##nr##_FN1, \
  157. PORT##nr##_FN2, PORT##nr##_FN3, \
  158. PORT##nr##_FN4, PORT##nr##_FN5, \
  159. PORT##nr##_FN6, PORT##nr##_FN7 } \
  160. }
  161. #endif /* __SH_PFC_H */