serial_mfd.h 1.3 KB

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  1. #ifndef _SERIAL_MFD_H_
  2. #define _SERIAL_MFD_H_
  3. /* HW register offset definition */
  4. #define UART_FOR 0x08
  5. #define UART_PS 0x0C
  6. #define UART_MUL 0x0D
  7. #define UART_DIV 0x0E
  8. #define HSU_GBL_IEN 0x0
  9. #define HSU_GBL_IST 0x4
  10. #define HSU_GBL_INT_BIT_PORT0 0x0
  11. #define HSU_GBL_INT_BIT_PORT1 0x1
  12. #define HSU_GBL_INT_BIT_PORT2 0x2
  13. #define HSU_GBL_INT_BIT_IRI 0x3
  14. #define HSU_GBL_INT_BIT_HDLC 0x4
  15. #define HSU_GBL_INT_BIT_DMA 0x5
  16. #define HSU_GBL_ISR 0x8
  17. #define HSU_GBL_DMASR 0x400
  18. #define HSU_GBL_DMAISR 0x404
  19. #define HSU_PORT_REG_OFFSET 0x80
  20. #define HSU_PORT0_REG_OFFSET 0x80
  21. #define HSU_PORT1_REG_OFFSET 0x100
  22. #define HSU_PORT2_REG_OFFSET 0x180
  23. #define HSU_PORT_REG_LENGTH 0x80
  24. #define HSU_DMA_CHANS_REG_OFFSET 0x500
  25. #define HSU_DMA_CHANS_REG_LENGTH 0x40
  26. #define HSU_CH_SR 0x0 /* channel status reg */
  27. #define HSU_CH_CR 0x4 /* control reg */
  28. #define HSU_CH_DCR 0x8 /* descriptor control reg */
  29. #define HSU_CH_BSR 0x10 /* max fifo buffer size reg */
  30. #define HSU_CH_MOTSR 0x14 /* minimum ocp transfer size */
  31. #define HSU_CH_D0SAR 0x20 /* desc 0 start addr */
  32. #define HSU_CH_D0TSR 0x24 /* desc 0 transfer size */
  33. #define HSU_CH_D1SAR 0x28
  34. #define HSU_CH_D1TSR 0x2C
  35. #define HSU_CH_D2SAR 0x30
  36. #define HSU_CH_D2TSR 0x34
  37. #define HSU_CH_D3SAR 0x38
  38. #define HSU_CH_D3TSR 0x3C
  39. #endif