adpd142.h 2.6 KB

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  1. /**
  2. @file adpd142.h
  3. @brief ADPD142 - Low level driver Header 'H' File
  4. */
  5. #ifndef _ADPD142_H_
  6. #define _ADPD142_H_
  7. /**
  8. @brief ADPD142 Slave address
  9. */
  10. #define ADPD142_SLAVE_ADDR 0x64
  11. /**
  12. @brief ADPD142 ChipID
  13. */
  14. #define ADPD_CHIPID_0 0x0016
  15. /**
  16. @brief ADPD142 ChipID 1
  17. */
  18. #define ADPD_CHIPID_1 0x0116
  19. /**
  20. @brief ADPD142 ChipID 2
  21. */
  22. #define ADPD_CHIPID_2 0x0216
  23. /**
  24. @brief ADPD142 ChipID
  25. */
  26. #define ADPD_CHIPID(id) ADPD_CHIPID_##id
  27. /*ADPD142 REGISTER ADDRESS*/
  28. /**
  29. @brief ADPD142 Interrupt Status Register
  30. */
  31. #define ADPD_INT_STATUS_ADDR 0x0
  32. /**
  33. @brief ADPD142 Interrupt Mask Register
  34. */
  35. #define ADPD_INT_MASK_ADDR 0x1
  36. /**
  37. @brief ADPD142 ChipID register
  38. */
  39. #define ADPD_CHIPID_ADDR 0x8
  40. /**
  41. @brief ADPD142 Operating mode Register
  42. */
  43. #define ADPD_OP_MODE_ADDR 0x10
  44. /**
  45. @brief ADPD142 Operating Mode Configuration register
  46. */
  47. #define ADPD_OP_MODE_CFG_ADDR 0x11
  48. /**
  49. @brief ADPD142 Gesture Control Register
  50. */
  51. #define ADPD_GEST_CTRL_ADDR 0x27
  52. /**
  53. @brief ADPD142 Gesture Threshold Register
  54. */
  55. #define ADPD_GEST_THRESH_ADDR 0x28
  56. /**
  57. @brief ADPD142 Gesture Size Register
  58. */
  59. #define ADPD_GEST_SIZE_ADDR 0x29
  60. /**
  61. @brief ADPD142 Proximity ON1 Threshold register
  62. */
  63. #define ADPD_PROX_ON_TH1_ADDR 0x2A
  64. /**
  65. @brief ADPD142 proximity OFF1 Threshold register
  66. */
  67. #define ADPD_PROX_OFF_TH1_ADDR 0x2B
  68. /**
  69. @brief ADPD142 Proximity ON2 Threshold register
  70. */
  71. #define ADPD_PROX_ON_TH2_ADDR 0x2C
  72. /**
  73. @brief ADPD142 Proximity OFF2 Threshold register
  74. */
  75. #define ADPD_PROX_OFF_TH2_ADDR 0x2D
  76. /**
  77. @brief ADPD142 Test PD register
  78. */
  79. #define ADPD_TEST_PD_ADDR 0x52
  80. /**
  81. @brief ADPD142 Access control register
  82. */
  83. #define ADPD_ACCESS_CTRL_ADDR 0x5F
  84. /**
  85. @brief ADPD142 FIFO register
  86. */
  87. #define ADPD_DATA_BUFFER_ADDR 0x60
  88. /**
  89. @brief ADPD142 maximum array size of Platform data
  90. */
  91. #define MAX_CONFIG_REG_CNT 72
  92. /**
  93. @brief ADPD142 Platform Data
  94. */
  95. struct adpd_platform_data {
  96. unsigned short config_size;
  97. unsigned int config_data[MAX_CONFIG_REG_CNT];
  98. };
  99. extern int sensors_create_symlink(struct kobject *target, const char *name);
  100. extern void sensors_remove_symlink(struct kobject *target, const char *name);
  101. extern int sensors_register(struct device *dev, void * drvdata,
  102. struct device_attribute *attributes[], char *name);
  103. extern void sensors_unregister(struct device *dev,
  104. struct device_attribute *attributes[]);
  105. #endif