core.h 6.1 KB

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  1. /* Copyright (c) 2011-2014, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #ifndef __MFD_TABLA_CORE_H__
  13. #define __MFD_TABLA_CORE_H__
  14. #include <linux/types.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/of_irq.h>
  17. #include <linux/mfd/wcd9xxx/core-resource.h>
  18. #define WCD9XXX_SLIM_NUM_PORT_REG 3
  19. #define TABLA_VERSION_1_0 0
  20. #define TABLA_VERSION_1_1 1
  21. #define TABLA_VERSION_2_0 2
  22. #define TABLA_IS_1_X(ver) \
  23. (((ver == TABLA_VERSION_1_0) || (ver == TABLA_VERSION_1_1)) ? 1 : 0)
  24. #define TABLA_IS_2_0(ver) ((ver == TABLA_VERSION_2_0) ? 1 : 0)
  25. #define WCD9XXX_SUPPLY_BUCK_NAME "cdc-vdd-buck"
  26. #define SITAR_VERSION_1P0 0
  27. #define SITAR_VERSION_1P1 1
  28. #define SITAR_IS_1P0(ver) \
  29. ((ver == SITAR_VERSION_1P0) ? 1 : 0)
  30. #define SITAR_IS_1P1(ver) \
  31. ((ver == SITAR_VERSION_1P1) ? 1 : 0)
  32. #define TAIKO_VERSION_1_0 1
  33. #define TAIKO_IS_1_0(ver) \
  34. ((ver == TAIKO_VERSION_1_0) ? 1 : 0)
  35. #define TAPAN_VERSION_1_0 0
  36. #define TAPAN_IS_1_0(ver) \
  37. ((ver == TAPAN_VERSION_1_0) ? 1 : 0)
  38. enum wcd9xxx_slim_slave_addr_type {
  39. WCD9XXX_SLIM_SLAVE_ADDR_TYPE_TABLA,
  40. WCD9XXX_SLIM_SLAVE_ADDR_TYPE_TAIKO,
  41. };
  42. enum {
  43. /* INTR_REG 0 */
  44. WCD9XXX_IRQ_SLIMBUS = 0,
  45. WCD9XXX_IRQ_MBHC_REMOVAL,
  46. WCD9XXX_IRQ_MBHC_SHORT_TERM,
  47. WCD9XXX_IRQ_MBHC_PRESS,
  48. WCD9XXX_IRQ_MBHC_RELEASE,
  49. WCD9XXX_IRQ_MBHC_POTENTIAL,
  50. WCD9XXX_IRQ_MBHC_INSERTION,
  51. WCD9XXX_IRQ_BG_PRECHARGE,
  52. /* INTR_REG 1 */
  53. WCD9XXX_IRQ_PA1_STARTUP,
  54. WCD9XXX_IRQ_PA2_STARTUP,
  55. WCD9XXX_IRQ_PA3_STARTUP,
  56. WCD9XXX_IRQ_PA4_STARTUP,
  57. WCD9306_IRQ_HPH_PA_OCPR_FAULT = WCD9XXX_IRQ_PA4_STARTUP,
  58. WCD9XXX_IRQ_PA5_STARTUP,
  59. WCD9XXX_IRQ_MICBIAS1_PRECHARGE,
  60. WCD9306_IRQ_HPH_PA_OCPL_FAULT = WCD9XXX_IRQ_MICBIAS1_PRECHARGE,
  61. WCD9XXX_IRQ_MICBIAS2_PRECHARGE,
  62. WCD9XXX_IRQ_MICBIAS3_PRECHARGE,
  63. /* INTR_REG 2 */
  64. WCD9XXX_IRQ_HPH_PA_OCPL_FAULT,
  65. WCD9XXX_IRQ_HPH_PA_OCPR_FAULT,
  66. WCD9XXX_IRQ_EAR_PA_OCPL_FAULT,
  67. WCD9XXX_IRQ_HPH_L_PA_STARTUP,
  68. WCD9XXX_IRQ_HPH_R_PA_STARTUP,
  69. WCD9320_IRQ_EAR_PA_STARTUP,
  70. WCD9306_IRQ_MBHC_JACK_SWITCH = WCD9320_IRQ_EAR_PA_STARTUP,
  71. WCD9310_NUM_IRQS,
  72. WCD9XXX_IRQ_RESERVED_0 = WCD9310_NUM_IRQS,
  73. WCD9XXX_IRQ_RESERVED_1,
  74. /* INTR_REG 3 */
  75. WCD9XXX_IRQ_MAD_AUDIO,
  76. WCD9XXX_IRQ_MAD_BEACON,
  77. WCD9XXX_IRQ_MAD_ULTRASOUND,
  78. WCD9XXX_IRQ_SPEAKER_CLIPPING,
  79. WCD9320_IRQ_MBHC_JACK_SWITCH,
  80. WCD9XXX_IRQ_VBAT_MONITOR_ATTACK,
  81. WCD9XXX_IRQ_VBAT_MONITOR_RELEASE,
  82. WCD9XXX_NUM_IRQS,
  83. WCD9XXX_IRQ_RESERVED_2 = WCD9XXX_NUM_IRQS,
  84. };
  85. enum {
  86. TABLA_NUM_IRQS = WCD9310_NUM_IRQS,
  87. SITAR_NUM_IRQS = WCD9310_NUM_IRQS,
  88. TAIKO_NUM_IRQS = WCD9XXX_NUM_IRQS,
  89. TAPAN_NUM_IRQS = WCD9XXX_NUM_IRQS,
  90. };
  91. /*
  92. * data structure for Slimbus and I2S channel.
  93. * Some of fields are only used in smilbus mode
  94. */
  95. struct wcd9xxx_ch {
  96. u32 sph; /* share channel handle - slimbus only */
  97. u32 ch_num; /*
  98. * vitrual channel number, such as 128 -144.
  99. * apply for slimbus only
  100. */
  101. u16 ch_h; /* chanel handle - slimbus only */
  102. u16 port; /*
  103. * tabla port for RX and TX
  104. * such as 0-9 for TX and 10 -16 for RX
  105. * apply for both i2s and slimbus
  106. */
  107. u16 shift; /*
  108. * shift bit for RX and TX
  109. * apply for both i2s and slimbus
  110. */
  111. struct list_head list; /*
  112. * channel link list
  113. * apply for both i2s and slimbus
  114. */
  115. };
  116. struct wcd9xxx_codec_dai_data {
  117. u32 rate; /* sample rate */
  118. u32 bit_width; /* sit width 16,24,32 */
  119. struct list_head wcd9xxx_ch_list; /* channel list */
  120. u16 grph; /* slimbus group handle */
  121. unsigned long ch_mask;
  122. wait_queue_head_t dai_wait;
  123. bool bus_down_in_recovery;
  124. };
  125. #define WCD9XXX_CH(xport, xshift) \
  126. {.port = xport, .shift = xshift}
  127. enum wcd9xxx_chipid_major {
  128. TABLA_MAJOR = cpu_to_le16(0x100),
  129. SITAR_MAJOR = cpu_to_le16(0x101),
  130. TAIKO_MAJOR = cpu_to_le16(0x102),
  131. TAPAN_MAJOR = cpu_to_le16(0x103),
  132. };
  133. struct wcd9xxx_codec_type {
  134. u16 id_major;
  135. u16 id_minor;
  136. struct mfd_cell *dev;
  137. int size;
  138. int num_irqs;
  139. int version; /* -1 to retrive version from chip version register */
  140. enum wcd9xxx_slim_slave_addr_type slim_slave_type;
  141. u16 i2c_chip_status;
  142. };
  143. struct wcd9xxx {
  144. struct device *dev;
  145. struct slim_device *slim;
  146. struct slim_device *slim_slave;
  147. struct mutex io_lock;
  148. struct mutex xfer_lock;
  149. u8 version;
  150. int reset_gpio;
  151. int (*read_dev)(struct wcd9xxx *wcd9xxx, unsigned short reg,
  152. int bytes, void *dest, bool interface_reg);
  153. int (*write_dev)(struct wcd9xxx *wcd9xxx, unsigned short reg,
  154. int bytes, void *src, bool interface_reg);
  155. int (*dev_down)(struct wcd9xxx *wcd9xxx);
  156. int (*post_reset)(struct wcd9xxx *wcd9xxx);
  157. void *ssr_priv;
  158. bool slim_device_bootup;
  159. u32 num_of_supplies;
  160. struct regulator_bulk_data *supplies;
  161. struct wcd9xxx_core_resource core_res;
  162. u16 id_minor;
  163. u16 id_major;
  164. /* Slimbus or I2S port */
  165. u32 num_rx_port;
  166. u32 num_tx_port;
  167. struct wcd9xxx_ch *rx_chs;
  168. struct wcd9xxx_ch *tx_chs;
  169. u32 mclk_rate;
  170. const struct wcd9xxx_codec_type *codec_type;
  171. };
  172. int wcd9xxx_interface_reg_read(struct wcd9xxx *wcd9xxx, unsigned short reg);
  173. int wcd9xxx_interface_reg_write(struct wcd9xxx *wcd9xxx, unsigned short reg,
  174. u8 val);
  175. int wcd9xxx_get_logical_addresses(u8 *pgd_la, u8 *inf_la);
  176. #if defined(CONFIG_WCD9310_CODEC) || \
  177. defined(CONFIG_WCD9304_CODEC) || \
  178. defined(CONFIG_WCD9320_CODEC) || \
  179. defined(CONFIG_WCD9306_CODEC)
  180. int __init wcd9xxx_irq_of_init(struct device_node *node,
  181. struct device_node *parent);
  182. #else
  183. static inline int __init wcd9xxx_irq_of_init(struct device_node *node,
  184. struct device_node *parent)
  185. {
  186. return 0;
  187. }
  188. #endif /* CONFIG_OF */
  189. static inline void wcd9xxx_reg_update(struct wcd9xxx *core,
  190. unsigned short reg,
  191. u8 mask, u8 val)
  192. {
  193. u8 reg_val;
  194. if (core) {
  195. reg_val = wcd9xxx_reg_read(&core->core_res, reg);
  196. reg_val = (reg_val & ~mask) | (val & mask);
  197. wcd9xxx_reg_write(&core->core_res, reg, reg_val);
  198. }
  199. }
  200. #endif