core.h 6.3 KB

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  1. /*
  2. * core.h -- Core driver for NXP PCF50633
  3. *
  4. * (C) 2006-2008 by Openmoko, Inc.
  5. * All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. */
  12. #ifndef __LINUX_MFD_PCF50633_CORE_H
  13. #define __LINUX_MFD_PCF50633_CORE_H
  14. #include <linux/i2c.h>
  15. #include <linux/workqueue.h>
  16. #include <linux/regulator/driver.h>
  17. #include <linux/regulator/machine.h>
  18. #include <linux/power_supply.h>
  19. #include <linux/mfd/pcf50633/backlight.h>
  20. struct pcf50633;
  21. struct regmap;
  22. #define PCF50633_NUM_REGULATORS 11
  23. struct pcf50633_platform_data {
  24. struct regulator_init_data reg_init_data[PCF50633_NUM_REGULATORS];
  25. char **batteries;
  26. int num_batteries;
  27. /*
  28. * Should be set accordingly to the reference resistor used, see
  29. * I_{ch(ref)} charger reference current in the pcf50633 User
  30. * Manual.
  31. */
  32. int charger_reference_current_ma;
  33. /* Callbacks */
  34. void (*probe_done)(struct pcf50633 *);
  35. void (*mbc_event_callback)(struct pcf50633 *, int);
  36. void (*regulator_registered)(struct pcf50633 *, int);
  37. void (*force_shutdown)(struct pcf50633 *);
  38. u8 resumers[5];
  39. struct pcf50633_bl_platform_data *backlight_data;
  40. };
  41. struct pcf50633_irq {
  42. void (*handler) (int, void *);
  43. void *data;
  44. };
  45. int pcf50633_register_irq(struct pcf50633 *pcf, int irq,
  46. void (*handler) (int, void *), void *data);
  47. int pcf50633_free_irq(struct pcf50633 *pcf, int irq);
  48. int pcf50633_irq_mask(struct pcf50633 *pcf, int irq);
  49. int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq);
  50. int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq);
  51. int pcf50633_read_block(struct pcf50633 *, u8 reg,
  52. int nr_regs, u8 *data);
  53. int pcf50633_write_block(struct pcf50633 *pcf, u8 reg,
  54. int nr_regs, u8 *data);
  55. u8 pcf50633_reg_read(struct pcf50633 *, u8 reg);
  56. int pcf50633_reg_write(struct pcf50633 *pcf, u8 reg, u8 val);
  57. int pcf50633_reg_set_bit_mask(struct pcf50633 *pcf, u8 reg, u8 mask, u8 val);
  58. int pcf50633_reg_clear_bits(struct pcf50633 *pcf, u8 reg, u8 bits);
  59. /* Interrupt registers */
  60. #define PCF50633_REG_INT1 0x02
  61. #define PCF50633_REG_INT2 0x03
  62. #define PCF50633_REG_INT3 0x04
  63. #define PCF50633_REG_INT4 0x05
  64. #define PCF50633_REG_INT5 0x06
  65. #define PCF50633_REG_INT1M 0x07
  66. #define PCF50633_REG_INT2M 0x08
  67. #define PCF50633_REG_INT3M 0x09
  68. #define PCF50633_REG_INT4M 0x0a
  69. #define PCF50633_REG_INT5M 0x0b
  70. enum {
  71. /* Chip IRQs */
  72. PCF50633_IRQ_ADPINS,
  73. PCF50633_IRQ_ADPREM,
  74. PCF50633_IRQ_USBINS,
  75. PCF50633_IRQ_USBREM,
  76. PCF50633_IRQ_RESERVED1,
  77. PCF50633_IRQ_RESERVED2,
  78. PCF50633_IRQ_ALARM,
  79. PCF50633_IRQ_SECOND,
  80. PCF50633_IRQ_ONKEYR,
  81. PCF50633_IRQ_ONKEYF,
  82. PCF50633_IRQ_EXTON1R,
  83. PCF50633_IRQ_EXTON1F,
  84. PCF50633_IRQ_EXTON2R,
  85. PCF50633_IRQ_EXTON2F,
  86. PCF50633_IRQ_EXTON3R,
  87. PCF50633_IRQ_EXTON3F,
  88. PCF50633_IRQ_BATFULL,
  89. PCF50633_IRQ_CHGHALT,
  90. PCF50633_IRQ_THLIMON,
  91. PCF50633_IRQ_THLIMOFF,
  92. PCF50633_IRQ_USBLIMON,
  93. PCF50633_IRQ_USBLIMOFF,
  94. PCF50633_IRQ_ADCRDY,
  95. PCF50633_IRQ_ONKEY1S,
  96. PCF50633_IRQ_LOWSYS,
  97. PCF50633_IRQ_LOWBAT,
  98. PCF50633_IRQ_HIGHTMP,
  99. PCF50633_IRQ_AUTOPWRFAIL,
  100. PCF50633_IRQ_DWN1PWRFAIL,
  101. PCF50633_IRQ_DWN2PWRFAIL,
  102. PCF50633_IRQ_LEDPWRFAIL,
  103. PCF50633_IRQ_LEDOVP,
  104. PCF50633_IRQ_LDO1PWRFAIL,
  105. PCF50633_IRQ_LDO2PWRFAIL,
  106. PCF50633_IRQ_LDO3PWRFAIL,
  107. PCF50633_IRQ_LDO4PWRFAIL,
  108. PCF50633_IRQ_LDO5PWRFAIL,
  109. PCF50633_IRQ_LDO6PWRFAIL,
  110. PCF50633_IRQ_HCLDOPWRFAIL,
  111. PCF50633_IRQ_HCLDOOVL,
  112. /* Always last */
  113. PCF50633_NUM_IRQ,
  114. };
  115. struct pcf50633 {
  116. struct device *dev;
  117. struct regmap *regmap;
  118. struct pcf50633_platform_data *pdata;
  119. int irq;
  120. struct pcf50633_irq irq_handler[PCF50633_NUM_IRQ];
  121. struct work_struct irq_work;
  122. struct workqueue_struct *work_queue;
  123. struct mutex lock;
  124. u8 mask_regs[5];
  125. u8 suspend_irq_masks[5];
  126. u8 resume_reason[5];
  127. int is_suspended;
  128. int onkey1s_held;
  129. struct platform_device *rtc_pdev;
  130. struct platform_device *mbc_pdev;
  131. struct platform_device *adc_pdev;
  132. struct platform_device *input_pdev;
  133. struct platform_device *bl_pdev;
  134. struct platform_device *regulator_pdev[PCF50633_NUM_REGULATORS];
  135. };
  136. enum pcf50633_reg_int1 {
  137. PCF50633_INT1_ADPINS = 0x01, /* Adapter inserted */
  138. PCF50633_INT1_ADPREM = 0x02, /* Adapter removed */
  139. PCF50633_INT1_USBINS = 0x04, /* USB inserted */
  140. PCF50633_INT1_USBREM = 0x08, /* USB removed */
  141. /* reserved */
  142. PCF50633_INT1_ALARM = 0x40, /* RTC alarm time is reached */
  143. PCF50633_INT1_SECOND = 0x80, /* RTC periodic second interrupt */
  144. };
  145. enum pcf50633_reg_int2 {
  146. PCF50633_INT2_ONKEYR = 0x01, /* ONKEY rising edge */
  147. PCF50633_INT2_ONKEYF = 0x02, /* ONKEY falling edge */
  148. PCF50633_INT2_EXTON1R = 0x04, /* EXTON1 rising edge */
  149. PCF50633_INT2_EXTON1F = 0x08, /* EXTON1 falling edge */
  150. PCF50633_INT2_EXTON2R = 0x10, /* EXTON2 rising edge */
  151. PCF50633_INT2_EXTON2F = 0x20, /* EXTON2 falling edge */
  152. PCF50633_INT2_EXTON3R = 0x40, /* EXTON3 rising edge */
  153. PCF50633_INT2_EXTON3F = 0x80, /* EXTON3 falling edge */
  154. };
  155. enum pcf50633_reg_int3 {
  156. PCF50633_INT3_BATFULL = 0x01, /* Battery full */
  157. PCF50633_INT3_CHGHALT = 0x02, /* Charger halt */
  158. PCF50633_INT3_THLIMON = 0x04,
  159. PCF50633_INT3_THLIMOFF = 0x08,
  160. PCF50633_INT3_USBLIMON = 0x10,
  161. PCF50633_INT3_USBLIMOFF = 0x20,
  162. PCF50633_INT3_ADCRDY = 0x40, /* ADC result ready */
  163. PCF50633_INT3_ONKEY1S = 0x80, /* ONKEY pressed 1 second */
  164. };
  165. enum pcf50633_reg_int4 {
  166. PCF50633_INT4_LOWSYS = 0x01,
  167. PCF50633_INT4_LOWBAT = 0x02,
  168. PCF50633_INT4_HIGHTMP = 0x04,
  169. PCF50633_INT4_AUTOPWRFAIL = 0x08,
  170. PCF50633_INT4_DWN1PWRFAIL = 0x10,
  171. PCF50633_INT4_DWN2PWRFAIL = 0x20,
  172. PCF50633_INT4_LEDPWRFAIL = 0x40,
  173. PCF50633_INT4_LEDOVP = 0x80,
  174. };
  175. enum pcf50633_reg_int5 {
  176. PCF50633_INT5_LDO1PWRFAIL = 0x01,
  177. PCF50633_INT5_LDO2PWRFAIL = 0x02,
  178. PCF50633_INT5_LDO3PWRFAIL = 0x04,
  179. PCF50633_INT5_LDO4PWRFAIL = 0x08,
  180. PCF50633_INT5_LDO5PWRFAIL = 0x10,
  181. PCF50633_INT5_LDO6PWRFAIL = 0x20,
  182. PCF50633_INT5_HCLDOPWRFAIL = 0x40,
  183. PCF50633_INT5_HCLDOOVL = 0x80,
  184. };
  185. /* misc. registers */
  186. #define PCF50633_REG_OOCSHDWN 0x0c
  187. /* LED registers */
  188. #define PCF50633_REG_LEDOUT 0x28
  189. #define PCF50633_REG_LEDENA 0x29
  190. #define PCF50633_REG_LEDCTL 0x2a
  191. #define PCF50633_REG_LEDDIM 0x2b
  192. static inline struct pcf50633 *dev_to_pcf50633(struct device *dev)
  193. {
  194. return dev_get_drvdata(dev);
  195. }
  196. int pcf50633_irq_init(struct pcf50633 *pcf, int irq);
  197. void pcf50633_irq_free(struct pcf50633 *pcf);
  198. #ifdef CONFIG_PM
  199. int pcf50633_irq_suspend(struct pcf50633 *pcf);
  200. int pcf50633_irq_resume(struct pcf50633 *pcf);
  201. #endif
  202. #endif