mc146818rtc.h 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120
  1. /* mc146818rtc.h - register definitions for the Real-Time-Clock / CMOS RAM
  2. * Copyright Torsten Duwe <duwe@informatik.uni-erlangen.de> 1993
  3. * derived from Data Sheet, Copyright Motorola 1984 (!).
  4. * It was written to be part of the Linux operating system.
  5. */
  6. /* permission is hereby granted to copy, modify and redistribute this code
  7. * in terms of the GNU Library General Public License, Version 2 or later,
  8. * at your option.
  9. */
  10. #ifndef _MC146818RTC_H
  11. #define _MC146818RTC_H
  12. #include <asm/io.h>
  13. #include <linux/rtc.h> /* get the user-level API */
  14. #include <asm/mc146818rtc.h> /* register access macros */
  15. #ifdef __KERNEL__
  16. #include <linux/spinlock.h> /* spinlock_t */
  17. extern spinlock_t rtc_lock; /* serialize CMOS RAM access */
  18. /* Some RTCs extend the mc146818 register set to support alarms of more
  19. * than 24 hours in the future; or dates that include a century code.
  20. * This platform_data structure can pass this information to the driver.
  21. *
  22. * Also, some platforms need suspend()/resume() hooks to kick in special
  23. * handling of wake alarms, e.g. activating ACPI BIOS hooks or setting up
  24. * a separate wakeup alarm used by some almost-clone chips.
  25. */
  26. struct cmos_rtc_board_info {
  27. void (*wake_on)(struct device *dev);
  28. void (*wake_off)(struct device *dev);
  29. u8 rtc_day_alarm; /* zero, or register index */
  30. u8 rtc_mon_alarm; /* zero, or register index */
  31. u8 rtc_century; /* zero, or register index */
  32. };
  33. #endif
  34. /**********************************************************************
  35. * register summary
  36. **********************************************************************/
  37. #define RTC_SECONDS 0
  38. #define RTC_SECONDS_ALARM 1
  39. #define RTC_MINUTES 2
  40. #define RTC_MINUTES_ALARM 3
  41. #define RTC_HOURS 4
  42. #define RTC_HOURS_ALARM 5
  43. /* RTC_*_alarm is always true if 2 MSBs are set */
  44. # define RTC_ALARM_DONT_CARE 0xC0
  45. #define RTC_DAY_OF_WEEK 6
  46. #define RTC_DAY_OF_MONTH 7
  47. #define RTC_MONTH 8
  48. #define RTC_YEAR 9
  49. /* control registers - Moto names
  50. */
  51. #define RTC_REG_A 10
  52. #define RTC_REG_B 11
  53. #define RTC_REG_C 12
  54. #define RTC_REG_D 13
  55. /**********************************************************************
  56. * register details
  57. **********************************************************************/
  58. #define RTC_FREQ_SELECT RTC_REG_A
  59. /* update-in-progress - set to "1" 244 microsecs before RTC goes off the bus,
  60. * reset after update (may take 1.984ms @ 32768Hz RefClock) is complete,
  61. * totalling to a max high interval of 2.228 ms.
  62. */
  63. # define RTC_UIP 0x80
  64. # define RTC_DIV_CTL 0x70
  65. /* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */
  66. # define RTC_REF_CLCK_4MHZ 0x00
  67. # define RTC_REF_CLCK_1MHZ 0x10
  68. # define RTC_REF_CLCK_32KHZ 0x20
  69. /* 2 values for divider stage reset, others for "testing purposes only" */
  70. # define RTC_DIV_RESET1 0x60
  71. # define RTC_DIV_RESET2 0x70
  72. /* Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz */
  73. # define RTC_RATE_SELECT 0x0F
  74. /**********************************************************************/
  75. #define RTC_CONTROL RTC_REG_B
  76. # define RTC_SET 0x80 /* disable updates for clock setting */
  77. # define RTC_PIE 0x40 /* periodic interrupt enable */
  78. # define RTC_AIE 0x20 /* alarm interrupt enable */
  79. # define RTC_UIE 0x10 /* update-finished interrupt enable */
  80. # define RTC_SQWE 0x08 /* enable square-wave output */
  81. # define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */
  82. # define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */
  83. # define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */
  84. /**********************************************************************/
  85. #define RTC_INTR_FLAGS RTC_REG_C
  86. /* caution - cleared by read */
  87. # define RTC_IRQF 0x80 /* any of the following 3 is active */
  88. # define RTC_PF 0x40
  89. # define RTC_AF 0x20
  90. # define RTC_UF 0x10
  91. /**********************************************************************/
  92. #define RTC_VALID RTC_REG_D
  93. # define RTC_VRT 0x80 /* valid RAM and time */
  94. /**********************************************************************/
  95. #ifndef ARCH_RTC_LOCATION /* Override by <asm/mc146818rtc.h>? */
  96. #define RTC_IO_EXTENT 0x8
  97. #define RTC_IO_EXTENT_USED 0x2
  98. #define RTC_IOMAPPED 1 /* Default to I/O mapping. */
  99. #else
  100. #define RTC_IO_EXTENT_USED RTC_IO_EXTENT
  101. #endif /* ARCH_RTC_LOCATION */
  102. #endif /* _MC146818RTC_H */