irda_ice40.h 2.3 KB

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  1. /*
  2. * Copyright (C) 2012 Samsung Electronics
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17. */
  18. #ifndef _IRDA_ICE40_H_
  19. #define _IRDA_ICE40_H_
  20. struct irda_ice40_platform_data {
  21. int fw_ver;
  22. int spi_clk;
  23. int spi_si;
  24. int cresetb;
  25. int rst_n;
  26. int irda_irq;
  27. #ifdef CONFIG_MACH_KLTE_VZW
  28. int tunable_support;
  29. int tunable_crstb;
  30. #endif
  31. };
  32. #define IR_DRIVER_NAME "ice4_dev"
  33. #define IR_IOCTL_BASE 'I'
  34. #define IR_IOCTL_SET_FREQ _IOW(IR_IOCTL_BASE, 1, int)
  35. #define IR_IOCTL_SET_SIZE _IOW(IR_IOCTL_BASE, 2, int)
  36. #define IR_IOCTL_SET_DATA _IOW(IR_IOCTL_BASE, 3, int*)
  37. #define IR_IOCTL_START _IO(IR_IOCTL_BASE, 4)
  38. #define IR_IOCTL_STOP _IO(IR_IOCTL_BASE, 5)
  39. #ifdef IRDA_RX_ENABLE
  40. #define IR_IOCTL_GET_LEARN _IOW(IR_IOCTL_BASE, 6, char*)
  41. #define IR_IOCTL_OPERATION _IOW(IR_IOCTL_BASE, 7, int)
  42. #endif
  43. #define SEC_FPGA_MAX_FW_PATH 255
  44. #define SEC_FPGA_FW_FILENAME "i2c_top_bitmap.bin"
  45. #define SNPRINT_BUF_SIZE 255
  46. #define FW_VER_ADDR 0x02
  47. #define FIRMWARE_MAX_RETRY 2
  48. #define GPIO_FPGA_MAIN_CLK 58
  49. #define GPIO_FPGA_MAIN_CLK_CTC_REV02 18
  50. #define IRDA_I2C_ADDR 0x50
  51. #define IRDA_I2C_RX_ADDR 0x6C
  52. #define IRDA_TEST_CODE_SIZE 144
  53. #define IRDA_TEST_CODE_ADDR 0x00
  54. #define MAX_SIZE 4096
  55. #define READ_LENGTH 8
  56. #define POWER_ON 1
  57. #define POWER_OFF 0
  58. #define SEND_SUCCESS 0
  59. #define SEND_FAIL -1
  60. enum irda_tx_register_map {
  61. IRDA_REG_LENGTH_MSB,
  62. IRDA_REG_LENGTH_LSB,
  63. IRDA_REG_OPERATION,
  64. IRDA_REG_FREQ_MSB,
  65. IRDA_REG_FREQ_LSB,
  66. IRDA_REG_DATA,
  67. };
  68. enum irda_tx_operation_type {
  69. IRDA_SINGLE,
  70. IRDA_REPEAT,
  71. IRDA_STOP,
  72. IRDA_LEARN,
  73. };
  74. extern struct class *sec_class;
  75. #define GPIO_LEVEL_LOW 0
  76. #define GPIO_LEVEL_HIGH 1
  77. #endif /* _IRDA_ICE40_H_ */