amd-iommu.h 5.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172
  1. /*
  2. * Copyright (C) 2007-2010 Advanced Micro Devices, Inc.
  3. * Author: Joerg Roedel <joerg.roedel@amd.com>
  4. * Leo Duran <leo.duran@amd.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #ifndef _ASM_X86_AMD_IOMMU_H
  20. #define _ASM_X86_AMD_IOMMU_H
  21. #include <linux/types.h>
  22. #ifdef CONFIG_AMD_IOMMU
  23. struct task_struct;
  24. struct pci_dev;
  25. extern int amd_iommu_detect(void);
  26. extern int amd_iommu_init_hardware(void);
  27. /**
  28. * amd_iommu_enable_device_erratum() - Enable erratum workaround for device
  29. * in the IOMMUv2 driver
  30. * @pdev: The PCI device the workaround is necessary for
  31. * @erratum: The erratum workaround to enable
  32. *
  33. * The function needs to be called before amd_iommu_init_device().
  34. * Possible values for the erratum number are for now:
  35. * - AMD_PRI_DEV_ERRATUM_ENABLE_RESET - Reset PRI capability when PRI
  36. * is enabled
  37. * - AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE - Limit number of outstanding PRI
  38. * requests to one
  39. */
  40. #define AMD_PRI_DEV_ERRATUM_ENABLE_RESET 0
  41. #define AMD_PRI_DEV_ERRATUM_LIMIT_REQ_ONE 1
  42. extern void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum);
  43. /**
  44. * amd_iommu_init_device() - Init device for use with IOMMUv2 driver
  45. * @pdev: The PCI device to initialize
  46. * @pasids: Number of PASIDs to support for this device
  47. *
  48. * This function does all setup for the device pdev so that it can be
  49. * used with IOMMUv2.
  50. * Returns 0 on success or negative value on error.
  51. */
  52. extern int amd_iommu_init_device(struct pci_dev *pdev, int pasids);
  53. /**
  54. * amd_iommu_free_device() - Free all IOMMUv2 related device resources
  55. * and disable IOMMUv2 usage for this device
  56. * @pdev: The PCI device to disable IOMMUv2 usage for'
  57. */
  58. extern void amd_iommu_free_device(struct pci_dev *pdev);
  59. /**
  60. * amd_iommu_bind_pasid() - Bind a given task to a PASID on a device
  61. * @pdev: The PCI device to bind the task to
  62. * @pasid: The PASID on the device the task should be bound to
  63. * @task: the task to bind
  64. *
  65. * The function returns 0 on success or a negative value on error.
  66. */
  67. extern int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
  68. struct task_struct *task);
  69. /**
  70. * amd_iommu_unbind_pasid() - Unbind a PASID from its task on
  71. * a device
  72. * @pdev: The device of the PASID
  73. * @pasid: The PASID to unbind
  74. *
  75. * When this function returns the device is no longer using the PASID
  76. * and the PASID is no longer bound to its task.
  77. */
  78. extern void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid);
  79. /**
  80. * amd_iommu_set_invalid_ppr_cb() - Register a call-back for failed
  81. * PRI requests
  82. * @pdev: The PCI device the call-back should be registered for
  83. * @cb: The call-back function
  84. *
  85. * The IOMMUv2 driver invokes this call-back when it is unable to
  86. * successfully handle a PRI request. The device driver can then decide
  87. * which PRI response the device should see. Possible return values for
  88. * the call-back are:
  89. *
  90. * - AMD_IOMMU_INV_PRI_RSP_SUCCESS - Send SUCCESS back to the device
  91. * - AMD_IOMMU_INV_PRI_RSP_INVALID - Send INVALID back to the device
  92. * - AMD_IOMMU_INV_PRI_RSP_FAIL - Send Failure back to the device,
  93. * the device is required to disable
  94. * PRI when it receives this response
  95. *
  96. * The function returns 0 on success or negative value on error.
  97. */
  98. #define AMD_IOMMU_INV_PRI_RSP_SUCCESS 0
  99. #define AMD_IOMMU_INV_PRI_RSP_INVALID 1
  100. #define AMD_IOMMU_INV_PRI_RSP_FAIL 2
  101. typedef int (*amd_iommu_invalid_ppr_cb)(struct pci_dev *pdev,
  102. int pasid,
  103. unsigned long address,
  104. u16);
  105. extern int amd_iommu_set_invalid_ppr_cb(struct pci_dev *pdev,
  106. amd_iommu_invalid_ppr_cb cb);
  107. /**
  108. * amd_iommu_device_info() - Get information about IOMMUv2 support of a
  109. * PCI device
  110. * @pdev: PCI device to query information from
  111. * @info: A pointer to an amd_iommu_device_info structure which will contain
  112. * the information about the PCI device
  113. *
  114. * Returns 0 on success, negative value on error
  115. */
  116. #define AMD_IOMMU_DEVICE_FLAG_ATS_SUP 0x1 /* ATS feature supported */
  117. #define AMD_IOMMU_DEVICE_FLAG_PRI_SUP 0x2 /* PRI feature supported */
  118. #define AMD_IOMMU_DEVICE_FLAG_PASID_SUP 0x4 /* PASID context supported */
  119. #define AMD_IOMMU_DEVICE_FLAG_EXEC_SUP 0x8 /* Device may request execution
  120. on memory pages */
  121. #define AMD_IOMMU_DEVICE_FLAG_PRIV_SUP 0x10 /* Device may request
  122. super-user privileges */
  123. struct amd_iommu_device_info {
  124. int max_pasids;
  125. u32 flags;
  126. };
  127. extern int amd_iommu_device_info(struct pci_dev *pdev,
  128. struct amd_iommu_device_info *info);
  129. /**
  130. * amd_iommu_set_invalidate_ctx_cb() - Register a call-back for invalidating
  131. * a pasid context. This call-back is
  132. * invoked when the IOMMUv2 driver needs to
  133. * invalidate a PASID context, for example
  134. * because the task that is bound to that
  135. * context is about to exit.
  136. *
  137. * @pdev: The PCI device the call-back should be registered for
  138. * @cb: The call-back function
  139. */
  140. typedef void (*amd_iommu_invalidate_ctx)(struct pci_dev *pdev, int pasid);
  141. extern int amd_iommu_set_invalidate_ctx_cb(struct pci_dev *pdev,
  142. amd_iommu_invalidate_ctx cb);
  143. #else
  144. static inline int amd_iommu_detect(void) { return -ENODEV; }
  145. #endif
  146. #endif /* _ASM_X86_AMD_IOMMU_H */