f71808e_wdt.c 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819
  1. /***************************************************************************
  2. * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
  3. * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
  4. * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> *
  5. * *
  6. * This program is free software; you can redistribute it and/or modify *
  7. * it under the terms of the GNU General Public License as published by *
  8. * the Free Software Foundation; either version 2 of the License, or *
  9. * (at your option) any later version. *
  10. * *
  11. * This program is distributed in the hope that it will be useful, *
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  14. * GNU General Public License for more details. *
  15. * *
  16. * You should have received a copy of the GNU General Public License *
  17. * along with this program; if not, write to the *
  18. * Free Software Foundation, Inc., *
  19. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  20. ***************************************************************************/
  21. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  22. #include <linux/err.h>
  23. #include <linux/fs.h>
  24. #include <linux/init.h>
  25. #include <linux/io.h>
  26. #include <linux/ioport.h>
  27. #include <linux/miscdevice.h>
  28. #include <linux/module.h>
  29. #include <linux/mutex.h>
  30. #include <linux/notifier.h>
  31. #include <linux/reboot.h>
  32. #include <linux/uaccess.h>
  33. #include <linux/watchdog.h>
  34. #define DRVNAME "f71808e_wdt"
  35. #define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */
  36. #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
  37. #define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */
  38. #define SIO_REG_LDSEL 0x07 /* Logical device select */
  39. #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
  40. #define SIO_REG_DEVREV 0x22 /* Device revision */
  41. #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
  42. #define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */
  43. #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
  44. #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
  45. #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
  46. #define SIO_REG_ENABLE 0x30 /* Logical device enable */
  47. #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
  48. #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
  49. #define SIO_F71808_ID 0x0901 /* Chipset ID */
  50. #define SIO_F71858_ID 0x0507 /* Chipset ID */
  51. #define SIO_F71862_ID 0x0601 /* Chipset ID */
  52. #define SIO_F71869_ID 0x0814 /* Chipset ID */
  53. #define SIO_F71882_ID 0x0541 /* Chipset ID */
  54. #define SIO_F71889_ID 0x0723 /* Chipset ID */
  55. #define F71808FG_REG_WDO_CONF 0xf0
  56. #define F71808FG_REG_WDT_CONF 0xf5
  57. #define F71808FG_REG_WD_TIME 0xf6
  58. #define F71808FG_FLAG_WDOUT_EN 7
  59. #define F71808FG_FLAG_WDTMOUT_STS 5
  60. #define F71808FG_FLAG_WD_EN 5
  61. #define F71808FG_FLAG_WD_PULSE 4
  62. #define F71808FG_FLAG_WD_UNIT 3
  63. /* Default values */
  64. #define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */
  65. #define WATCHDOG_MAX_TIMEOUT (60 * 255)
  66. #define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for
  67. watchdog signal */
  68. #define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output
  69. pin number 63 */
  70. static unsigned short force_id;
  71. module_param(force_id, ushort, 0);
  72. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  73. static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
  74. static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */
  75. module_param(timeout, int, 0);
  76. MODULE_PARM_DESC(timeout,
  77. "Watchdog timeout in seconds. 1<= timeout <="
  78. __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default="
  79. __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
  80. static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH;
  81. module_param(pulse_width, uint, 0);
  82. MODULE_PARM_DESC(pulse_width,
  83. "Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms"
  84. " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");
  85. static unsigned int f71862fg_pin = WATCHDOG_F71862FG_PIN;
  86. module_param(f71862fg_pin, uint, 0);
  87. MODULE_PARM_DESC(f71862fg_pin,
  88. "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
  89. " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN)")");
  90. static bool nowayout = WATCHDOG_NOWAYOUT;
  91. module_param(nowayout, bool, 0444);
  92. MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
  93. static unsigned int start_withtimeout;
  94. module_param(start_withtimeout, uint, 0);
  95. MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
  96. " given initial timeout. Zero (default) disables this feature.");
  97. enum chips { f71808fg, f71858fg, f71862fg, f71869, f71882fg, f71889fg };
  98. static const char *f71808e_names[] = {
  99. "f71808fg",
  100. "f71858fg",
  101. "f71862fg",
  102. "f71869",
  103. "f71882fg",
  104. "f71889fg",
  105. };
  106. /* Super-I/O Function prototypes */
  107. static inline int superio_inb(int base, int reg);
  108. static inline int superio_inw(int base, int reg);
  109. static inline void superio_outb(int base, int reg, u8 val);
  110. static inline void superio_set_bit(int base, int reg, int bit);
  111. static inline void superio_clear_bit(int base, int reg, int bit);
  112. static inline int superio_enter(int base);
  113. static inline void superio_select(int base, int ld);
  114. static inline void superio_exit(int base);
  115. struct watchdog_data {
  116. unsigned short sioaddr;
  117. enum chips type;
  118. unsigned long opened;
  119. struct mutex lock;
  120. char expect_close;
  121. struct watchdog_info ident;
  122. unsigned short timeout;
  123. u8 timer_val; /* content for the wd_time register */
  124. char minutes_mode;
  125. u8 pulse_val; /* pulse width flag */
  126. char pulse_mode; /* enable pulse output mode? */
  127. char caused_reboot; /* last reboot was by the watchdog */
  128. };
  129. static struct watchdog_data watchdog = {
  130. .lock = __MUTEX_INITIALIZER(watchdog.lock),
  131. };
  132. /* Super I/O functions */
  133. static inline int superio_inb(int base, int reg)
  134. {
  135. outb(reg, base);
  136. return inb(base + 1);
  137. }
  138. static int superio_inw(int base, int reg)
  139. {
  140. int val;
  141. val = superio_inb(base, reg) << 8;
  142. val |= superio_inb(base, reg + 1);
  143. return val;
  144. }
  145. static inline void superio_outb(int base, int reg, u8 val)
  146. {
  147. outb(reg, base);
  148. outb(val, base + 1);
  149. }
  150. static inline void superio_set_bit(int base, int reg, int bit)
  151. {
  152. unsigned long val = superio_inb(base, reg);
  153. __set_bit(bit, &val);
  154. superio_outb(base, reg, val);
  155. }
  156. static inline void superio_clear_bit(int base, int reg, int bit)
  157. {
  158. unsigned long val = superio_inb(base, reg);
  159. __clear_bit(bit, &val);
  160. superio_outb(base, reg, val);
  161. }
  162. static inline int superio_enter(int base)
  163. {
  164. /* Don't step on other drivers' I/O space by accident */
  165. if (!request_muxed_region(base, 2, DRVNAME)) {
  166. pr_err("I/O address 0x%04x already in use\n", (int)base);
  167. return -EBUSY;
  168. }
  169. /* according to the datasheet the key must be send twice! */
  170. outb(SIO_UNLOCK_KEY, base);
  171. outb(SIO_UNLOCK_KEY, base);
  172. return 0;
  173. }
  174. static inline void superio_select(int base, int ld)
  175. {
  176. outb(SIO_REG_LDSEL, base);
  177. outb(ld, base + 1);
  178. }
  179. static inline void superio_exit(int base)
  180. {
  181. outb(SIO_LOCK_KEY, base);
  182. release_region(base, 2);
  183. }
  184. static int watchdog_set_timeout(int timeout)
  185. {
  186. if (timeout <= 0
  187. || timeout > max_timeout) {
  188. pr_err("watchdog timeout out of range\n");
  189. return -EINVAL;
  190. }
  191. mutex_lock(&watchdog.lock);
  192. watchdog.timeout = timeout;
  193. if (timeout > 0xff) {
  194. watchdog.timer_val = DIV_ROUND_UP(timeout, 60);
  195. watchdog.minutes_mode = true;
  196. } else {
  197. watchdog.timer_val = timeout;
  198. watchdog.minutes_mode = false;
  199. }
  200. mutex_unlock(&watchdog.lock);
  201. return 0;
  202. }
  203. static int watchdog_set_pulse_width(unsigned int pw)
  204. {
  205. int err = 0;
  206. mutex_lock(&watchdog.lock);
  207. if (pw <= 1) {
  208. watchdog.pulse_val = 0;
  209. } else if (pw <= 25) {
  210. watchdog.pulse_val = 1;
  211. } else if (pw <= 125) {
  212. watchdog.pulse_val = 2;
  213. } else if (pw <= 5000) {
  214. watchdog.pulse_val = 3;
  215. } else {
  216. pr_err("pulse width out of range\n");
  217. err = -EINVAL;
  218. goto exit_unlock;
  219. }
  220. watchdog.pulse_mode = pw;
  221. exit_unlock:
  222. mutex_unlock(&watchdog.lock);
  223. return err;
  224. }
  225. static int watchdog_keepalive(void)
  226. {
  227. int err = 0;
  228. mutex_lock(&watchdog.lock);
  229. err = superio_enter(watchdog.sioaddr);
  230. if (err)
  231. goto exit_unlock;
  232. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  233. if (watchdog.minutes_mode)
  234. /* select minutes for timer units */
  235. superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  236. F71808FG_FLAG_WD_UNIT);
  237. else
  238. /* select seconds for timer units */
  239. superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  240. F71808FG_FLAG_WD_UNIT);
  241. /* Set timer value */
  242. superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME,
  243. watchdog.timer_val);
  244. superio_exit(watchdog.sioaddr);
  245. exit_unlock:
  246. mutex_unlock(&watchdog.lock);
  247. return err;
  248. }
  249. static int f71862fg_pin_configure(unsigned short ioaddr)
  250. {
  251. /* When ioaddr is non-zero the calling function has to take care of
  252. mutex handling and superio preparation! */
  253. if (f71862fg_pin == 63) {
  254. if (ioaddr) {
  255. /* SPI must be disabled first to use this pin! */
  256. superio_clear_bit(ioaddr, SIO_REG_ROM_ADDR_SEL, 6);
  257. superio_set_bit(ioaddr, SIO_REG_MFUNCT3, 4);
  258. }
  259. } else if (f71862fg_pin == 56) {
  260. if (ioaddr)
  261. superio_set_bit(ioaddr, SIO_REG_MFUNCT1, 1);
  262. } else {
  263. pr_err("Invalid argument f71862fg_pin=%d\n", f71862fg_pin);
  264. return -EINVAL;
  265. }
  266. return 0;
  267. }
  268. static int watchdog_start(void)
  269. {
  270. /* Make sure we don't die as soon as the watchdog is enabled below */
  271. int err = watchdog_keepalive();
  272. if (err)
  273. return err;
  274. mutex_lock(&watchdog.lock);
  275. err = superio_enter(watchdog.sioaddr);
  276. if (err)
  277. goto exit_unlock;
  278. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  279. /* Watchdog pin configuration */
  280. switch (watchdog.type) {
  281. case f71808fg:
  282. /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
  283. superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3);
  284. superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
  285. break;
  286. case f71862fg:
  287. err = f71862fg_pin_configure(watchdog.sioaddr);
  288. if (err)
  289. goto exit_superio;
  290. break;
  291. case f71869:
  292. /* GPIO14 --> WDTRST# */
  293. superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 4);
  294. break;
  295. case f71882fg:
  296. /* Set pin 56 to WDTRST# */
  297. superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
  298. break;
  299. case f71889fg:
  300. /* set pin 40 to WDTRST# */
  301. superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3,
  302. superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf);
  303. break;
  304. default:
  305. /*
  306. * 'default' label to shut up the compiler and catch
  307. * programmer errors
  308. */
  309. err = -ENODEV;
  310. goto exit_superio;
  311. }
  312. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  313. superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0);
  314. superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF,
  315. F71808FG_FLAG_WDOUT_EN);
  316. superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  317. F71808FG_FLAG_WD_EN);
  318. if (watchdog.pulse_mode) {
  319. /* Select "pulse" output mode with given duration */
  320. u8 wdt_conf = superio_inb(watchdog.sioaddr,
  321. F71808FG_REG_WDT_CONF);
  322. /* Set WD_PSWIDTH bits (1:0) */
  323. wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03);
  324. /* Set WD_PULSE to "pulse" mode */
  325. wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE);
  326. superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  327. wdt_conf);
  328. } else {
  329. /* Select "level" output mode */
  330. superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  331. F71808FG_FLAG_WD_PULSE);
  332. }
  333. exit_superio:
  334. superio_exit(watchdog.sioaddr);
  335. exit_unlock:
  336. mutex_unlock(&watchdog.lock);
  337. return err;
  338. }
  339. static int watchdog_stop(void)
  340. {
  341. int err = 0;
  342. mutex_lock(&watchdog.lock);
  343. err = superio_enter(watchdog.sioaddr);
  344. if (err)
  345. goto exit_unlock;
  346. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  347. superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
  348. F71808FG_FLAG_WD_EN);
  349. superio_exit(watchdog.sioaddr);
  350. exit_unlock:
  351. mutex_unlock(&watchdog.lock);
  352. return err;
  353. }
  354. static int watchdog_get_status(void)
  355. {
  356. int status = 0;
  357. mutex_lock(&watchdog.lock);
  358. status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0;
  359. mutex_unlock(&watchdog.lock);
  360. return status;
  361. }
  362. static bool watchdog_is_running(void)
  363. {
  364. /*
  365. * if we fail to determine the watchdog's status assume it to be
  366. * running to be on the safe side
  367. */
  368. bool is_running = true;
  369. mutex_lock(&watchdog.lock);
  370. if (superio_enter(watchdog.sioaddr))
  371. goto exit_unlock;
  372. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  373. is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0))
  374. && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF)
  375. & F71808FG_FLAG_WD_EN);
  376. superio_exit(watchdog.sioaddr);
  377. exit_unlock:
  378. mutex_unlock(&watchdog.lock);
  379. return is_running;
  380. }
  381. /* /dev/watchdog api */
  382. static int watchdog_open(struct inode *inode, struct file *file)
  383. {
  384. int err;
  385. /* If the watchdog is alive we don't need to start it again */
  386. if (test_and_set_bit(0, &watchdog.opened))
  387. return -EBUSY;
  388. err = watchdog_start();
  389. if (err) {
  390. clear_bit(0, &watchdog.opened);
  391. return err;
  392. }
  393. if (nowayout)
  394. __module_get(THIS_MODULE);
  395. watchdog.expect_close = 0;
  396. return nonseekable_open(inode, file);
  397. }
  398. static int watchdog_release(struct inode *inode, struct file *file)
  399. {
  400. clear_bit(0, &watchdog.opened);
  401. if (!watchdog.expect_close) {
  402. watchdog_keepalive();
  403. pr_crit("Unexpected close, not stopping watchdog!\n");
  404. } else if (!nowayout) {
  405. watchdog_stop();
  406. }
  407. return 0;
  408. }
  409. /*
  410. * watchdog_write:
  411. * @file: file handle to the watchdog
  412. * @buf: buffer to write
  413. * @count: count of bytes
  414. * @ppos: pointer to the position to write. No seeks allowed
  415. *
  416. * A write to a watchdog device is defined as a keepalive signal. Any
  417. * write of data will do, as we we don't define content meaning.
  418. */
  419. static ssize_t watchdog_write(struct file *file, const char __user *buf,
  420. size_t count, loff_t *ppos)
  421. {
  422. if (count) {
  423. if (!nowayout) {
  424. size_t i;
  425. /* In case it was set long ago */
  426. bool expect_close = false;
  427. for (i = 0; i != count; i++) {
  428. char c;
  429. if (get_user(c, buf + i))
  430. return -EFAULT;
  431. expect_close = (c == 'V');
  432. }
  433. /* Properly order writes across fork()ed processes */
  434. mutex_lock(&watchdog.lock);
  435. watchdog.expect_close = expect_close;
  436. mutex_unlock(&watchdog.lock);
  437. }
  438. /* someone wrote to us, we should restart timer */
  439. watchdog_keepalive();
  440. }
  441. return count;
  442. }
  443. /*
  444. * watchdog_ioctl:
  445. * @inode: inode of the device
  446. * @file: file handle to the device
  447. * @cmd: watchdog command
  448. * @arg: argument pointer
  449. *
  450. * The watchdog API defines a common set of functions for all watchdogs
  451. * according to their available features.
  452. */
  453. static long watchdog_ioctl(struct file *file, unsigned int cmd,
  454. unsigned long arg)
  455. {
  456. int status;
  457. int new_options;
  458. int new_timeout;
  459. union {
  460. struct watchdog_info __user *ident;
  461. int __user *i;
  462. } uarg;
  463. uarg.i = (int __user *)arg;
  464. switch (cmd) {
  465. case WDIOC_GETSUPPORT:
  466. return copy_to_user(uarg.ident, &watchdog.ident,
  467. sizeof(watchdog.ident)) ? -EFAULT : 0;
  468. case WDIOC_GETSTATUS:
  469. status = watchdog_get_status();
  470. if (status < 0)
  471. return status;
  472. return put_user(status, uarg.i);
  473. case WDIOC_GETBOOTSTATUS:
  474. return put_user(0, uarg.i);
  475. case WDIOC_SETOPTIONS:
  476. if (get_user(new_options, uarg.i))
  477. return -EFAULT;
  478. if (new_options & WDIOS_DISABLECARD)
  479. watchdog_stop();
  480. if (new_options & WDIOS_ENABLECARD)
  481. return watchdog_start();
  482. case WDIOC_KEEPALIVE:
  483. watchdog_keepalive();
  484. return 0;
  485. case WDIOC_SETTIMEOUT:
  486. if (get_user(new_timeout, uarg.i))
  487. return -EFAULT;
  488. if (watchdog_set_timeout(new_timeout))
  489. return -EINVAL;
  490. watchdog_keepalive();
  491. /* Fall */
  492. case WDIOC_GETTIMEOUT:
  493. return put_user(watchdog.timeout, uarg.i);
  494. default:
  495. return -ENOTTY;
  496. }
  497. }
  498. static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
  499. void *unused)
  500. {
  501. if (code == SYS_DOWN || code == SYS_HALT)
  502. watchdog_stop();
  503. return NOTIFY_DONE;
  504. }
  505. static const struct file_operations watchdog_fops = {
  506. .owner = THIS_MODULE,
  507. .llseek = no_llseek,
  508. .open = watchdog_open,
  509. .release = watchdog_release,
  510. .write = watchdog_write,
  511. .unlocked_ioctl = watchdog_ioctl,
  512. };
  513. static struct miscdevice watchdog_miscdev = {
  514. .minor = WATCHDOG_MINOR,
  515. .name = "watchdog",
  516. .fops = &watchdog_fops,
  517. };
  518. static struct notifier_block watchdog_notifier = {
  519. .notifier_call = watchdog_notify_sys,
  520. };
  521. static int __init watchdog_init(int sioaddr)
  522. {
  523. int wdt_conf, err = 0;
  524. /* No need to lock watchdog.lock here because no entry points
  525. * into the module have been registered yet.
  526. */
  527. watchdog.sioaddr = sioaddr;
  528. watchdog.ident.options = WDIOC_SETTIMEOUT
  529. | WDIOF_MAGICCLOSE
  530. | WDIOF_KEEPALIVEPING;
  531. snprintf(watchdog.ident.identity,
  532. sizeof(watchdog.ident.identity), "%s watchdog",
  533. f71808e_names[watchdog.type]);
  534. err = superio_enter(sioaddr);
  535. if (err)
  536. return err;
  537. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  538. wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF);
  539. watchdog.caused_reboot = wdt_conf & F71808FG_FLAG_WDTMOUT_STS;
  540. superio_exit(sioaddr);
  541. err = watchdog_set_timeout(timeout);
  542. if (err)
  543. return err;
  544. err = watchdog_set_pulse_width(pulse_width);
  545. if (err)
  546. return err;
  547. err = register_reboot_notifier(&watchdog_notifier);
  548. if (err)
  549. return err;
  550. err = misc_register(&watchdog_miscdev);
  551. if (err) {
  552. pr_err("cannot register miscdev on minor=%d\n",
  553. watchdog_miscdev.minor);
  554. goto exit_reboot;
  555. }
  556. if (start_withtimeout) {
  557. if (start_withtimeout <= 0
  558. || start_withtimeout > max_timeout) {
  559. pr_err("starting timeout out of range\n");
  560. err = -EINVAL;
  561. goto exit_miscdev;
  562. }
  563. err = watchdog_start();
  564. if (err) {
  565. pr_err("cannot start watchdog timer\n");
  566. goto exit_miscdev;
  567. }
  568. mutex_lock(&watchdog.lock);
  569. err = superio_enter(sioaddr);
  570. if (err)
  571. goto exit_unlock;
  572. superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
  573. if (start_withtimeout > 0xff) {
  574. /* select minutes for timer units */
  575. superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF,
  576. F71808FG_FLAG_WD_UNIT);
  577. superio_outb(sioaddr, F71808FG_REG_WD_TIME,
  578. DIV_ROUND_UP(start_withtimeout, 60));
  579. } else {
  580. /* select seconds for timer units */
  581. superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF,
  582. F71808FG_FLAG_WD_UNIT);
  583. superio_outb(sioaddr, F71808FG_REG_WD_TIME,
  584. start_withtimeout);
  585. }
  586. superio_exit(sioaddr);
  587. mutex_unlock(&watchdog.lock);
  588. if (nowayout)
  589. __module_get(THIS_MODULE);
  590. pr_info("watchdog started with initial timeout of %u sec\n",
  591. start_withtimeout);
  592. }
  593. return 0;
  594. exit_unlock:
  595. mutex_unlock(&watchdog.lock);
  596. exit_miscdev:
  597. misc_deregister(&watchdog_miscdev);
  598. exit_reboot:
  599. unregister_reboot_notifier(&watchdog_notifier);
  600. return err;
  601. }
  602. static int __init f71808e_find(int sioaddr)
  603. {
  604. u16 devid;
  605. int err = superio_enter(sioaddr);
  606. if (err)
  607. return err;
  608. devid = superio_inw(sioaddr, SIO_REG_MANID);
  609. if (devid != SIO_FINTEK_ID) {
  610. pr_debug("Not a Fintek device\n");
  611. err = -ENODEV;
  612. goto exit;
  613. }
  614. devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
  615. switch (devid) {
  616. case SIO_F71808_ID:
  617. watchdog.type = f71808fg;
  618. break;
  619. case SIO_F71862_ID:
  620. watchdog.type = f71862fg;
  621. err = f71862fg_pin_configure(0); /* validate module parameter */
  622. break;
  623. case SIO_F71869_ID:
  624. watchdog.type = f71869;
  625. break;
  626. case SIO_F71882_ID:
  627. watchdog.type = f71882fg;
  628. break;
  629. case SIO_F71889_ID:
  630. watchdog.type = f71889fg;
  631. break;
  632. case SIO_F71858_ID:
  633. /* Confirmed (by datasheet) not to have a watchdog. */
  634. err = -ENODEV;
  635. goto exit;
  636. default:
  637. pr_info("Unrecognized Fintek device: %04x\n",
  638. (unsigned int)devid);
  639. err = -ENODEV;
  640. goto exit;
  641. }
  642. pr_info("Found %s watchdog chip, revision %d\n",
  643. f71808e_names[watchdog.type],
  644. (int)superio_inb(sioaddr, SIO_REG_DEVREV));
  645. exit:
  646. superio_exit(sioaddr);
  647. return err;
  648. }
  649. static int __init f71808e_init(void)
  650. {
  651. static const unsigned short addrs[] = { 0x2e, 0x4e };
  652. int err = -ENODEV;
  653. int i;
  654. for (i = 0; i < ARRAY_SIZE(addrs); i++) {
  655. err = f71808e_find(addrs[i]);
  656. if (err == 0)
  657. break;
  658. }
  659. if (i == ARRAY_SIZE(addrs))
  660. return err;
  661. return watchdog_init(addrs[i]);
  662. }
  663. static void __exit f71808e_exit(void)
  664. {
  665. if (watchdog_is_running()) {
  666. pr_warn("Watchdog timer still running, stopping it\n");
  667. watchdog_stop();
  668. }
  669. misc_deregister(&watchdog_miscdev);
  670. unregister_reboot_notifier(&watchdog_notifier);
  671. }
  672. MODULE_DESCRIPTION("F71808E Watchdog Driver");
  673. MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
  674. MODULE_LICENSE("GPL");
  675. module_init(f71808e_init);
  676. module_exit(f71808e_exit);