ath79_wdt.c 6.9 KB

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  1. /*
  2. * Atheros AR71XX/AR724X/AR913X built-in hardware watchdog timer.
  3. *
  4. * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
  5. * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  6. *
  7. * This driver was based on: drivers/watchdog/ixp4xx_wdt.c
  8. * Author: Deepak Saxena <dsaxena@plexity.net>
  9. * Copyright 2004 (c) MontaVista, Software, Inc.
  10. *
  11. * which again was based on sa1100 driver,
  12. * Copyright (C) 2000 Oleg Drokin <green@crimea.edu>
  13. *
  14. * This program is free software; you can redistribute it and/or modify it
  15. * under the terms of the GNU General Public License version 2 as published
  16. * by the Free Software Foundation.
  17. *
  18. */
  19. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  20. #include <linux/bitops.h>
  21. #include <linux/errno.h>
  22. #include <linux/fs.h>
  23. #include <linux/init.h>
  24. #include <linux/kernel.h>
  25. #include <linux/miscdevice.h>
  26. #include <linux/module.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/types.h>
  30. #include <linux/watchdog.h>
  31. #include <linux/clk.h>
  32. #include <linux/err.h>
  33. #include <asm/mach-ath79/ath79.h>
  34. #include <asm/mach-ath79/ar71xx_regs.h>
  35. #define DRIVER_NAME "ath79-wdt"
  36. #define WDT_TIMEOUT 15 /* seconds */
  37. #define WDOG_CTRL_LAST_RESET BIT(31)
  38. #define WDOG_CTRL_ACTION_MASK 3
  39. #define WDOG_CTRL_ACTION_NONE 0 /* no action */
  40. #define WDOG_CTRL_ACTION_GPI 1 /* general purpose interrupt */
  41. #define WDOG_CTRL_ACTION_NMI 2 /* NMI */
  42. #define WDOG_CTRL_ACTION_FCR 3 /* full chip reset */
  43. static bool nowayout = WATCHDOG_NOWAYOUT;
  44. module_param(nowayout, bool, 0);
  45. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
  46. "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  47. static int timeout = WDT_TIMEOUT;
  48. module_param(timeout, int, 0);
  49. MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds "
  50. "(default=" __MODULE_STRING(WDT_TIMEOUT) "s)");
  51. static unsigned long wdt_flags;
  52. #define WDT_FLAGS_BUSY 0
  53. #define WDT_FLAGS_EXPECT_CLOSE 1
  54. static struct clk *wdt_clk;
  55. static unsigned long wdt_freq;
  56. static int boot_status;
  57. static int max_timeout;
  58. static inline void ath79_wdt_keepalive(void)
  59. {
  60. ath79_reset_wr(AR71XX_RESET_REG_WDOG, wdt_freq * timeout);
  61. /* flush write */
  62. ath79_reset_rr(AR71XX_RESET_REG_WDOG);
  63. }
  64. static inline void ath79_wdt_enable(void)
  65. {
  66. ath79_wdt_keepalive();
  67. ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_FCR);
  68. /* flush write */
  69. ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL);
  70. }
  71. static inline void ath79_wdt_disable(void)
  72. {
  73. ath79_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_NONE);
  74. /* flush write */
  75. ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL);
  76. }
  77. static int ath79_wdt_set_timeout(int val)
  78. {
  79. if (val < 1 || val > max_timeout)
  80. return -EINVAL;
  81. timeout = val;
  82. ath79_wdt_keepalive();
  83. return 0;
  84. }
  85. static int ath79_wdt_open(struct inode *inode, struct file *file)
  86. {
  87. if (test_and_set_bit(WDT_FLAGS_BUSY, &wdt_flags))
  88. return -EBUSY;
  89. clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
  90. ath79_wdt_enable();
  91. return nonseekable_open(inode, file);
  92. }
  93. static int ath79_wdt_release(struct inode *inode, struct file *file)
  94. {
  95. if (test_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags))
  96. ath79_wdt_disable();
  97. else {
  98. pr_crit("device closed unexpectedly, watchdog timer will not stop!\n");
  99. ath79_wdt_keepalive();
  100. }
  101. clear_bit(WDT_FLAGS_BUSY, &wdt_flags);
  102. clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
  103. return 0;
  104. }
  105. static ssize_t ath79_wdt_write(struct file *file, const char *data,
  106. size_t len, loff_t *ppos)
  107. {
  108. if (len) {
  109. if (!nowayout) {
  110. size_t i;
  111. clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
  112. for (i = 0; i != len; i++) {
  113. char c;
  114. if (get_user(c, data + i))
  115. return -EFAULT;
  116. if (c == 'V')
  117. set_bit(WDT_FLAGS_EXPECT_CLOSE,
  118. &wdt_flags);
  119. }
  120. }
  121. ath79_wdt_keepalive();
  122. }
  123. return len;
  124. }
  125. static const struct watchdog_info ath79_wdt_info = {
  126. .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
  127. WDIOF_MAGICCLOSE | WDIOF_CARDRESET,
  128. .firmware_version = 0,
  129. .identity = "ATH79 watchdog",
  130. };
  131. static long ath79_wdt_ioctl(struct file *file, unsigned int cmd,
  132. unsigned long arg)
  133. {
  134. void __user *argp = (void __user *)arg;
  135. int __user *p = argp;
  136. int err;
  137. int t;
  138. switch (cmd) {
  139. case WDIOC_GETSUPPORT:
  140. err = copy_to_user(argp, &ath79_wdt_info,
  141. sizeof(ath79_wdt_info)) ? -EFAULT : 0;
  142. break;
  143. case WDIOC_GETSTATUS:
  144. err = put_user(0, p);
  145. break;
  146. case WDIOC_GETBOOTSTATUS:
  147. err = put_user(boot_status, p);
  148. break;
  149. case WDIOC_KEEPALIVE:
  150. ath79_wdt_keepalive();
  151. err = 0;
  152. break;
  153. case WDIOC_SETTIMEOUT:
  154. err = get_user(t, p);
  155. if (err)
  156. break;
  157. err = ath79_wdt_set_timeout(t);
  158. if (err)
  159. break;
  160. /* fallthrough */
  161. case WDIOC_GETTIMEOUT:
  162. err = put_user(timeout, p);
  163. break;
  164. default:
  165. err = -ENOTTY;
  166. break;
  167. }
  168. return err;
  169. }
  170. static const struct file_operations ath79_wdt_fops = {
  171. .owner = THIS_MODULE,
  172. .llseek = no_llseek,
  173. .write = ath79_wdt_write,
  174. .unlocked_ioctl = ath79_wdt_ioctl,
  175. .open = ath79_wdt_open,
  176. .release = ath79_wdt_release,
  177. };
  178. static struct miscdevice ath79_wdt_miscdev = {
  179. .minor = WATCHDOG_MINOR,
  180. .name = "watchdog",
  181. .fops = &ath79_wdt_fops,
  182. };
  183. static int __devinit ath79_wdt_probe(struct platform_device *pdev)
  184. {
  185. u32 ctrl;
  186. int err;
  187. wdt_clk = clk_get(&pdev->dev, "wdt");
  188. if (IS_ERR(wdt_clk))
  189. return PTR_ERR(wdt_clk);
  190. err = clk_enable(wdt_clk);
  191. if (err)
  192. goto err_clk_put;
  193. wdt_freq = clk_get_rate(wdt_clk);
  194. if (!wdt_freq) {
  195. err = -EINVAL;
  196. goto err_clk_disable;
  197. }
  198. max_timeout = (0xfffffffful / wdt_freq);
  199. if (timeout < 1 || timeout > max_timeout) {
  200. timeout = max_timeout;
  201. dev_info(&pdev->dev,
  202. "timeout value must be 0 < timeout < %d, using %d\n",
  203. max_timeout, timeout);
  204. }
  205. ctrl = ath79_reset_rr(AR71XX_RESET_REG_WDOG_CTRL);
  206. boot_status = (ctrl & WDOG_CTRL_LAST_RESET) ? WDIOF_CARDRESET : 0;
  207. err = misc_register(&ath79_wdt_miscdev);
  208. if (err) {
  209. dev_err(&pdev->dev,
  210. "unable to register misc device, err=%d\n", err);
  211. goto err_clk_disable;
  212. }
  213. return 0;
  214. err_clk_disable:
  215. clk_disable(wdt_clk);
  216. err_clk_put:
  217. clk_put(wdt_clk);
  218. return err;
  219. }
  220. static int __devexit ath79_wdt_remove(struct platform_device *pdev)
  221. {
  222. misc_deregister(&ath79_wdt_miscdev);
  223. clk_disable(wdt_clk);
  224. clk_put(wdt_clk);
  225. return 0;
  226. }
  227. static void ath97_wdt_shutdown(struct platform_device *pdev)
  228. {
  229. ath79_wdt_disable();
  230. }
  231. static struct platform_driver ath79_wdt_driver = {
  232. .remove = __devexit_p(ath79_wdt_remove),
  233. .shutdown = ath97_wdt_shutdown,
  234. .driver = {
  235. .name = DRIVER_NAME,
  236. .owner = THIS_MODULE,
  237. },
  238. };
  239. static int __init ath79_wdt_init(void)
  240. {
  241. return platform_driver_probe(&ath79_wdt_driver, ath79_wdt_probe);
  242. }
  243. module_init(ath79_wdt_init);
  244. static void __exit ath79_wdt_exit(void)
  245. {
  246. platform_driver_unregister(&ath79_wdt_driver);
  247. }
  248. module_exit(ath79_wdt_exit);
  249. MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X hardware watchdog driver");
  250. MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org");
  251. MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org");
  252. MODULE_LICENSE("GPL v2");
  253. MODULE_ALIAS("platform:" DRIVER_NAME);
  254. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);