pci.c 6.3 KB

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  1. /*
  2. * Intel I/OAT DMA Linux driver
  3. * Copyright(c) 2007 - 2009 Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  17. *
  18. * The full GNU General Public License is included in this distribution in
  19. * the file called "COPYING".
  20. *
  21. */
  22. /*
  23. * This driver supports an Intel I/OAT DMA engine, which does asynchronous
  24. * copy operations.
  25. */
  26. #include <linux/init.h>
  27. #include <linux/module.h>
  28. #include <linux/pci.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/dca.h>
  31. #include <linux/slab.h>
  32. #include "dma.h"
  33. #include "dma_v2.h"
  34. #include "registers.h"
  35. #include "hw.h"
  36. MODULE_VERSION(IOAT_DMA_VERSION);
  37. MODULE_LICENSE("Dual BSD/GPL");
  38. MODULE_AUTHOR("Intel Corporation");
  39. static struct pci_device_id ioat_pci_tbl[] = {
  40. /* I/OAT v1 platforms */
  41. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT) },
  42. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_CNB) },
  43. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SCNB) },
  44. { PCI_VDEVICE(UNISYS, PCI_DEVICE_ID_UNISYS_DMA_DIRECTOR) },
  45. /* I/OAT v2 platforms */
  46. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB) },
  47. /* I/OAT v3 platforms */
  48. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG0) },
  49. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG1) },
  50. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG2) },
  51. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG3) },
  52. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG4) },
  53. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG5) },
  54. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG6) },
  55. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_TBG7) },
  56. /* I/OAT v3.2 platforms */
  57. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF0) },
  58. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF1) },
  59. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF2) },
  60. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF3) },
  61. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF4) },
  62. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF5) },
  63. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF6) },
  64. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF7) },
  65. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF8) },
  66. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_JSF9) },
  67. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB0) },
  68. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB1) },
  69. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB2) },
  70. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB3) },
  71. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB4) },
  72. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB5) },
  73. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB6) },
  74. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB7) },
  75. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB8) },
  76. { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB9) },
  77. { 0, }
  78. };
  79. MODULE_DEVICE_TABLE(pci, ioat_pci_tbl);
  80. static int __devinit ioat_pci_probe(struct pci_dev *pdev,
  81. const struct pci_device_id *id);
  82. static void __devexit ioat_remove(struct pci_dev *pdev);
  83. static int ioat_dca_enabled = 1;
  84. module_param(ioat_dca_enabled, int, 0644);
  85. MODULE_PARM_DESC(ioat_dca_enabled, "control support of dca service (default: 1)");
  86. struct kmem_cache *ioat2_cache;
  87. #define DRV_NAME "ioatdma"
  88. static struct pci_driver ioat_pci_driver = {
  89. .name = DRV_NAME,
  90. .id_table = ioat_pci_tbl,
  91. .probe = ioat_pci_probe,
  92. .remove = __devexit_p(ioat_remove),
  93. };
  94. static struct ioatdma_device *
  95. alloc_ioatdma(struct pci_dev *pdev, void __iomem *iobase)
  96. {
  97. struct device *dev = &pdev->dev;
  98. struct ioatdma_device *d = devm_kzalloc(dev, sizeof(*d), GFP_KERNEL);
  99. if (!d)
  100. return NULL;
  101. d->pdev = pdev;
  102. d->reg_base = iobase;
  103. return d;
  104. }
  105. static int __devinit ioat_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  106. {
  107. void __iomem * const *iomap;
  108. struct device *dev = &pdev->dev;
  109. struct ioatdma_device *device;
  110. int err;
  111. err = pcim_enable_device(pdev);
  112. if (err)
  113. return err;
  114. err = pcim_iomap_regions(pdev, 1 << IOAT_MMIO_BAR, DRV_NAME);
  115. if (err)
  116. return err;
  117. iomap = pcim_iomap_table(pdev);
  118. if (!iomap)
  119. return -ENOMEM;
  120. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  121. if (err)
  122. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  123. if (err)
  124. return err;
  125. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
  126. if (err)
  127. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  128. if (err)
  129. return err;
  130. device = alloc_ioatdma(pdev, iomap[IOAT_MMIO_BAR]);
  131. if (!device)
  132. return -ENOMEM;
  133. pci_set_master(pdev);
  134. pci_set_drvdata(pdev, device);
  135. device->version = readb(device->reg_base + IOAT_VER_OFFSET);
  136. if (device->version == IOAT_VER_1_2)
  137. err = ioat1_dma_probe(device, ioat_dca_enabled);
  138. else if (device->version == IOAT_VER_2_0)
  139. err = ioat2_dma_probe(device, ioat_dca_enabled);
  140. else if (device->version >= IOAT_VER_3_0)
  141. err = ioat3_dma_probe(device, ioat_dca_enabled);
  142. else
  143. return -ENODEV;
  144. if (err) {
  145. dev_err(dev, "Intel(R) I/OAT DMA Engine init failed\n");
  146. return -ENODEV;
  147. }
  148. return 0;
  149. }
  150. static void __devexit ioat_remove(struct pci_dev *pdev)
  151. {
  152. struct ioatdma_device *device = pci_get_drvdata(pdev);
  153. if (!device)
  154. return;
  155. dev_err(&pdev->dev, "Removing dma and dca services\n");
  156. if (device->dca) {
  157. unregister_dca_provider(device->dca, &pdev->dev);
  158. free_dca_provider(device->dca);
  159. device->dca = NULL;
  160. }
  161. ioat_dma_remove(device);
  162. }
  163. static int __init ioat_init_module(void)
  164. {
  165. int err;
  166. pr_info("%s: Intel(R) QuickData Technology Driver %s\n",
  167. DRV_NAME, IOAT_DMA_VERSION);
  168. ioat2_cache = kmem_cache_create("ioat2", sizeof(struct ioat_ring_ent),
  169. 0, SLAB_HWCACHE_ALIGN, NULL);
  170. if (!ioat2_cache)
  171. return -ENOMEM;
  172. err = pci_register_driver(&ioat_pci_driver);
  173. if (err)
  174. kmem_cache_destroy(ioat2_cache);
  175. return err;
  176. }
  177. module_init(ioat_init_module);
  178. static void __exit ioat_exit_module(void)
  179. {
  180. pci_unregister_driver(&ioat_pci_driver);
  181. kmem_cache_destroy(ioat2_cache);
  182. }
  183. module_exit(ioat_exit_module);