qcrypto.c 129 KB

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  1. /* Qualcomm Crypto driver
  2. *
  3. * Copyright (c) 2010-2017, The Linux Foundation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 and
  7. * only version 2 as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/clk.h>
  16. #include <linux/types.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/dma-mapping.h>
  19. #include <linux/dmapool.h>
  20. #include <linux/crypto.h>
  21. #include <linux/kernel.h>
  22. #include <linux/rtnetlink.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/spinlock.h>
  25. #include <linux/debugfs.h>
  26. #include <linux/workqueue.h>
  27. #include <linux/sched.h>
  28. #include <linux/init.h>
  29. #include <linux/cache.h>
  30. #include <crypto/ctr.h>
  31. #include <crypto/des.h>
  32. #include <crypto/aes.h>
  33. #include <crypto/sha.h>
  34. #include <crypto/hash.h>
  35. #include <crypto/algapi.h>
  36. #include <crypto/aead.h>
  37. #include <crypto/authenc.h>
  38. #include <crypto/scatterwalk.h>
  39. #include <crypto/internal/hash.h>
  40. #include <crypto/internal/aead.h>
  41. #include <mach/scm.h>
  42. #include <linux/platform_data/qcom_crypto_device.h>
  43. #include <mach/msm_bus.h>
  44. #include <mach/qcrypto.h>
  45. #include <linux/fips_status.h>
  46. #include "qcryptoi.h"
  47. #include "qce.h"
  48. #define DEBUG_MAX_FNAME 16
  49. #define DEBUG_MAX_RW_BUF 2048
  50. /*
  51. * For crypto 5.0 which has burst size alignment requirement.
  52. */
  53. #define MAX_ALIGN_SIZE 0x40
  54. #define QCRYPTO_HIGH_BANDWIDTH_TIMEOUT 1000
  55. /* are FIPS self tests done ?? */
  56. static bool is_fips_qcrypto_tests_done;
  57. enum qcrypto_bus_state {
  58. BUS_NO_BANDWIDTH = 0,
  59. BUS_HAS_BANDWIDTH,
  60. BUS_BANDWIDTH_RELEASING,
  61. BUS_BANDWIDTH_ALLOCATING,
  62. BUS_SUSPENDED,
  63. BUS_SUSPENDING,
  64. };
  65. struct crypto_stat {
  66. u64 aead_sha1_aes_enc;
  67. u64 aead_sha1_aes_dec;
  68. u64 aead_sha1_des_enc;
  69. u64 aead_sha1_des_dec;
  70. u64 aead_sha1_3des_enc;
  71. u64 aead_sha1_3des_dec;
  72. u64 aead_ccm_aes_enc;
  73. u64 aead_ccm_aes_dec;
  74. u64 aead_rfc4309_ccm_aes_enc;
  75. u64 aead_rfc4309_ccm_aes_dec;
  76. u64 aead_op_success;
  77. u64 aead_op_fail;
  78. u64 aead_bad_msg;
  79. u64 ablk_cipher_aes_enc;
  80. u64 ablk_cipher_aes_dec;
  81. u64 ablk_cipher_des_enc;
  82. u64 ablk_cipher_des_dec;
  83. u64 ablk_cipher_3des_enc;
  84. u64 ablk_cipher_3des_dec;
  85. u64 ablk_cipher_op_success;
  86. u64 ablk_cipher_op_fail;
  87. u64 sha1_digest;
  88. u64 sha256_digest;
  89. u64 sha_op_success;
  90. u64 sha_op_fail;
  91. u64 sha1_hmac_digest;
  92. u64 sha256_hmac_digest;
  93. u64 sha_hmac_op_success;
  94. u64 sha_hmac_op_fail;
  95. };
  96. static struct crypto_stat _qcrypto_stat;
  97. static struct dentry *_debug_dent;
  98. static char _debug_read_buf[DEBUG_MAX_RW_BUF];
  99. static bool _qcrypto_init_assign;
  100. struct crypto_priv;
  101. struct crypto_engine {
  102. struct list_head elist;
  103. void *qce; /* qce handle */
  104. struct platform_device *pdev; /* platform device */
  105. struct crypto_async_request *req; /* current active request */
  106. struct qcrypto_resp_ctx *arsp; /* rsp associcated with req */
  107. int res; /* execution result */
  108. struct crypto_priv *pcp;
  109. struct tasklet_struct done_tasklet;
  110. uint32_t bus_scale_handle;
  111. struct crypto_queue req_queue; /*
  112. * request queue for those requests
  113. * that have this engine assigned
  114. * waiting to be executed
  115. */
  116. u64 total_req;
  117. u64 err_req;
  118. u32 unit;
  119. u32 ce_device;
  120. unsigned int signature;
  121. enum qcrypto_bus_state bw_state;
  122. bool high_bw_req;
  123. struct timer_list bw_reaper_timer;
  124. struct work_struct bw_reaper_ws;
  125. struct work_struct bw_allocate_ws;
  126. /* engine execution sequence number */
  127. u32 active_seq;
  128. /* last QCRYPTO_HIGH_BANDWIDTH_TIMEOUT active_seq */
  129. u32 last_active_seq;
  130. bool check_flag;
  131. };
  132. struct crypto_priv {
  133. /* CE features supported by target device*/
  134. struct msm_ce_hw_support platform_support;
  135. /* CE features/algorithms supported by HW engine*/
  136. struct ce_hw_support ce_support;
  137. /* the lock protects crypto queue and req */
  138. spinlock_t lock;
  139. /* list of registered algorithms */
  140. struct list_head alg_list;
  141. /* current active request */
  142. struct crypto_async_request *req;
  143. uint32_t ce_lock_count;
  144. struct work_struct unlock_ce_ws;
  145. struct list_head engine_list; /* list of qcrypto engines */
  146. int32_t total_units; /* total units of engines */
  147. struct mutex engine_lock;
  148. struct crypto_engine *next_engine; /* next assign engine */
  149. struct crypto_queue req_queue; /*
  150. * request queue for those requests
  151. * that waiting for an available
  152. * engine.
  153. */
  154. };
  155. static struct crypto_priv qcrypto_dev;
  156. static struct crypto_engine *_qcrypto_static_assign_engine(
  157. struct crypto_priv *cp);
  158. /*-------------------------------------------------------------------------
  159. * Resource Locking Service
  160. * ------------------------------------------------------------------------*/
  161. #define QCRYPTO_CMD_ID 1
  162. #define QCRYPTO_CE_LOCK_CMD 1
  163. #define QCRYPTO_CE_UNLOCK_CMD 0
  164. #define NUM_RETRY 1000
  165. #define CE_BUSY 55
  166. static int qcrypto_scm_cmd(int resource, int cmd, int *response)
  167. {
  168. #ifdef CONFIG_MSM_SCM
  169. struct {
  170. int resource;
  171. int cmd;
  172. } cmd_buf;
  173. cmd_buf.resource = resource;
  174. cmd_buf.cmd = cmd;
  175. return scm_call(SCM_SVC_TZ, QCRYPTO_CMD_ID, &cmd_buf,
  176. sizeof(cmd_buf), response, sizeof(*response));
  177. #else
  178. return 0;
  179. #endif
  180. }
  181. static struct crypto_engine *_qrypto_find_pengine_device(struct crypto_priv *cp,
  182. unsigned int device)
  183. {
  184. struct crypto_engine *entry = NULL;
  185. unsigned long flags;
  186. spin_lock_irqsave(&cp->lock, flags);
  187. list_for_each_entry(entry, &cp->engine_list, elist) {
  188. if (entry->ce_device == device)
  189. break;
  190. }
  191. spin_unlock_irqrestore(&cp->lock, flags);
  192. if (((entry != NULL) && (entry->ce_device != device)) ||
  193. (entry == NULL)) {
  194. pr_err("Device node for CE device %d NOT FOUND!!\n",
  195. device);
  196. return NULL;
  197. }
  198. return entry;
  199. }
  200. static void qcrypto_unlock_ce(struct work_struct *work)
  201. {
  202. int response = 0;
  203. unsigned long flags;
  204. struct crypto_priv *cp = container_of(work, struct crypto_priv,
  205. unlock_ce_ws);
  206. if (cp->ce_lock_count == 1)
  207. BUG_ON(qcrypto_scm_cmd(cp->platform_support.shared_ce_resource,
  208. QCRYPTO_CE_UNLOCK_CMD, &response) != 0);
  209. spin_lock_irqsave(&cp->lock, flags);
  210. cp->ce_lock_count--;
  211. spin_unlock_irqrestore(&cp->lock, flags);
  212. }
  213. static int qcrypto_lock_ce(struct crypto_priv *cp)
  214. {
  215. unsigned long flags;
  216. int response = -CE_BUSY;
  217. int i = 0;
  218. if (cp->ce_lock_count == 0) {
  219. do {
  220. if (qcrypto_scm_cmd(
  221. cp->platform_support.shared_ce_resource,
  222. QCRYPTO_CE_LOCK_CMD, &response)) {
  223. response = -EINVAL;
  224. break;
  225. }
  226. } while ((response == -CE_BUSY) && (i++ < NUM_RETRY));
  227. if ((response == -CE_BUSY) && (i >= NUM_RETRY))
  228. return -EUSERS;
  229. if (response < 0)
  230. return -EINVAL;
  231. }
  232. spin_lock_irqsave(&cp->lock, flags);
  233. cp->ce_lock_count++;
  234. spin_unlock_irqrestore(&cp->lock, flags);
  235. return 0;
  236. }
  237. enum qcrypto_alg_type {
  238. QCRYPTO_ALG_CIPHER = 0,
  239. QCRYPTO_ALG_SHA = 1,
  240. QCRYPTO_ALG_LAST
  241. };
  242. struct qcrypto_alg {
  243. struct list_head entry;
  244. struct crypto_alg cipher_alg;
  245. struct ahash_alg sha_alg;
  246. enum qcrypto_alg_type alg_type;
  247. struct crypto_priv *cp;
  248. };
  249. #define QCRYPTO_MAX_KEY_SIZE 64
  250. /* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
  251. #define QCRYPTO_MAX_IV_LENGTH 16
  252. #define QCRYPTO_CCM4309_NONCE_LEN 3
  253. struct qcrypto_cipher_ctx {
  254. struct list_head rsp_queue; /* response queue */
  255. struct crypto_engine *pengine; /* fixed engine assigned to this tfm */
  256. struct crypto_priv *cp;
  257. unsigned int flags;
  258. u8 auth_key[QCRYPTO_MAX_KEY_SIZE];
  259. u8 iv[QCRYPTO_MAX_IV_LENGTH];
  260. u8 enc_key[QCRYPTO_MAX_KEY_SIZE];
  261. unsigned int enc_key_len;
  262. unsigned int authsize;
  263. unsigned int auth_key_len;
  264. u8 ccm4309_nonce[QCRYPTO_CCM4309_NONCE_LEN];
  265. };
  266. struct qcrypto_resp_ctx {
  267. struct list_head list;
  268. struct crypto_async_request *async_req; /* async req */
  269. int res; /* execution result */
  270. };
  271. struct qcrypto_cipher_req_ctx {
  272. struct qcrypto_resp_ctx rsp_entry;/* rsp entry. */
  273. struct crypto_engine *pengine; /* engine assigned to this request */
  274. u8 *iv;
  275. u8 rfc4309_iv[QCRYPTO_MAX_IV_LENGTH];
  276. unsigned int ivsize;
  277. int aead;
  278. struct scatterlist asg; /* Formatted associated data sg */
  279. unsigned char *assoc; /* Pointer to formatted assoc data */
  280. unsigned int assoclen; /* Save Unformatted assoc data length */
  281. struct scatterlist *assoc_sg; /* Save Unformatted assoc data sg */
  282. enum qce_cipher_alg_enum alg;
  283. enum qce_cipher_dir_enum dir;
  284. enum qce_cipher_mode_enum mode;
  285. struct scatterlist *orig_src; /* Original src sg ptr */
  286. struct scatterlist *orig_dst; /* Original dst sg ptr */
  287. struct scatterlist dsg; /* Dest Data sg */
  288. struct scatterlist ssg; /* Source Data sg */
  289. unsigned char *data; /* Incoming data pointer*/
  290. };
  291. #define SHA_MAX_BLOCK_SIZE SHA256_BLOCK_SIZE
  292. #define SHA_MAX_STATE_SIZE (SHA256_DIGEST_SIZE / sizeof(u32))
  293. #define SHA_MAX_DIGEST_SIZE SHA256_DIGEST_SIZE
  294. #define MSM_QCRYPTO_REQ_QUEUE_LENGTH 50
  295. static uint8_t _std_init_vector_sha1_uint8[] = {
  296. 0x67, 0x45, 0x23, 0x01, 0xEF, 0xCD, 0xAB, 0x89,
  297. 0x98, 0xBA, 0xDC, 0xFE, 0x10, 0x32, 0x54, 0x76,
  298. 0xC3, 0xD2, 0xE1, 0xF0
  299. };
  300. /* standard initialization vector for SHA-256, source: FIPS 180-2 */
  301. static uint8_t _std_init_vector_sha256_uint8[] = {
  302. 0x6A, 0x09, 0xE6, 0x67, 0xBB, 0x67, 0xAE, 0x85,
  303. 0x3C, 0x6E, 0xF3, 0x72, 0xA5, 0x4F, 0xF5, 0x3A,
  304. 0x51, 0x0E, 0x52, 0x7F, 0x9B, 0x05, 0x68, 0x8C,
  305. 0x1F, 0x83, 0xD9, 0xAB, 0x5B, 0xE0, 0xCD, 0x19
  306. };
  307. struct qcrypto_sha_ctx {
  308. struct list_head rsp_queue; /* response queue */
  309. struct crypto_engine *pengine; /* fixed engine assigned to this tfm */
  310. struct crypto_priv *cp;
  311. unsigned int flags;
  312. enum qce_hash_alg_enum alg;
  313. uint32_t diglen;
  314. uint32_t authkey_in_len;
  315. uint8_t authkey[SHA_MAX_BLOCK_SIZE];
  316. struct ahash_request *ahash_req;
  317. struct completion ahash_req_complete;
  318. };
  319. struct qcrypto_sha_req_ctx {
  320. struct qcrypto_resp_ctx rsp_entry;/* rsp entry. */
  321. struct crypto_engine *pengine; /* engine assigned to this request */
  322. struct scatterlist *src;
  323. uint32_t nbytes;
  324. struct scatterlist *orig_src; /* Original src sg ptr */
  325. struct scatterlist dsg; /* Data sg */
  326. unsigned char *data; /* Incoming data pointer*/
  327. unsigned char *data2; /* Updated data pointer*/
  328. uint32_t byte_count[4];
  329. u64 count;
  330. uint8_t first_blk;
  331. uint8_t last_blk;
  332. uint8_t trailing_buf[SHA_MAX_BLOCK_SIZE];
  333. uint32_t trailing_buf_len;
  334. /* dma buffer, Internal use */
  335. uint8_t staging_dmabuf
  336. [SHA_MAX_BLOCK_SIZE+SHA_MAX_DIGEST_SIZE+MAX_ALIGN_SIZE];
  337. uint8_t digest[SHA_MAX_DIGEST_SIZE];
  338. struct scatterlist sg[2];
  339. };
  340. static void _byte_stream_to_words(uint32_t *iv, unsigned char *b,
  341. unsigned int len)
  342. {
  343. unsigned n;
  344. n = len / sizeof(uint32_t);
  345. for (; n > 0; n--) {
  346. *iv = ((*b << 24) & 0xff000000) |
  347. (((*(b+1)) << 16) & 0xff0000) |
  348. (((*(b+2)) << 8) & 0xff00) |
  349. (*(b+3) & 0xff);
  350. b += sizeof(uint32_t);
  351. iv++;
  352. }
  353. n = len % sizeof(uint32_t);
  354. if (n == 3) {
  355. *iv = ((*b << 24) & 0xff000000) |
  356. (((*(b+1)) << 16) & 0xff0000) |
  357. (((*(b+2)) << 8) & 0xff00);
  358. } else if (n == 2) {
  359. *iv = ((*b << 24) & 0xff000000) |
  360. (((*(b+1)) << 16) & 0xff0000);
  361. } else if (n == 1) {
  362. *iv = ((*b << 24) & 0xff000000);
  363. }
  364. }
  365. static void _words_to_byte_stream(uint32_t *iv, unsigned char *b,
  366. unsigned int len)
  367. {
  368. unsigned n = len / sizeof(uint32_t);
  369. for (; n > 0; n--) {
  370. *b++ = (unsigned char) ((*iv >> 24) & 0xff);
  371. *b++ = (unsigned char) ((*iv >> 16) & 0xff);
  372. *b++ = (unsigned char) ((*iv >> 8) & 0xff);
  373. *b++ = (unsigned char) (*iv & 0xff);
  374. iv++;
  375. }
  376. n = len % sizeof(uint32_t);
  377. if (n == 3) {
  378. *b++ = (unsigned char) ((*iv >> 24) & 0xff);
  379. *b++ = (unsigned char) ((*iv >> 16) & 0xff);
  380. *b = (unsigned char) ((*iv >> 8) & 0xff);
  381. } else if (n == 2) {
  382. *b++ = (unsigned char) ((*iv >> 24) & 0xff);
  383. *b = (unsigned char) ((*iv >> 16) & 0xff);
  384. } else if (n == 1) {
  385. *b = (unsigned char) ((*iv >> 24) & 0xff);
  386. }
  387. }
  388. static void qcrypto_ce_set_bus(struct crypto_engine *pengine,
  389. bool high_bw_req)
  390. {
  391. int ret = 0;
  392. if (high_bw_req) {
  393. pm_stay_awake(&pengine->pdev->dev);
  394. ret = qce_enable_clk(pengine->qce);
  395. if (ret) {
  396. pr_err("%s Unable enable clk\n", __func__);
  397. goto clk_err;
  398. }
  399. ret = msm_bus_scale_client_update_request(
  400. pengine->bus_scale_handle, 1);
  401. if (ret) {
  402. pr_err("%s Unable to set to high bandwidth\n",
  403. __func__);
  404. qce_disable_clk(pengine->qce);
  405. goto clk_err;
  406. }
  407. } else {
  408. ret = msm_bus_scale_client_update_request(
  409. pengine->bus_scale_handle, 0);
  410. if (ret) {
  411. pr_err("%s Unable to set to low bandwidth\n",
  412. __func__);
  413. goto clk_err;
  414. }
  415. ret = qce_disable_clk(pengine->qce);
  416. if (ret) {
  417. pr_err("%s Unable disable clk\n", __func__);
  418. ret = msm_bus_scale_client_update_request(
  419. pengine->bus_scale_handle, 1);
  420. if (ret)
  421. pr_err("%s Unable to set to high bandwidth\n",
  422. __func__);
  423. goto clk_err;
  424. }
  425. pm_relax(&pengine->pdev->dev);
  426. }
  427. return;
  428. clk_err:
  429. pm_relax(&pengine->pdev->dev);
  430. return;
  431. }
  432. static void qcrypto_bw_reaper_timer_callback(unsigned long data)
  433. {
  434. struct crypto_engine *pengine = (struct crypto_engine *)data;
  435. schedule_work(&pengine->bw_reaper_ws);
  436. return;
  437. }
  438. static void qcrypto_bw_set_timeout(struct crypto_engine *pengine)
  439. {
  440. pengine->bw_reaper_timer.data =
  441. (unsigned long)(pengine);
  442. pengine->bw_reaper_timer.expires = jiffies +
  443. msecs_to_jiffies(QCRYPTO_HIGH_BANDWIDTH_TIMEOUT);
  444. mod_timer(&(pengine->bw_reaper_timer),
  445. pengine->bw_reaper_timer.expires);
  446. }
  447. static void qcrypto_ce_bw_allocate_req(struct crypto_engine *pengine)
  448. {
  449. schedule_work(&pengine->bw_allocate_ws);
  450. }
  451. static int _start_qcrypto_process(struct crypto_priv *cp,
  452. struct crypto_engine *pengine);
  453. static void qcrypto_bw_allocate_work(struct work_struct *work)
  454. {
  455. struct crypto_engine *pengine = container_of(work,
  456. struct crypto_engine, bw_allocate_ws);
  457. unsigned long flags;
  458. struct crypto_priv *cp = pengine->pcp;
  459. spin_lock_irqsave(&cp->lock, flags);
  460. pengine->bw_state = BUS_BANDWIDTH_ALLOCATING;
  461. spin_unlock_irqrestore(&cp->lock, flags);
  462. qcrypto_ce_set_bus(pengine, true);
  463. qcrypto_bw_set_timeout(pengine);
  464. spin_lock_irqsave(&cp->lock, flags);
  465. pengine->bw_state = BUS_HAS_BANDWIDTH;
  466. pengine->high_bw_req = false;
  467. pengine->active_seq++;
  468. pengine->check_flag = true;
  469. spin_unlock_irqrestore(&cp->lock, flags);
  470. _start_qcrypto_process(cp, pengine);
  471. };
  472. static void qcrypto_bw_reaper_work(struct work_struct *work)
  473. {
  474. struct crypto_engine *pengine = container_of(work,
  475. struct crypto_engine, bw_reaper_ws);
  476. struct crypto_priv *cp = pengine->pcp;
  477. unsigned long flags;
  478. u32 active_seq;
  479. bool restart = false;
  480. spin_lock_irqsave(&cp->lock, flags);
  481. active_seq = pengine->active_seq;
  482. if (pengine->bw_state == BUS_HAS_BANDWIDTH &&
  483. (active_seq == pengine->last_active_seq)) {
  484. /* check if engine is stuck */
  485. if (pengine->req) {
  486. if (pengine->check_flag)
  487. dev_warn(&pengine->pdev->dev,
  488. "The engine appears to be stuck seq %d req %p.\n",
  489. active_seq, pengine->req);
  490. pengine->check_flag = false;
  491. goto ret;
  492. }
  493. if (cp->platform_support.bus_scale_table == NULL)
  494. goto ret;
  495. pengine->bw_state = BUS_BANDWIDTH_RELEASING;
  496. spin_unlock_irqrestore(&cp->lock, flags);
  497. qcrypto_ce_set_bus(pengine, false);
  498. spin_lock_irqsave(&cp->lock, flags);
  499. if (pengine->high_bw_req == true) {
  500. /* we got request while we are disabling clock */
  501. pengine->bw_state = BUS_BANDWIDTH_ALLOCATING;
  502. spin_unlock_irqrestore(&cp->lock, flags);
  503. qcrypto_ce_set_bus(pengine, true);
  504. spin_lock_irqsave(&cp->lock, flags);
  505. pengine->bw_state = BUS_HAS_BANDWIDTH;
  506. pengine->high_bw_req = false;
  507. restart = true;
  508. } else
  509. pengine->bw_state = BUS_NO_BANDWIDTH;
  510. }
  511. ret:
  512. pengine->last_active_seq = active_seq;
  513. spin_unlock_irqrestore(&cp->lock, flags);
  514. if (restart)
  515. _start_qcrypto_process(cp, pengine);
  516. if (pengine->bw_state != BUS_NO_BANDWIDTH)
  517. qcrypto_bw_set_timeout(pengine);
  518. }
  519. static int qcrypto_count_sg(struct scatterlist *sg, int nbytes)
  520. {
  521. int i;
  522. for (i = 0; nbytes > 0 && sg != NULL; i++, sg = scatterwalk_sg_next(sg))
  523. nbytes -= sg->length;
  524. return i;
  525. }
  526. size_t qcrypto_sg_copy_from_buffer(struct scatterlist *sgl, unsigned int nents,
  527. void *buf, size_t buflen)
  528. {
  529. int i;
  530. size_t offset, len;
  531. for (i = 0, offset = 0; i < nents; ++i) {
  532. len = sg_copy_from_buffer(sgl, 1, buf, buflen);
  533. buf += len;
  534. buflen -= len;
  535. offset += len;
  536. sgl = scatterwalk_sg_next(sgl);
  537. }
  538. return offset;
  539. }
  540. size_t qcrypto_sg_copy_to_buffer(struct scatterlist *sgl, unsigned int nents,
  541. void *buf, size_t buflen)
  542. {
  543. int i;
  544. size_t offset, len;
  545. for (i = 0, offset = 0; i < nents; ++i) {
  546. len = sg_copy_to_buffer(sgl, 1, buf, buflen);
  547. buf += len;
  548. buflen -= len;
  549. offset += len;
  550. sgl = scatterwalk_sg_next(sgl);
  551. }
  552. return offset;
  553. }
  554. static struct qcrypto_alg *_qcrypto_sha_alg_alloc(struct crypto_priv *cp,
  555. struct ahash_alg *template)
  556. {
  557. struct qcrypto_alg *q_alg;
  558. q_alg = kzalloc(sizeof(struct qcrypto_alg), GFP_KERNEL);
  559. if (!q_alg) {
  560. pr_err("qcrypto Memory allocation of q_alg FAIL, error %ld\n",
  561. PTR_ERR(q_alg));
  562. return ERR_PTR(-ENOMEM);
  563. }
  564. q_alg->alg_type = QCRYPTO_ALG_SHA;
  565. q_alg->sha_alg = *template;
  566. q_alg->cp = cp;
  567. return q_alg;
  568. };
  569. static struct qcrypto_alg *_qcrypto_cipher_alg_alloc(struct crypto_priv *cp,
  570. struct crypto_alg *template)
  571. {
  572. struct qcrypto_alg *q_alg;
  573. q_alg = kzalloc(sizeof(struct qcrypto_alg), GFP_KERNEL);
  574. if (!q_alg) {
  575. pr_err("qcrypto Memory allocation of q_alg FAIL, error %ld\n",
  576. PTR_ERR(q_alg));
  577. return ERR_PTR(-ENOMEM);
  578. }
  579. q_alg->alg_type = QCRYPTO_ALG_CIPHER;
  580. q_alg->cipher_alg = *template;
  581. q_alg->cp = cp;
  582. return q_alg;
  583. };
  584. static int _qcrypto_cipher_cra_init(struct crypto_tfm *tfm)
  585. {
  586. struct crypto_alg *alg = tfm->__crt_alg;
  587. struct qcrypto_alg *q_alg;
  588. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  589. /* IF FIPS tests not passed, return error */
  590. if (((g_fips140_status == FIPS140_STATUS_FAIL) ||
  591. (g_fips140_status == FIPS140_STATUS_PASS_CRYPTO)) &&
  592. is_fips_qcrypto_tests_done)
  593. return -ENXIO;
  594. q_alg = container_of(alg, struct qcrypto_alg, cipher_alg);
  595. ctx->flags = 0;
  596. /* update context with ptr to cp */
  597. ctx->cp = q_alg->cp;
  598. /* random first IV */
  599. get_random_bytes(ctx->iv, QCRYPTO_MAX_IV_LENGTH);
  600. if (_qcrypto_init_assign) {
  601. ctx->pengine = _qcrypto_static_assign_engine(ctx->cp);
  602. if (ctx->pengine == NULL)
  603. return -ENODEV;
  604. } else
  605. ctx->pengine = NULL;
  606. INIT_LIST_HEAD(&ctx->rsp_queue);
  607. return 0;
  608. };
  609. static int _qcrypto_ahash_cra_init(struct crypto_tfm *tfm)
  610. {
  611. struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);
  612. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
  613. struct ahash_alg *alg = container_of(crypto_hash_alg_common(ahash),
  614. struct ahash_alg, halg);
  615. struct qcrypto_alg *q_alg = container_of(alg, struct qcrypto_alg,
  616. sha_alg);
  617. /* IF FIPS tests not passed, return error */
  618. if (((g_fips140_status == FIPS140_STATUS_FAIL) ||
  619. (g_fips140_status == FIPS140_STATUS_PASS_CRYPTO)) &&
  620. is_fips_qcrypto_tests_done)
  621. return -ENXIO;
  622. crypto_ahash_set_reqsize(ahash, sizeof(struct qcrypto_sha_req_ctx));
  623. /* update context with ptr to cp */
  624. sha_ctx->cp = q_alg->cp;
  625. sha_ctx->flags = 0;
  626. sha_ctx->ahash_req = NULL;
  627. if (_qcrypto_init_assign) {
  628. sha_ctx->pengine = _qcrypto_static_assign_engine(sha_ctx->cp);
  629. if (sha_ctx->pengine == NULL)
  630. return -ENODEV;
  631. } else
  632. sha_ctx->pengine = NULL;
  633. INIT_LIST_HEAD(&sha_ctx->rsp_queue);
  634. return 0;
  635. };
  636. static void _qcrypto_ahash_cra_exit(struct crypto_tfm *tfm)
  637. {
  638. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
  639. if (!list_empty(&sha_ctx->rsp_queue))
  640. pr_err("_qcrypto_ahash_cra_exit: requests still outstanding");
  641. if (sha_ctx->ahash_req != NULL) {
  642. ahash_request_free(sha_ctx->ahash_req);
  643. sha_ctx->ahash_req = NULL;
  644. }
  645. };
  646. static void _crypto_sha_hmac_ahash_req_complete(
  647. struct crypto_async_request *req, int err);
  648. static int _qcrypto_ahash_hmac_cra_init(struct crypto_tfm *tfm)
  649. {
  650. struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);
  651. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(tfm);
  652. int ret = 0;
  653. ret = _qcrypto_ahash_cra_init(tfm);
  654. if (ret)
  655. return ret;
  656. sha_ctx->ahash_req = ahash_request_alloc(ahash, GFP_KERNEL);
  657. if (sha_ctx->ahash_req == NULL) {
  658. _qcrypto_ahash_cra_exit(tfm);
  659. return -ENOMEM;
  660. }
  661. init_completion(&sha_ctx->ahash_req_complete);
  662. ahash_request_set_callback(sha_ctx->ahash_req,
  663. CRYPTO_TFM_REQ_MAY_BACKLOG,
  664. _crypto_sha_hmac_ahash_req_complete,
  665. &sha_ctx->ahash_req_complete);
  666. crypto_ahash_clear_flags(ahash, ~0);
  667. return 0;
  668. };
  669. static int _qcrypto_cra_ablkcipher_init(struct crypto_tfm *tfm)
  670. {
  671. tfm->crt_ablkcipher.reqsize = sizeof(struct qcrypto_cipher_req_ctx);
  672. return _qcrypto_cipher_cra_init(tfm);
  673. };
  674. static int _qcrypto_cra_aead_init(struct crypto_tfm *tfm)
  675. {
  676. tfm->crt_aead.reqsize = sizeof(struct qcrypto_cipher_req_ctx);
  677. return _qcrypto_cipher_cra_init(tfm);
  678. };
  679. static void _qcrypto_cra_ablkcipher_exit(struct crypto_tfm *tfm)
  680. {
  681. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  682. if (!list_empty(&ctx->rsp_queue))
  683. pr_err("_qcrypto__cra_ablkcipher_exit: requests still outstanding");
  684. };
  685. static void _qcrypto_cra_aead_exit(struct crypto_tfm *tfm)
  686. {
  687. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  688. if (!list_empty(&ctx->rsp_queue))
  689. pr_err("_qcrypto__cra_aead_exit: requests still outstanding");
  690. };
  691. static int _disp_stats(int id)
  692. {
  693. struct crypto_stat *pstat;
  694. int len = 0;
  695. unsigned long flags;
  696. struct crypto_priv *cp = &qcrypto_dev;
  697. struct crypto_engine *pe;
  698. pstat = &_qcrypto_stat;
  699. len = scnprintf(_debug_read_buf, DEBUG_MAX_RW_BUF - 1,
  700. "\nQualcomm crypto accelerator %d Statistics\n",
  701. id + 1);
  702. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  703. " ABLK AES CIPHER encryption : %llu\n",
  704. pstat->ablk_cipher_aes_enc);
  705. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  706. " ABLK AES CIPHER decryption : %llu\n",
  707. pstat->ablk_cipher_aes_dec);
  708. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  709. " ABLK DES CIPHER encryption : %llu\n",
  710. pstat->ablk_cipher_des_enc);
  711. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  712. " ABLK DES CIPHER decryption : %llu\n",
  713. pstat->ablk_cipher_des_dec);
  714. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  715. " ABLK 3DES CIPHER encryption : %llu\n",
  716. pstat->ablk_cipher_3des_enc);
  717. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  718. " ABLK 3DES CIPHER decryption : %llu\n",
  719. pstat->ablk_cipher_3des_dec);
  720. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  721. " ABLK CIPHER operation success : %llu\n",
  722. pstat->ablk_cipher_op_success);
  723. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  724. " ABLK CIPHER operation fail : %llu\n",
  725. pstat->ablk_cipher_op_fail);
  726. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  727. " AEAD SHA1-AES encryption : %llu\n",
  728. pstat->aead_sha1_aes_enc);
  729. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  730. " AEAD SHA1-AES decryption : %llu\n",
  731. pstat->aead_sha1_aes_dec);
  732. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  733. " AEAD SHA1-DES encryption : %llu\n",
  734. pstat->aead_sha1_des_enc);
  735. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  736. " AEAD SHA1-DES decryption : %llu\n",
  737. pstat->aead_sha1_des_dec);
  738. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  739. " AEAD SHA1-3DES encryption : %llu\n",
  740. pstat->aead_sha1_3des_enc);
  741. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  742. " AEAD SHA1-3DES decryption : %llu\n",
  743. pstat->aead_sha1_3des_dec);
  744. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  745. " AEAD CCM-AES encryption : %llu\n",
  746. pstat->aead_ccm_aes_enc);
  747. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  748. " AEAD CCM-AES decryption : %llu\n",
  749. pstat->aead_ccm_aes_dec);
  750. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  751. " AEAD RFC4309-CCM-AES encryption : %llu\n",
  752. pstat->aead_rfc4309_ccm_aes_enc);
  753. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  754. " AEAD RFC4309-CCM-AES decryption : %llu\n",
  755. pstat->aead_rfc4309_ccm_aes_dec);
  756. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  757. " AEAD operation success : %llu\n",
  758. pstat->aead_op_success);
  759. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  760. " AEAD operation fail : %llu\n",
  761. pstat->aead_op_fail);
  762. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  763. " AEAD bad message : %llu\n",
  764. pstat->aead_bad_msg);
  765. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  766. " SHA1 digest : %llu\n",
  767. pstat->sha1_digest);
  768. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  769. " SHA256 digest : %llu\n",
  770. pstat->sha256_digest);
  771. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  772. " SHA operation fail : %llu\n",
  773. pstat->sha_op_fail);
  774. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  775. " SHA operation success : %llu\n",
  776. pstat->sha_op_success);
  777. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  778. " SHA1 HMAC digest : %llu\n",
  779. pstat->sha1_hmac_digest);
  780. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  781. " SHA256 HMAC digest : %llu\n",
  782. pstat->sha256_hmac_digest);
  783. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  784. " SHA HMAC operation fail : %llu\n",
  785. pstat->sha_hmac_op_fail);
  786. len += scnprintf(_debug_read_buf + len, DEBUG_MAX_RW_BUF - len - 1,
  787. " SHA HMAC operation success : %llu\n",
  788. pstat->sha_hmac_op_success);
  789. spin_lock_irqsave(&cp->lock, flags);
  790. list_for_each_entry(pe, &cp->engine_list, elist) {
  791. len += snprintf(
  792. _debug_read_buf + len,
  793. DEBUG_MAX_RW_BUF - len - 1,
  794. " Engine %4d Req : %llu\n",
  795. pe->unit,
  796. pe->total_req
  797. );
  798. len += snprintf(
  799. _debug_read_buf + len,
  800. DEBUG_MAX_RW_BUF - len - 1,
  801. " Engine %4d Req Error : %llu\n",
  802. pe->unit,
  803. pe->err_req
  804. );
  805. }
  806. spin_unlock_irqrestore(&cp->lock, flags);
  807. return len;
  808. }
  809. static void _qcrypto_remove_engine(struct crypto_engine *pengine)
  810. {
  811. struct crypto_priv *cp;
  812. struct qcrypto_alg *q_alg;
  813. struct qcrypto_alg *n;
  814. unsigned long flags;
  815. cp = pengine->pcp;
  816. spin_lock_irqsave(&cp->lock, flags);
  817. list_del(&pengine->elist);
  818. if (cp->next_engine == pengine)
  819. cp->next_engine = NULL;
  820. spin_unlock_irqrestore(&cp->lock, flags);
  821. cp->total_units--;
  822. tasklet_kill(&pengine->done_tasklet);
  823. cancel_work_sync(&pengine->bw_reaper_ws);
  824. cancel_work_sync(&pengine->bw_allocate_ws);
  825. del_timer_sync(&pengine->bw_reaper_timer);
  826. device_init_wakeup(&pengine->pdev->dev, false);
  827. if (pengine->bus_scale_handle != 0)
  828. msm_bus_scale_unregister_client(pengine->bus_scale_handle);
  829. pengine->bus_scale_handle = 0;
  830. if (cp->total_units)
  831. return;
  832. list_for_each_entry_safe(q_alg, n, &cp->alg_list, entry) {
  833. if (q_alg->alg_type == QCRYPTO_ALG_CIPHER)
  834. crypto_unregister_alg(&q_alg->cipher_alg);
  835. if (q_alg->alg_type == QCRYPTO_ALG_SHA)
  836. crypto_unregister_ahash(&q_alg->sha_alg);
  837. list_del(&q_alg->entry);
  838. kzfree(q_alg);
  839. }
  840. }
  841. static int _qcrypto_remove(struct platform_device *pdev)
  842. {
  843. struct crypto_engine *pengine;
  844. struct crypto_priv *cp;
  845. pengine = platform_get_drvdata(pdev);
  846. if (!pengine)
  847. return 0;
  848. cp = pengine->pcp;
  849. mutex_lock(&cp->engine_lock);
  850. _qcrypto_remove_engine(pengine);
  851. mutex_unlock(&cp->engine_lock);
  852. if (pengine->qce)
  853. qce_close(pengine->qce);
  854. kzfree(pengine);
  855. return 0;
  856. }
  857. static int _qcrypto_check_aes_keylen(struct crypto_ablkcipher *cipher,
  858. struct crypto_priv *cp, unsigned int len)
  859. {
  860. switch (len) {
  861. case AES_KEYSIZE_128:
  862. case AES_KEYSIZE_256:
  863. break;
  864. case AES_KEYSIZE_192:
  865. if (cp->ce_support.aes_key_192)
  866. break;
  867. default:
  868. crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  869. return -EINVAL;
  870. };
  871. return 0;
  872. }
  873. static int _qcrypto_setkey_aes(struct crypto_ablkcipher *cipher, const u8 *key,
  874. unsigned int len)
  875. {
  876. struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
  877. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  878. struct crypto_priv *cp = ctx->cp;
  879. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY)
  880. return 0;
  881. if (_qcrypto_check_aes_keylen(cipher, cp, len)) {
  882. return -EINVAL;
  883. } else {
  884. ctx->enc_key_len = len;
  885. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY)) {
  886. if (key != NULL) {
  887. memcpy(ctx->enc_key, key, len);
  888. } else {
  889. pr_err("%s Inavlid key pointer\n", __func__);
  890. return -EINVAL;
  891. }
  892. }
  893. }
  894. return 0;
  895. };
  896. static int _qcrypto_setkey_aes_xts(struct crypto_ablkcipher *cipher,
  897. const u8 *key, unsigned int len)
  898. {
  899. struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
  900. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  901. struct crypto_priv *cp = ctx->cp;
  902. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY)
  903. return 0;
  904. if (_qcrypto_check_aes_keylen(cipher, cp, len/2)) {
  905. return -EINVAL;
  906. } else {
  907. ctx->enc_key_len = len;
  908. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY)) {
  909. if (key != NULL) {
  910. memcpy(ctx->enc_key, key, len);
  911. } else {
  912. pr_err("%s Inavlid key pointer\n", __func__);
  913. return -EINVAL;
  914. }
  915. }
  916. }
  917. return 0;
  918. };
  919. static int _qcrypto_setkey_des(struct crypto_ablkcipher *cipher, const u8 *key,
  920. unsigned int len)
  921. {
  922. struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
  923. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  924. u32 tmp[DES_EXPKEY_WORDS];
  925. int ret;
  926. if (!key) {
  927. pr_err("%s Inavlid key pointer\n", __func__);
  928. return -EINVAL;
  929. }
  930. ret = des_ekey(tmp, key);
  931. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY) {
  932. pr_err("%s HW KEY usage not supported for DES algorithm\n",
  933. __func__);
  934. return 0;
  935. };
  936. if (len != DES_KEY_SIZE) {
  937. crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  938. return -EINVAL;
  939. };
  940. if (unlikely(ret == 0) && (tfm->crt_flags & CRYPTO_TFM_REQ_WEAK_KEY)) {
  941. tfm->crt_flags |= CRYPTO_TFM_RES_WEAK_KEY;
  942. return -EINVAL;
  943. }
  944. ctx->enc_key_len = len;
  945. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY))
  946. memcpy(ctx->enc_key, key, len);
  947. return 0;
  948. };
  949. static int _qcrypto_setkey_3des(struct crypto_ablkcipher *cipher, const u8 *key,
  950. unsigned int len)
  951. {
  952. struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher);
  953. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  954. if ((ctx->flags & QCRYPTO_CTX_USE_HW_KEY) == QCRYPTO_CTX_USE_HW_KEY) {
  955. pr_err("%s HW KEY usage not supported for 3DES algorithm\n",
  956. __func__);
  957. return 0;
  958. };
  959. if (len != DES3_EDE_KEY_SIZE) {
  960. crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN);
  961. return -EINVAL;
  962. };
  963. ctx->enc_key_len = len;
  964. if (!(ctx->flags & QCRYPTO_CTX_USE_PIPE_KEY)) {
  965. if (key != NULL) {
  966. memcpy(ctx->enc_key, key, len);
  967. } else {
  968. pr_err("%s Inavlid key pointer\n", __func__);
  969. return -EINVAL;
  970. }
  971. }
  972. return 0;
  973. };
  974. static void _qcrypto_tfm_complete(struct crypto_priv *cp, u32 type,
  975. void *tfm_ctx)
  976. {
  977. unsigned long flags;
  978. struct qcrypto_resp_ctx *arsp;
  979. struct list_head *plist;
  980. struct crypto_async_request *areq;
  981. switch (type) {
  982. case CRYPTO_ALG_TYPE_AHASH:
  983. plist = &((struct qcrypto_sha_ctx *) tfm_ctx)->rsp_queue;
  984. break;
  985. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  986. case CRYPTO_ALG_TYPE_AEAD:
  987. default:
  988. plist = &((struct qcrypto_cipher_ctx *) tfm_ctx)->rsp_queue;
  989. break;
  990. }
  991. again:
  992. spin_lock_irqsave(&cp->lock, flags);
  993. if (list_empty(plist)) {
  994. arsp = NULL; /* nothing to do */
  995. } else {
  996. arsp = list_first_entry(plist,
  997. struct qcrypto_resp_ctx, list);
  998. if (arsp->res == -EINPROGRESS)
  999. arsp = NULL; /* still in progress */
  1000. else
  1001. list_del(&arsp->list); /* request is complete */
  1002. }
  1003. spin_unlock_irqrestore(&cp->lock, flags);
  1004. if (arsp) {
  1005. areq = arsp->async_req;
  1006. areq->complete(areq, arsp->res);
  1007. goto again;
  1008. }
  1009. }
  1010. static void req_done(unsigned long data)
  1011. {
  1012. struct crypto_async_request *areq;
  1013. struct crypto_engine *pengine = (struct crypto_engine *)data;
  1014. struct crypto_priv *cp;
  1015. unsigned long flags;
  1016. struct qcrypto_resp_ctx *arsp;
  1017. int res;
  1018. u32 type = 0;
  1019. void *tfm_ctx = NULL;
  1020. cp = pengine->pcp;
  1021. spin_lock_irqsave(&cp->lock, flags);
  1022. areq = pengine->req;
  1023. arsp = pengine->arsp;
  1024. res = pengine->res;
  1025. pengine->req = NULL;
  1026. pengine->arsp = NULL;
  1027. if (areq) {
  1028. type = crypto_tfm_alg_type(areq->tfm);
  1029. tfm_ctx = crypto_tfm_ctx(areq->tfm);
  1030. arsp->res = res;
  1031. }
  1032. spin_unlock_irqrestore(&cp->lock, flags);
  1033. _start_qcrypto_process(cp, pengine);
  1034. if (areq)
  1035. _qcrypto_tfm_complete(cp, type, tfm_ctx);
  1036. }
  1037. static void _qce_ahash_complete(void *cookie, unsigned char *digest,
  1038. unsigned char *authdata, int ret)
  1039. {
  1040. struct ahash_request *areq = (struct ahash_request *) cookie;
  1041. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  1042. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(areq->base.tfm);
  1043. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(areq);
  1044. struct crypto_priv *cp = sha_ctx->cp;
  1045. struct crypto_stat *pstat;
  1046. uint32_t diglen = crypto_ahash_digestsize(ahash);
  1047. uint32_t *auth32 = (uint32_t *)authdata;
  1048. struct crypto_engine *pengine;
  1049. pstat = &_qcrypto_stat;
  1050. pengine = rctx->pengine;
  1051. #ifdef QCRYPTO_DEBUG
  1052. dev_info(&pengine->pdev->dev, "_qce_ahash_complete: %p ret %d\n",
  1053. areq, ret);
  1054. #endif
  1055. if (digest) {
  1056. memcpy(rctx->digest, digest, diglen);
  1057. memcpy(areq->result, digest, diglen);
  1058. }
  1059. if (authdata) {
  1060. rctx->byte_count[0] = auth32[0];
  1061. rctx->byte_count[1] = auth32[1];
  1062. rctx->byte_count[2] = auth32[2];
  1063. rctx->byte_count[3] = auth32[3];
  1064. }
  1065. areq->src = rctx->src;
  1066. areq->nbytes = rctx->nbytes;
  1067. rctx->last_blk = 0;
  1068. rctx->first_blk = 0;
  1069. if (ret) {
  1070. pengine->res = -ENXIO;
  1071. pstat->sha_op_fail++;
  1072. } else {
  1073. pengine->res = 0;
  1074. pstat->sha_op_success++;
  1075. }
  1076. if (cp->ce_support.aligned_only) {
  1077. areq->src = rctx->orig_src;
  1078. kfree(rctx->data);
  1079. }
  1080. if (cp->platform_support.ce_shared)
  1081. schedule_work(&cp->unlock_ce_ws);
  1082. tasklet_schedule(&pengine->done_tasklet);
  1083. };
  1084. static void _qce_ablk_cipher_complete(void *cookie, unsigned char *icb,
  1085. unsigned char *iv, int ret)
  1086. {
  1087. struct ablkcipher_request *areq = (struct ablkcipher_request *) cookie;
  1088. struct crypto_ablkcipher *ablk = crypto_ablkcipher_reqtfm(areq);
  1089. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(areq->base.tfm);
  1090. struct crypto_priv *cp = ctx->cp;
  1091. struct crypto_stat *pstat;
  1092. struct qcrypto_cipher_req_ctx *rctx;
  1093. struct crypto_engine *pengine;
  1094. pstat = &_qcrypto_stat;
  1095. rctx = ablkcipher_request_ctx(areq);
  1096. pengine = rctx->pengine;
  1097. #ifdef QCRYPTO_DEBUG
  1098. dev_info(&pengine->pdev->dev, "_qce_ablk_cipher_complete: %p ret %d\n",
  1099. areq, ret);
  1100. #endif
  1101. if (iv)
  1102. memcpy(ctx->iv, iv, crypto_ablkcipher_ivsize(ablk));
  1103. if (ret) {
  1104. pengine->res = -ENXIO;
  1105. pstat->ablk_cipher_op_fail++;
  1106. } else {
  1107. pengine->res = 0;
  1108. pstat->ablk_cipher_op_success++;
  1109. }
  1110. if (cp->ce_support.aligned_only) {
  1111. struct qcrypto_cipher_req_ctx *rctx;
  1112. uint32_t num_sg = 0;
  1113. uint32_t bytes = 0;
  1114. rctx = ablkcipher_request_ctx(areq);
  1115. areq->src = rctx->orig_src;
  1116. areq->dst = rctx->orig_dst;
  1117. num_sg = qcrypto_count_sg(areq->dst, areq->nbytes);
  1118. bytes = qcrypto_sg_copy_from_buffer(areq->dst, num_sg,
  1119. rctx->data, areq->nbytes);
  1120. if (bytes != areq->nbytes)
  1121. pr_warn("bytes copied=0x%x bytes to copy= 0x%x", bytes,
  1122. areq->nbytes);
  1123. kzfree(rctx->data);
  1124. }
  1125. if (cp->platform_support.ce_shared)
  1126. schedule_work(&cp->unlock_ce_ws);
  1127. tasklet_schedule(&pengine->done_tasklet);
  1128. };
  1129. static void _qce_aead_complete(void *cookie, unsigned char *icv,
  1130. unsigned char *iv, int ret)
  1131. {
  1132. struct aead_request *areq = (struct aead_request *) cookie;
  1133. struct crypto_aead *aead = crypto_aead_reqtfm(areq);
  1134. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(areq->base.tfm);
  1135. struct crypto_priv *cp = ctx->cp;
  1136. struct qcrypto_cipher_req_ctx *rctx;
  1137. struct crypto_stat *pstat;
  1138. struct crypto_engine *pengine;
  1139. pstat = &_qcrypto_stat;
  1140. rctx = aead_request_ctx(areq);
  1141. pengine = rctx->pengine;
  1142. if (rctx->mode == QCE_MODE_CCM) {
  1143. if (cp->ce_support.aligned_only) {
  1144. struct qcrypto_cipher_req_ctx *rctx;
  1145. uint32_t bytes = 0;
  1146. uint32_t nbytes = 0;
  1147. uint32_t num_sg = 0;
  1148. rctx = aead_request_ctx(areq);
  1149. areq->src = rctx->orig_src;
  1150. areq->dst = rctx->orig_dst;
  1151. if (rctx->dir == QCE_ENCRYPT)
  1152. nbytes = areq->cryptlen +
  1153. crypto_aead_authsize(aead);
  1154. else
  1155. nbytes = areq->cryptlen -
  1156. crypto_aead_authsize(aead);
  1157. num_sg = qcrypto_count_sg(areq->dst, nbytes);
  1158. bytes = qcrypto_sg_copy_from_buffer(areq->dst, num_sg,
  1159. ((char *)rctx->data + areq->assoclen),
  1160. nbytes);
  1161. if (bytes != nbytes)
  1162. pr_warn("bytes copied=0x%x bytes to copy= 0x%x",
  1163. bytes, nbytes);
  1164. kzfree(rctx->data);
  1165. }
  1166. kzfree(rctx->assoc);
  1167. areq->assoc = rctx->assoc_sg;
  1168. areq->assoclen = rctx->assoclen;
  1169. } else {
  1170. uint32_t ivsize = crypto_aead_ivsize(aead);
  1171. /* for aead operations, other than aes(ccm) */
  1172. if (cp->ce_support.aligned_only) {
  1173. struct qcrypto_cipher_req_ctx *rctx;
  1174. uint32_t bytes = 0;
  1175. uint32_t nbytes = 0;
  1176. uint32_t num_sg = 0;
  1177. uint32_t offset = areq->assoclen + ivsize;
  1178. rctx = aead_request_ctx(areq);
  1179. areq->src = rctx->orig_src;
  1180. areq->dst = rctx->orig_dst;
  1181. if (rctx->dir == QCE_ENCRYPT)
  1182. nbytes = areq->cryptlen;
  1183. else
  1184. nbytes = areq->cryptlen -
  1185. crypto_aead_authsize(aead);
  1186. num_sg = qcrypto_count_sg(areq->dst, nbytes);
  1187. bytes = qcrypto_sg_copy_from_buffer(
  1188. areq->dst,
  1189. num_sg,
  1190. (char *)rctx->data + offset,
  1191. nbytes);
  1192. if (bytes != nbytes)
  1193. pr_warn("bytes copied=0x%x bytes to copy= 0x%x",
  1194. bytes, nbytes);
  1195. kzfree(rctx->data);
  1196. }
  1197. if (ret == 0) {
  1198. if (rctx->dir == QCE_ENCRYPT) {
  1199. /* copy the icv to dst */
  1200. scatterwalk_map_and_copy(icv, areq->dst,
  1201. areq->cryptlen,
  1202. ctx->authsize, 1);
  1203. } else {
  1204. unsigned char tmp[SHA256_DIGESTSIZE] = {0};
  1205. /* compare icv from src */
  1206. scatterwalk_map_and_copy(tmp,
  1207. areq->src, areq->cryptlen -
  1208. ctx->authsize, ctx->authsize, 0);
  1209. ret = memcmp(icv, tmp, ctx->authsize);
  1210. if (ret != 0)
  1211. ret = -EBADMSG;
  1212. }
  1213. } else {
  1214. ret = -ENXIO;
  1215. }
  1216. if (iv)
  1217. memcpy(ctx->iv, iv, ivsize);
  1218. }
  1219. if (ret == (-EBADMSG))
  1220. pstat->aead_bad_msg++;
  1221. else if (ret)
  1222. pstat->aead_op_fail++;
  1223. else
  1224. pstat->aead_op_success++;
  1225. pengine->res = ret;
  1226. if (cp->platform_support.ce_shared)
  1227. schedule_work(&cp->unlock_ce_ws);
  1228. tasklet_schedule(&pengine->done_tasklet);
  1229. }
  1230. static int aead_ccm_set_msg_len(u8 *block, unsigned int msglen, int csize)
  1231. {
  1232. __be32 data;
  1233. memset(block, 0, csize);
  1234. block += csize;
  1235. if (csize >= 4)
  1236. csize = 4;
  1237. else if (msglen > (1 << (8 * csize)))
  1238. return -EOVERFLOW;
  1239. data = cpu_to_be32(msglen);
  1240. memcpy(block - csize, (u8 *)&data + 4 - csize, csize);
  1241. return 0;
  1242. }
  1243. static int qccrypto_set_aead_ccm_nonce(struct qce_req *qreq)
  1244. {
  1245. struct aead_request *areq = (struct aead_request *) qreq->areq;
  1246. unsigned int i = ((unsigned int)qreq->iv[0]) + 1;
  1247. memcpy(&qreq->nonce[0] , qreq->iv, qreq->ivsize);
  1248. /*
  1249. * Format control info per RFC 3610 and
  1250. * NIST Special Publication 800-38C
  1251. */
  1252. qreq->nonce[0] |= (8 * ((qreq->authsize - 2) / 2));
  1253. if (areq->assoclen)
  1254. qreq->nonce[0] |= 64;
  1255. if (i > MAX_NONCE)
  1256. return -EINVAL;
  1257. return aead_ccm_set_msg_len(qreq->nonce + 16 - i, qreq->cryptlen, i);
  1258. }
  1259. static int qcrypto_aead_ccm_format_adata(struct qce_req *qreq, uint32_t alen,
  1260. struct scatterlist *sg)
  1261. {
  1262. unsigned char *adata;
  1263. uint32_t len;
  1264. uint32_t bytes = 0;
  1265. uint32_t num_sg = 0;
  1266. if (alen == 0) {
  1267. qreq->assoc = NULL;
  1268. qreq->assoclen = 0;
  1269. return 0;
  1270. }
  1271. qreq->assoc = kzalloc((alen + 0x64), GFP_ATOMIC);
  1272. if (!qreq->assoc) {
  1273. pr_err("qcrypto Memory allocation of adata FAIL, error %ld\n",
  1274. PTR_ERR(qreq->assoc));
  1275. return -ENOMEM;
  1276. }
  1277. adata = qreq->assoc;
  1278. /*
  1279. * Add control info for associated data
  1280. * RFC 3610 and NIST Special Publication 800-38C
  1281. */
  1282. if (alen < 65280) {
  1283. *(__be16 *)adata = cpu_to_be16(alen);
  1284. len = 2;
  1285. } else {
  1286. if ((alen >= 65280) && (alen <= 0xffffffff)) {
  1287. *(__be16 *)adata = cpu_to_be16(0xfffe);
  1288. *(__be32 *)&adata[2] = cpu_to_be32(alen);
  1289. len = 6;
  1290. } else {
  1291. *(__be16 *)adata = cpu_to_be16(0xffff);
  1292. *(__be32 *)&adata[6] = cpu_to_be32(alen);
  1293. len = 10;
  1294. }
  1295. }
  1296. adata += len;
  1297. qreq->assoclen = ALIGN((alen + len), 16);
  1298. num_sg = qcrypto_count_sg(sg, alen);
  1299. bytes = qcrypto_sg_copy_to_buffer(sg, num_sg, adata, alen);
  1300. if (bytes != alen)
  1301. pr_warn("bytes copied=0x%x bytes to copy= 0x%x", bytes, alen);
  1302. return 0;
  1303. }
  1304. static int _qcrypto_process_ablkcipher(struct crypto_engine *pengine,
  1305. struct crypto_async_request *async_req)
  1306. {
  1307. struct qce_req qreq;
  1308. int ret;
  1309. struct qcrypto_cipher_req_ctx *rctx;
  1310. struct qcrypto_cipher_ctx *cipher_ctx;
  1311. struct ablkcipher_request *req;
  1312. struct crypto_ablkcipher *tfm;
  1313. req = container_of(async_req, struct ablkcipher_request, base);
  1314. cipher_ctx = crypto_tfm_ctx(async_req->tfm);
  1315. rctx = ablkcipher_request_ctx(req);
  1316. rctx->pengine = pengine;
  1317. tfm = crypto_ablkcipher_reqtfm(req);
  1318. if (pengine->pcp->ce_support.aligned_only) {
  1319. uint32_t bytes = 0;
  1320. uint32_t num_sg = 0;
  1321. rctx->orig_src = req->src;
  1322. rctx->orig_dst = req->dst;
  1323. rctx->data = kzalloc((req->nbytes + 64), GFP_ATOMIC);
  1324. if (rctx->data == NULL) {
  1325. pr_err("Mem Alloc fail rctx->data, err %ld for 0x%x\n",
  1326. PTR_ERR(rctx->data), (req->nbytes + 64));
  1327. return -ENOMEM;
  1328. }
  1329. num_sg = qcrypto_count_sg(req->src, req->nbytes);
  1330. bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, rctx->data,
  1331. req->nbytes);
  1332. if (bytes != req->nbytes)
  1333. pr_warn("bytes copied=0x%x bytes to copy= 0x%x", bytes,
  1334. req->nbytes);
  1335. sg_set_buf(&rctx->dsg, rctx->data, req->nbytes);
  1336. sg_mark_end(&rctx->dsg);
  1337. rctx->iv = req->info;
  1338. req->src = &rctx->dsg;
  1339. req->dst = &rctx->dsg;
  1340. }
  1341. qreq.op = QCE_REQ_ABLK_CIPHER;
  1342. qreq.qce_cb = _qce_ablk_cipher_complete;
  1343. qreq.areq = req;
  1344. qreq.alg = rctx->alg;
  1345. qreq.dir = rctx->dir;
  1346. qreq.mode = rctx->mode;
  1347. qreq.enckey = cipher_ctx->enc_key;
  1348. qreq.encklen = cipher_ctx->enc_key_len;
  1349. qreq.iv = req->info;
  1350. qreq.ivsize = crypto_ablkcipher_ivsize(tfm);
  1351. qreq.cryptlen = req->nbytes;
  1352. qreq.use_pmem = 0;
  1353. qreq.flags = cipher_ctx->flags;
  1354. if ((cipher_ctx->enc_key_len == 0) &&
  1355. (pengine->pcp->platform_support.hw_key_support == 0))
  1356. ret = -EINVAL;
  1357. else
  1358. ret = qce_ablk_cipher_req(pengine->qce, &qreq);
  1359. return ret;
  1360. }
  1361. static int _qcrypto_process_ahash(struct crypto_engine *pengine,
  1362. struct crypto_async_request *async_req)
  1363. {
  1364. struct ahash_request *req;
  1365. struct qce_sha_req sreq;
  1366. struct qcrypto_sha_req_ctx *rctx;
  1367. struct qcrypto_sha_ctx *sha_ctx;
  1368. int ret = 0;
  1369. req = container_of(async_req,
  1370. struct ahash_request, base);
  1371. rctx = ahash_request_ctx(req);
  1372. sha_ctx = crypto_tfm_ctx(async_req->tfm);
  1373. rctx->pengine = pengine;
  1374. sreq.qce_cb = _qce_ahash_complete;
  1375. sreq.digest = &rctx->digest[0];
  1376. sreq.src = req->src;
  1377. sreq.auth_data[0] = rctx->byte_count[0];
  1378. sreq.auth_data[1] = rctx->byte_count[1];
  1379. sreq.auth_data[2] = rctx->byte_count[2];
  1380. sreq.auth_data[3] = rctx->byte_count[3];
  1381. sreq.first_blk = rctx->first_blk;
  1382. sreq.last_blk = rctx->last_blk;
  1383. sreq.size = req->nbytes;
  1384. sreq.areq = req;
  1385. sreq.flags = sha_ctx->flags;
  1386. switch (sha_ctx->alg) {
  1387. case QCE_HASH_SHA1:
  1388. sreq.alg = QCE_HASH_SHA1;
  1389. sreq.authkey = NULL;
  1390. break;
  1391. case QCE_HASH_SHA256:
  1392. sreq.alg = QCE_HASH_SHA256;
  1393. sreq.authkey = NULL;
  1394. break;
  1395. case QCE_HASH_SHA1_HMAC:
  1396. sreq.alg = QCE_HASH_SHA1_HMAC;
  1397. sreq.authkey = &sha_ctx->authkey[0];
  1398. sreq.authklen = SHA_HMAC_KEY_SIZE;
  1399. break;
  1400. case QCE_HASH_SHA256_HMAC:
  1401. sreq.alg = QCE_HASH_SHA256_HMAC;
  1402. sreq.authkey = &sha_ctx->authkey[0];
  1403. sreq.authklen = SHA_HMAC_KEY_SIZE;
  1404. break;
  1405. default:
  1406. pr_err("Algorithm %d not supported, exiting", sha_ctx->alg);
  1407. ret = -1;
  1408. break;
  1409. };
  1410. ret = qce_process_sha_req(pengine->qce, &sreq);
  1411. return ret;
  1412. }
  1413. static int _qcrypto_process_aead(struct crypto_engine *pengine,
  1414. struct crypto_async_request *async_req)
  1415. {
  1416. struct qce_req qreq = {0};
  1417. int ret = 0;
  1418. struct qcrypto_cipher_req_ctx *rctx;
  1419. struct qcrypto_cipher_ctx *cipher_ctx;
  1420. struct aead_request *req = container_of(async_req,
  1421. struct aead_request, base);
  1422. struct crypto_aead *aead = crypto_aead_reqtfm(req);
  1423. rctx = aead_request_ctx(req);
  1424. rctx->pengine = pengine;
  1425. cipher_ctx = crypto_tfm_ctx(async_req->tfm);
  1426. qreq.op = QCE_REQ_AEAD;
  1427. qreq.qce_cb = _qce_aead_complete;
  1428. qreq.areq = req;
  1429. qreq.alg = rctx->alg;
  1430. qreq.dir = rctx->dir;
  1431. qreq.mode = rctx->mode;
  1432. qreq.iv = rctx->iv;
  1433. qreq.enckey = cipher_ctx->enc_key;
  1434. qreq.encklen = cipher_ctx->enc_key_len;
  1435. qreq.authkey = cipher_ctx->auth_key;
  1436. qreq.authklen = cipher_ctx->auth_key_len;
  1437. qreq.authsize = crypto_aead_authsize(aead);
  1438. if (qreq.mode == QCE_MODE_CCM)
  1439. qreq.ivsize = AES_BLOCK_SIZE;
  1440. else
  1441. qreq.ivsize = crypto_aead_ivsize(aead);
  1442. qreq.flags = cipher_ctx->flags;
  1443. if (qreq.mode == QCE_MODE_CCM) {
  1444. if (qreq.dir == QCE_ENCRYPT)
  1445. qreq.cryptlen = req->cryptlen;
  1446. else
  1447. qreq.cryptlen = req->cryptlen -
  1448. qreq.authsize;
  1449. /* Get NONCE */
  1450. ret = qccrypto_set_aead_ccm_nonce(&qreq);
  1451. if (ret)
  1452. return ret;
  1453. /* Format Associated data */
  1454. ret = qcrypto_aead_ccm_format_adata(&qreq,
  1455. req->assoclen,
  1456. req->assoc);
  1457. if (ret)
  1458. return ret;
  1459. if (pengine->pcp->ce_support.aligned_only) {
  1460. uint32_t bytes = 0;
  1461. uint32_t num_sg = 0;
  1462. rctx->orig_src = req->src;
  1463. rctx->orig_dst = req->dst;
  1464. if ((MAX_ALIGN_SIZE*2 > UINT_MAX - qreq.assoclen) ||
  1465. ((MAX_ALIGN_SIZE*2 + qreq.assoclen) >
  1466. UINT_MAX - qreq.authsize) ||
  1467. ((MAX_ALIGN_SIZE*2 + qreq.assoclen +
  1468. qreq.authsize) >
  1469. UINT_MAX - req->cryptlen)) {
  1470. pr_err("Integer overflow on aead req length.\n");
  1471. return -EINVAL;
  1472. }
  1473. rctx->data = kzalloc((req->cryptlen + qreq.assoclen +
  1474. qreq.authsize + MAX_ALIGN_SIZE*2),
  1475. GFP_ATOMIC);
  1476. if (rctx->data == NULL) {
  1477. pr_err("Mem Alloc fail rctx->data, err %ld\n",
  1478. PTR_ERR(rctx->data));
  1479. kzfree(qreq.assoc);
  1480. return -ENOMEM;
  1481. }
  1482. if (qreq.assoclen)
  1483. memcpy((char *)rctx->data, qreq.assoc,
  1484. qreq.assoclen);
  1485. num_sg = qcrypto_count_sg(req->src, req->cryptlen);
  1486. bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg,
  1487. rctx->data + qreq.assoclen , req->cryptlen);
  1488. if (bytes != req->cryptlen)
  1489. pr_warn("bytes copied=0x%x bytes to copy= 0x%x",
  1490. bytes, req->cryptlen);
  1491. sg_set_buf(&rctx->ssg, rctx->data, req->cryptlen +
  1492. qreq.assoclen);
  1493. sg_mark_end(&rctx->ssg);
  1494. if (qreq.dir == QCE_ENCRYPT)
  1495. sg_set_buf(&rctx->dsg, rctx->data,
  1496. qreq.assoclen + qreq.cryptlen +
  1497. ALIGN(qreq.authsize, 64));
  1498. else
  1499. sg_set_buf(&rctx->dsg, rctx->data,
  1500. qreq.assoclen + req->cryptlen +
  1501. qreq.authsize);
  1502. sg_mark_end(&rctx->dsg);
  1503. req->src = &rctx->ssg;
  1504. req->dst = &rctx->dsg;
  1505. }
  1506. /*
  1507. * Save the original associated data
  1508. * length and sg
  1509. */
  1510. rctx->assoc_sg = req->assoc;
  1511. rctx->assoclen = req->assoclen;
  1512. rctx->assoc = qreq.assoc;
  1513. /*
  1514. * update req with new formatted associated
  1515. * data info
  1516. */
  1517. req->assoc = &rctx->asg;
  1518. req->assoclen = qreq.assoclen;
  1519. sg_set_buf(req->assoc, qreq.assoc,
  1520. req->assoclen);
  1521. sg_mark_end(req->assoc);
  1522. } else {
  1523. /* for aead operations, other than aes(ccm) */
  1524. if (pengine->pcp->ce_support.aligned_only) {
  1525. uint32_t bytes = 0;
  1526. uint32_t num_sg = 0;
  1527. rctx->orig_src = req->src;
  1528. rctx->orig_dst = req->dst;
  1529. /*
  1530. * The data area should be big enough to
  1531. * include assoicated data, ciphering data stream,
  1532. * generated MAC, and CCM padding.
  1533. */
  1534. if ((MAX_ALIGN_SIZE * 2 > UINT_MAX - req->assoclen) ||
  1535. ((MAX_ALIGN_SIZE * 2 + req->assoclen) >
  1536. UINT_MAX - qreq.ivsize) ||
  1537. ((MAX_ALIGN_SIZE * 2 + req->assoclen
  1538. + qreq.ivsize)
  1539. > UINT_MAX - req->cryptlen)) {
  1540. pr_err("Integer overflow on aead req length.\n");
  1541. return -EINVAL;
  1542. }
  1543. rctx->data = kzalloc(
  1544. (req->cryptlen +
  1545. req->assoclen +
  1546. qreq.ivsize +
  1547. MAX_ALIGN_SIZE * 2),
  1548. GFP_ATOMIC);
  1549. if (rctx->data == NULL) {
  1550. pr_err("Mem Alloc fail rctx->data, err %ld\n",
  1551. PTR_ERR(rctx->data));
  1552. return -ENOMEM;
  1553. }
  1554. /* copy associated data */
  1555. num_sg = qcrypto_count_sg(req->assoc, req->assoclen);
  1556. bytes = qcrypto_sg_copy_to_buffer(
  1557. req->assoc, num_sg,
  1558. rctx->data, req->assoclen);
  1559. if (bytes != req->assoclen)
  1560. pr_warn("bytes copied=0x%x bytes to copy= 0x%x",
  1561. bytes, req->assoclen);
  1562. /* copy iv */
  1563. memcpy(rctx->data + req->assoclen, qreq.iv,
  1564. qreq.ivsize);
  1565. /* copy src */
  1566. num_sg = qcrypto_count_sg(req->src, req->cryptlen);
  1567. bytes = qcrypto_sg_copy_to_buffer(
  1568. req->src,
  1569. num_sg,
  1570. rctx->data + req->assoclen +
  1571. qreq.ivsize,
  1572. req->cryptlen);
  1573. if (bytes != req->cryptlen)
  1574. pr_warn("bytes copied=0x%x bytes to copy= 0x%x",
  1575. bytes, req->cryptlen);
  1576. sg_set_buf(&rctx->ssg, rctx->data,
  1577. req->cryptlen + req->assoclen
  1578. + qreq.ivsize);
  1579. sg_mark_end(&rctx->ssg);
  1580. sg_set_buf(&rctx->dsg, rctx->data,
  1581. req->cryptlen + req->assoclen
  1582. + qreq.ivsize);
  1583. sg_mark_end(&rctx->dsg);
  1584. req->src = &rctx->ssg;
  1585. req->dst = &rctx->dsg;
  1586. }
  1587. }
  1588. ret = qce_aead_req(pengine->qce, &qreq);
  1589. return ret;
  1590. }
  1591. static struct crypto_engine *_qcrypto_static_assign_engine(
  1592. struct crypto_priv *cp)
  1593. {
  1594. struct crypto_engine *pengine;
  1595. unsigned long flags;
  1596. spin_lock_irqsave(&cp->lock, flags);
  1597. if (cp->next_engine)
  1598. pengine = cp->next_engine;
  1599. else
  1600. pengine = list_first_entry(&cp->engine_list,
  1601. struct crypto_engine, elist);
  1602. if (list_is_last(&pengine->elist, &cp->engine_list))
  1603. cp->next_engine = list_first_entry(
  1604. &cp->engine_list, struct crypto_engine, elist);
  1605. else
  1606. cp->next_engine = list_next_entry(pengine, elist);
  1607. spin_unlock_irqrestore(&cp->lock, flags);
  1608. return pengine;
  1609. }
  1610. static int _start_qcrypto_process(struct crypto_priv *cp,
  1611. struct crypto_engine *pengine)
  1612. {
  1613. struct crypto_async_request *async_req = NULL;
  1614. struct crypto_async_request *backlog_eng = NULL;
  1615. struct crypto_async_request *backlog_cp = NULL;
  1616. unsigned long flags;
  1617. u32 type;
  1618. int ret = 0;
  1619. struct crypto_stat *pstat;
  1620. void *tfm_ctx;
  1621. struct qcrypto_cipher_req_ctx *cipher_rctx;
  1622. struct qcrypto_sha_req_ctx *ahash_rctx;
  1623. struct ablkcipher_request *ablkcipher_req;
  1624. struct ahash_request *ahash_req;
  1625. struct aead_request *aead_req;
  1626. struct qcrypto_resp_ctx *arsp;
  1627. pstat = &_qcrypto_stat;
  1628. again:
  1629. spin_lock_irqsave(&cp->lock, flags);
  1630. if (pengine->req) {
  1631. spin_unlock_irqrestore(&cp->lock, flags);
  1632. return 0;
  1633. }
  1634. backlog_eng = crypto_get_backlog(&pengine->req_queue);
  1635. /* make sure it is in high bandwidth state */
  1636. if (pengine->bw_state != BUS_HAS_BANDWIDTH) {
  1637. spin_unlock_irqrestore(&cp->lock, flags);
  1638. return 0;
  1639. }
  1640. /* try to get request from request queue of the engine first */
  1641. async_req = crypto_dequeue_request(&pengine->req_queue);
  1642. if (!async_req) {
  1643. /*
  1644. * if no request from the engine,
  1645. * try to get from request queue of driver
  1646. */
  1647. backlog_cp = crypto_get_backlog(&cp->req_queue);
  1648. async_req = crypto_dequeue_request(&cp->req_queue);
  1649. if (!async_req) {
  1650. spin_unlock_irqrestore(&cp->lock, flags);
  1651. return 0;
  1652. }
  1653. }
  1654. /* add associated rsp entry to tfm response queue */
  1655. type = crypto_tfm_alg_type(async_req->tfm);
  1656. tfm_ctx = crypto_tfm_ctx(async_req->tfm);
  1657. switch (type) {
  1658. case CRYPTO_ALG_TYPE_AHASH:
  1659. ahash_req = container_of(async_req,
  1660. struct ahash_request, base);
  1661. ahash_rctx = ahash_request_ctx(ahash_req);
  1662. arsp = &ahash_rctx->rsp_entry;
  1663. list_add_tail(
  1664. &arsp->list,
  1665. &((struct qcrypto_sha_ctx *)tfm_ctx)
  1666. ->rsp_queue);
  1667. break;
  1668. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  1669. ablkcipher_req = container_of(async_req,
  1670. struct ablkcipher_request, base);
  1671. cipher_rctx = ablkcipher_request_ctx(ablkcipher_req);
  1672. arsp = &cipher_rctx->rsp_entry;
  1673. list_add_tail(
  1674. &arsp->list,
  1675. &((struct qcrypto_sha_ctx *)tfm_ctx)
  1676. ->rsp_queue);
  1677. break;
  1678. case CRYPTO_ALG_TYPE_AEAD:
  1679. default:
  1680. aead_req = container_of(async_req,
  1681. struct aead_request, base);
  1682. cipher_rctx = aead_request_ctx(aead_req);
  1683. arsp = &cipher_rctx->rsp_entry;
  1684. list_add_tail(
  1685. &arsp->list,
  1686. &((struct qcrypto_sha_ctx *)tfm_ctx)
  1687. ->rsp_queue);
  1688. break;
  1689. }
  1690. arsp->res = -EINPROGRESS;
  1691. arsp->async_req = async_req;
  1692. pengine->req = async_req;
  1693. pengine->arsp = arsp;
  1694. pengine->active_seq++;
  1695. pengine->check_flag = true;
  1696. spin_unlock_irqrestore(&cp->lock, flags);
  1697. if (backlog_eng)
  1698. backlog_eng->complete(backlog_eng, -EINPROGRESS);
  1699. if (backlog_cp)
  1700. backlog_cp->complete(backlog_cp, -EINPROGRESS);
  1701. switch (type) {
  1702. case CRYPTO_ALG_TYPE_ABLKCIPHER:
  1703. ret = _qcrypto_process_ablkcipher(pengine, async_req);
  1704. break;
  1705. case CRYPTO_ALG_TYPE_AHASH:
  1706. ret = _qcrypto_process_ahash(pengine, async_req);
  1707. break;
  1708. case CRYPTO_ALG_TYPE_AEAD:
  1709. ret = _qcrypto_process_aead(pengine, async_req);
  1710. break;
  1711. default:
  1712. ret = -EINVAL;
  1713. };
  1714. pengine->total_req++;
  1715. if (ret) {
  1716. arsp->res = ret;
  1717. pengine->err_req++;
  1718. spin_lock_irqsave(&cp->lock, flags);
  1719. pengine->req = NULL;
  1720. pengine->arsp = NULL;
  1721. spin_unlock_irqrestore(&cp->lock, flags);
  1722. if (type == CRYPTO_ALG_TYPE_ABLKCIPHER)
  1723. pstat->ablk_cipher_op_fail++;
  1724. else
  1725. if (type == CRYPTO_ALG_TYPE_AHASH)
  1726. pstat->sha_op_fail++;
  1727. else
  1728. pstat->aead_op_fail++;
  1729. _qcrypto_tfm_complete(cp, type, tfm_ctx);
  1730. goto again;
  1731. };
  1732. return ret;
  1733. }
  1734. static struct crypto_engine *_avail_eng(struct crypto_priv *cp)
  1735. {
  1736. struct crypto_engine *pe = NULL;
  1737. list_for_each_entry(pe, &cp->engine_list, elist) {
  1738. if (pe->req == NULL)
  1739. return pe;
  1740. }
  1741. return NULL;
  1742. }
  1743. static int _qcrypto_queue_req(struct crypto_priv *cp,
  1744. struct crypto_engine *pengine,
  1745. struct crypto_async_request *req)
  1746. {
  1747. int ret;
  1748. unsigned long flags;
  1749. if (cp->platform_support.ce_shared) {
  1750. ret = qcrypto_lock_ce(cp);
  1751. if (ret)
  1752. return ret;
  1753. }
  1754. spin_lock_irqsave(&cp->lock, flags);
  1755. if (pengine) {
  1756. ret = crypto_enqueue_request(&pengine->req_queue, req);
  1757. } else {
  1758. ret = crypto_enqueue_request(&cp->req_queue, req);
  1759. pengine = _avail_eng(cp);
  1760. }
  1761. if (pengine) {
  1762. switch (pengine->bw_state) {
  1763. case BUS_NO_BANDWIDTH:
  1764. if (pengine->high_bw_req == false) {
  1765. qcrypto_ce_bw_allocate_req(pengine);
  1766. pengine->high_bw_req = true;
  1767. }
  1768. pengine = NULL;
  1769. break;
  1770. case BUS_HAS_BANDWIDTH:
  1771. break;
  1772. case BUS_BANDWIDTH_RELEASING:
  1773. pengine->high_bw_req = true;
  1774. pengine = NULL;
  1775. break;
  1776. case BUS_BANDWIDTH_ALLOCATING:
  1777. pengine = NULL;
  1778. break;
  1779. case BUS_SUSPENDED:
  1780. case BUS_SUSPENDING:
  1781. default:
  1782. pengine = NULL;
  1783. break;
  1784. }
  1785. }
  1786. spin_unlock_irqrestore(&cp->lock, flags);
  1787. if (pengine)
  1788. _start_qcrypto_process(cp, pengine);
  1789. return ret;
  1790. }
  1791. static int _qcrypto_enc_aes_ecb(struct ablkcipher_request *req)
  1792. {
  1793. struct qcrypto_cipher_req_ctx *rctx;
  1794. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  1795. struct crypto_priv *cp = ctx->cp;
  1796. struct crypto_stat *pstat;
  1797. pstat = &_qcrypto_stat;
  1798. BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
  1799. CRYPTO_ALG_TYPE_ABLKCIPHER);
  1800. #ifdef QCRYPTO_DEBUG
  1801. dev_info(&ctx->pengine->pdev->dev, "_qcrypto_enc_aes_ecb: %p\n", req);
  1802. #endif
  1803. rctx = ablkcipher_request_ctx(req);
  1804. rctx->aead = 0;
  1805. rctx->alg = CIPHER_ALG_AES;
  1806. rctx->dir = QCE_ENCRYPT;
  1807. rctx->mode = QCE_MODE_ECB;
  1808. pstat->ablk_cipher_aes_enc++;
  1809. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  1810. };
  1811. static int _qcrypto_enc_aes_cbc(struct ablkcipher_request *req)
  1812. {
  1813. struct qcrypto_cipher_req_ctx *rctx;
  1814. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  1815. struct crypto_priv *cp = ctx->cp;
  1816. struct crypto_stat *pstat;
  1817. pstat = &_qcrypto_stat;
  1818. BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
  1819. CRYPTO_ALG_TYPE_ABLKCIPHER);
  1820. #ifdef QCRYPTO_DEBUG
  1821. dev_info(&ctx->pengine->pdev->dev, "_qcrypto_enc_aes_cbc: %p\n", req);
  1822. #endif
  1823. rctx = ablkcipher_request_ctx(req);
  1824. rctx->aead = 0;
  1825. rctx->alg = CIPHER_ALG_AES;
  1826. rctx->dir = QCE_ENCRYPT;
  1827. rctx->mode = QCE_MODE_CBC;
  1828. pstat->ablk_cipher_aes_enc++;
  1829. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  1830. };
  1831. static int _qcrypto_enc_aes_ctr(struct ablkcipher_request *req)
  1832. {
  1833. struct qcrypto_cipher_req_ctx *rctx;
  1834. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  1835. struct crypto_priv *cp = ctx->cp;
  1836. struct crypto_stat *pstat;
  1837. pstat = &_qcrypto_stat;
  1838. BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
  1839. CRYPTO_ALG_TYPE_ABLKCIPHER);
  1840. #ifdef QCRYPTO_DEBUG
  1841. dev_info(&ctx->pengine->pdev->dev, "_qcrypto_enc_aes_ctr: %p\n", req);
  1842. #endif
  1843. rctx = ablkcipher_request_ctx(req);
  1844. rctx->aead = 0;
  1845. rctx->alg = CIPHER_ALG_AES;
  1846. rctx->dir = QCE_ENCRYPT;
  1847. rctx->mode = QCE_MODE_CTR;
  1848. pstat->ablk_cipher_aes_enc++;
  1849. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  1850. };
  1851. static int _qcrypto_enc_aes_xts(struct ablkcipher_request *req)
  1852. {
  1853. struct qcrypto_cipher_req_ctx *rctx;
  1854. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  1855. struct crypto_priv *cp = ctx->cp;
  1856. struct crypto_stat *pstat;
  1857. pstat = &_qcrypto_stat;
  1858. BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
  1859. CRYPTO_ALG_TYPE_ABLKCIPHER);
  1860. rctx = ablkcipher_request_ctx(req);
  1861. rctx->aead = 0;
  1862. rctx->alg = CIPHER_ALG_AES;
  1863. rctx->dir = QCE_ENCRYPT;
  1864. rctx->mode = QCE_MODE_XTS;
  1865. pstat->ablk_cipher_aes_enc++;
  1866. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  1867. };
  1868. static int _qcrypto_aead_encrypt_aes_ccm(struct aead_request *req)
  1869. {
  1870. struct qcrypto_cipher_req_ctx *rctx;
  1871. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  1872. struct crypto_priv *cp = ctx->cp;
  1873. struct crypto_stat *pstat;
  1874. if ((ctx->authsize > 16) || (ctx->authsize < 4) || (ctx->authsize & 1))
  1875. return -EINVAL;
  1876. if ((ctx->auth_key_len != AES_KEYSIZE_128) &&
  1877. (ctx->auth_key_len != AES_KEYSIZE_256))
  1878. return -EINVAL;
  1879. pstat = &_qcrypto_stat;
  1880. rctx = aead_request_ctx(req);
  1881. rctx->aead = 1;
  1882. rctx->alg = CIPHER_ALG_AES;
  1883. rctx->dir = QCE_ENCRYPT;
  1884. rctx->mode = QCE_MODE_CCM;
  1885. rctx->iv = req->iv;
  1886. pstat->aead_ccm_aes_enc++;
  1887. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  1888. }
  1889. static int _qcrypto_aead_rfc4309_enc_aes_ccm(struct aead_request *req)
  1890. {
  1891. struct qcrypto_cipher_req_ctx *rctx;
  1892. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  1893. struct crypto_priv *cp = ctx->cp;
  1894. struct crypto_stat *pstat;
  1895. pstat = &_qcrypto_stat;
  1896. rctx = aead_request_ctx(req);
  1897. rctx->aead = 1;
  1898. rctx->alg = CIPHER_ALG_AES;
  1899. rctx->dir = QCE_ENCRYPT;
  1900. rctx->mode = QCE_MODE_CCM;
  1901. memset(rctx->rfc4309_iv, 0, sizeof(rctx->rfc4309_iv));
  1902. rctx->rfc4309_iv[0] = 3; /* L -1 */
  1903. memcpy(&rctx->rfc4309_iv[1], ctx->ccm4309_nonce, 3);
  1904. memcpy(&rctx->rfc4309_iv[4], req->iv, 8);
  1905. rctx->iv = rctx->rfc4309_iv;
  1906. pstat->aead_rfc4309_ccm_aes_enc++;
  1907. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  1908. }
  1909. static int _qcrypto_enc_des_ecb(struct ablkcipher_request *req)
  1910. {
  1911. struct qcrypto_cipher_req_ctx *rctx;
  1912. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  1913. struct crypto_priv *cp = ctx->cp;
  1914. struct crypto_stat *pstat;
  1915. pstat = &_qcrypto_stat;
  1916. BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
  1917. CRYPTO_ALG_TYPE_ABLKCIPHER);
  1918. rctx = ablkcipher_request_ctx(req);
  1919. rctx->aead = 0;
  1920. rctx->alg = CIPHER_ALG_DES;
  1921. rctx->dir = QCE_ENCRYPT;
  1922. rctx->mode = QCE_MODE_ECB;
  1923. pstat->ablk_cipher_des_enc++;
  1924. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  1925. };
  1926. static int _qcrypto_enc_des_cbc(struct ablkcipher_request *req)
  1927. {
  1928. struct qcrypto_cipher_req_ctx *rctx;
  1929. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  1930. struct crypto_priv *cp = ctx->cp;
  1931. struct crypto_stat *pstat;
  1932. pstat = &_qcrypto_stat;
  1933. BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
  1934. CRYPTO_ALG_TYPE_ABLKCIPHER);
  1935. rctx = ablkcipher_request_ctx(req);
  1936. rctx->aead = 0;
  1937. rctx->alg = CIPHER_ALG_DES;
  1938. rctx->dir = QCE_ENCRYPT;
  1939. rctx->mode = QCE_MODE_CBC;
  1940. pstat->ablk_cipher_des_enc++;
  1941. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  1942. };
  1943. static int _qcrypto_enc_3des_ecb(struct ablkcipher_request *req)
  1944. {
  1945. struct qcrypto_cipher_req_ctx *rctx;
  1946. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  1947. struct crypto_priv *cp = ctx->cp;
  1948. struct crypto_stat *pstat;
  1949. pstat = &_qcrypto_stat;
  1950. BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
  1951. CRYPTO_ALG_TYPE_ABLKCIPHER);
  1952. rctx = ablkcipher_request_ctx(req);
  1953. rctx->aead = 0;
  1954. rctx->alg = CIPHER_ALG_3DES;
  1955. rctx->dir = QCE_ENCRYPT;
  1956. rctx->mode = QCE_MODE_ECB;
  1957. pstat->ablk_cipher_3des_enc++;
  1958. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  1959. };
  1960. static int _qcrypto_enc_3des_cbc(struct ablkcipher_request *req)
  1961. {
  1962. struct qcrypto_cipher_req_ctx *rctx;
  1963. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  1964. struct crypto_priv *cp = ctx->cp;
  1965. struct crypto_stat *pstat;
  1966. pstat = &_qcrypto_stat;
  1967. BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
  1968. CRYPTO_ALG_TYPE_ABLKCIPHER);
  1969. rctx = ablkcipher_request_ctx(req);
  1970. rctx->aead = 0;
  1971. rctx->alg = CIPHER_ALG_3DES;
  1972. rctx->dir = QCE_ENCRYPT;
  1973. rctx->mode = QCE_MODE_CBC;
  1974. pstat->ablk_cipher_3des_enc++;
  1975. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  1976. };
  1977. static int _qcrypto_dec_aes_ecb(struct ablkcipher_request *req)
  1978. {
  1979. struct qcrypto_cipher_req_ctx *rctx;
  1980. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  1981. struct crypto_priv *cp = ctx->cp;
  1982. struct crypto_stat *pstat;
  1983. pstat = &_qcrypto_stat;
  1984. BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
  1985. CRYPTO_ALG_TYPE_ABLKCIPHER);
  1986. #ifdef QCRYPTO_DEBUG
  1987. dev_info(&ctx->pengine->pdev->dev, "_qcrypto_dec_aes_ecb: %p\n", req);
  1988. #endif
  1989. rctx = ablkcipher_request_ctx(req);
  1990. rctx->aead = 0;
  1991. rctx->alg = CIPHER_ALG_AES;
  1992. rctx->dir = QCE_DECRYPT;
  1993. rctx->mode = QCE_MODE_ECB;
  1994. pstat->ablk_cipher_aes_dec++;
  1995. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  1996. };
  1997. static int _qcrypto_dec_aes_cbc(struct ablkcipher_request *req)
  1998. {
  1999. struct qcrypto_cipher_req_ctx *rctx;
  2000. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2001. struct crypto_priv *cp = ctx->cp;
  2002. struct crypto_stat *pstat;
  2003. pstat = &_qcrypto_stat;
  2004. BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2005. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2006. #ifdef QCRYPTO_DEBUG
  2007. dev_info(&ctx->pengine->pdev->dev, "_qcrypto_dec_aes_cbc: %p\n", req);
  2008. #endif
  2009. rctx = ablkcipher_request_ctx(req);
  2010. rctx->aead = 0;
  2011. rctx->alg = CIPHER_ALG_AES;
  2012. rctx->dir = QCE_DECRYPT;
  2013. rctx->mode = QCE_MODE_CBC;
  2014. pstat->ablk_cipher_aes_dec++;
  2015. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2016. };
  2017. static int _qcrypto_dec_aes_ctr(struct ablkcipher_request *req)
  2018. {
  2019. struct qcrypto_cipher_req_ctx *rctx;
  2020. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2021. struct crypto_priv *cp = ctx->cp;
  2022. struct crypto_stat *pstat;
  2023. pstat = &_qcrypto_stat;
  2024. BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2025. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2026. #ifdef QCRYPTO_DEBUG
  2027. dev_info(&ctx->pengine->pdev->dev, "_qcrypto_dec_aes_ctr: %p\n", req);
  2028. #endif
  2029. rctx = ablkcipher_request_ctx(req);
  2030. rctx->aead = 0;
  2031. rctx->alg = CIPHER_ALG_AES;
  2032. rctx->mode = QCE_MODE_CTR;
  2033. /* Note. There is no such thing as aes/counter mode, decrypt */
  2034. rctx->dir = QCE_ENCRYPT;
  2035. pstat->ablk_cipher_aes_dec++;
  2036. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2037. };
  2038. static int _qcrypto_dec_des_ecb(struct ablkcipher_request *req)
  2039. {
  2040. struct qcrypto_cipher_req_ctx *rctx;
  2041. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2042. struct crypto_priv *cp = ctx->cp;
  2043. struct crypto_stat *pstat;
  2044. pstat = &_qcrypto_stat;
  2045. BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2046. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2047. rctx = ablkcipher_request_ctx(req);
  2048. rctx->aead = 0;
  2049. rctx->alg = CIPHER_ALG_DES;
  2050. rctx->dir = QCE_DECRYPT;
  2051. rctx->mode = QCE_MODE_ECB;
  2052. pstat->ablk_cipher_des_dec++;
  2053. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2054. };
  2055. static int _qcrypto_dec_des_cbc(struct ablkcipher_request *req)
  2056. {
  2057. struct qcrypto_cipher_req_ctx *rctx;
  2058. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2059. struct crypto_priv *cp = ctx->cp;
  2060. struct crypto_stat *pstat;
  2061. pstat = &_qcrypto_stat;
  2062. BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2063. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2064. rctx = ablkcipher_request_ctx(req);
  2065. rctx->aead = 0;
  2066. rctx->alg = CIPHER_ALG_DES;
  2067. rctx->dir = QCE_DECRYPT;
  2068. rctx->mode = QCE_MODE_CBC;
  2069. pstat->ablk_cipher_des_dec++;
  2070. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2071. };
  2072. static int _qcrypto_dec_3des_ecb(struct ablkcipher_request *req)
  2073. {
  2074. struct qcrypto_cipher_req_ctx *rctx;
  2075. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2076. struct crypto_priv *cp = ctx->cp;
  2077. struct crypto_stat *pstat;
  2078. pstat = &_qcrypto_stat;
  2079. BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2080. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2081. rctx = ablkcipher_request_ctx(req);
  2082. rctx->aead = 0;
  2083. rctx->alg = CIPHER_ALG_3DES;
  2084. rctx->dir = QCE_DECRYPT;
  2085. rctx->mode = QCE_MODE_ECB;
  2086. pstat->ablk_cipher_3des_dec++;
  2087. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2088. };
  2089. static int _qcrypto_dec_3des_cbc(struct ablkcipher_request *req)
  2090. {
  2091. struct qcrypto_cipher_req_ctx *rctx;
  2092. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2093. struct crypto_priv *cp = ctx->cp;
  2094. struct crypto_stat *pstat;
  2095. pstat = &_qcrypto_stat;
  2096. BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2097. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2098. rctx = ablkcipher_request_ctx(req);
  2099. rctx->aead = 0;
  2100. rctx->alg = CIPHER_ALG_3DES;
  2101. rctx->dir = QCE_DECRYPT;
  2102. rctx->mode = QCE_MODE_CBC;
  2103. pstat->ablk_cipher_3des_dec++;
  2104. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2105. };
  2106. static int _qcrypto_dec_aes_xts(struct ablkcipher_request *req)
  2107. {
  2108. struct qcrypto_cipher_req_ctx *rctx;
  2109. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2110. struct crypto_priv *cp = ctx->cp;
  2111. struct crypto_stat *pstat;
  2112. pstat = &_qcrypto_stat;
  2113. BUG_ON(crypto_tfm_alg_type(req->base.tfm) !=
  2114. CRYPTO_ALG_TYPE_ABLKCIPHER);
  2115. rctx = ablkcipher_request_ctx(req);
  2116. rctx->aead = 0;
  2117. rctx->alg = CIPHER_ALG_AES;
  2118. rctx->mode = QCE_MODE_XTS;
  2119. rctx->dir = QCE_DECRYPT;
  2120. pstat->ablk_cipher_aes_dec++;
  2121. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2122. };
  2123. static int _qcrypto_aead_decrypt_aes_ccm(struct aead_request *req)
  2124. {
  2125. struct qcrypto_cipher_req_ctx *rctx;
  2126. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2127. struct crypto_priv *cp = ctx->cp;
  2128. struct crypto_stat *pstat;
  2129. if ((ctx->authsize > 16) || (ctx->authsize < 4) || (ctx->authsize & 1))
  2130. return -EINVAL;
  2131. if ((ctx->auth_key_len != AES_KEYSIZE_128) &&
  2132. (ctx->auth_key_len != AES_KEYSIZE_256))
  2133. return -EINVAL;
  2134. pstat = &_qcrypto_stat;
  2135. rctx = aead_request_ctx(req);
  2136. rctx->aead = 1;
  2137. rctx->alg = CIPHER_ALG_AES;
  2138. rctx->dir = QCE_DECRYPT;
  2139. rctx->mode = QCE_MODE_CCM;
  2140. rctx->iv = req->iv;
  2141. pstat->aead_ccm_aes_dec++;
  2142. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2143. }
  2144. static int _qcrypto_aead_rfc4309_dec_aes_ccm(struct aead_request *req)
  2145. {
  2146. struct qcrypto_cipher_req_ctx *rctx;
  2147. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2148. struct crypto_priv *cp = ctx->cp;
  2149. struct crypto_stat *pstat;
  2150. pstat = &_qcrypto_stat;
  2151. rctx = aead_request_ctx(req);
  2152. rctx->aead = 1;
  2153. rctx->alg = CIPHER_ALG_AES;
  2154. rctx->dir = QCE_DECRYPT;
  2155. rctx->mode = QCE_MODE_CCM;
  2156. memset(rctx->rfc4309_iv, 0, sizeof(rctx->rfc4309_iv));
  2157. rctx->rfc4309_iv[0] = 3; /* L -1 */
  2158. memcpy(&rctx->rfc4309_iv[1], ctx->ccm4309_nonce, 3);
  2159. memcpy(&rctx->rfc4309_iv[4], req->iv, 8);
  2160. rctx->iv = rctx->rfc4309_iv;
  2161. pstat->aead_rfc4309_ccm_aes_dec++;
  2162. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2163. }
  2164. static int _qcrypto_aead_setauthsize(struct crypto_aead *authenc,
  2165. unsigned int authsize)
  2166. {
  2167. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(authenc);
  2168. ctx->authsize = authsize;
  2169. return 0;
  2170. }
  2171. static int _qcrypto_aead_ccm_setauthsize(struct crypto_aead *authenc,
  2172. unsigned int authsize)
  2173. {
  2174. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(authenc);
  2175. switch (authsize) {
  2176. case 4:
  2177. case 6:
  2178. case 8:
  2179. case 10:
  2180. case 12:
  2181. case 14:
  2182. case 16:
  2183. break;
  2184. default:
  2185. return -EINVAL;
  2186. }
  2187. ctx->authsize = authsize;
  2188. return 0;
  2189. }
  2190. static int _qcrypto_aead_rfc4309_ccm_setauthsize(struct crypto_aead *authenc,
  2191. unsigned int authsize)
  2192. {
  2193. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(authenc);
  2194. switch (authsize) {
  2195. case 8:
  2196. case 12:
  2197. case 16:
  2198. break;
  2199. default:
  2200. return -EINVAL;
  2201. }
  2202. ctx->authsize = authsize;
  2203. return 0;
  2204. }
  2205. static int _qcrypto_aead_setkey(struct crypto_aead *tfm, const u8 *key,
  2206. unsigned int keylen)
  2207. {
  2208. struct qcrypto_cipher_ctx *ctx = crypto_aead_ctx(tfm);
  2209. struct rtattr *rta = (struct rtattr *)key;
  2210. struct crypto_authenc_key_param *param;
  2211. if (!RTA_OK(rta, keylen))
  2212. goto badkey;
  2213. if (rta->rta_type != CRYPTO_AUTHENC_KEYA_PARAM)
  2214. goto badkey;
  2215. if (RTA_PAYLOAD(rta) < sizeof(*param))
  2216. goto badkey;
  2217. param = RTA_DATA(rta);
  2218. ctx->enc_key_len = be32_to_cpu(param->enckeylen);
  2219. key += RTA_ALIGN(rta->rta_len);
  2220. keylen -= RTA_ALIGN(rta->rta_len);
  2221. if (keylen < ctx->enc_key_len)
  2222. goto badkey;
  2223. ctx->auth_key_len = keylen - ctx->enc_key_len;
  2224. if (ctx->enc_key_len >= QCRYPTO_MAX_KEY_SIZE ||
  2225. ctx->auth_key_len >= QCRYPTO_MAX_KEY_SIZE)
  2226. goto badkey;
  2227. memset(ctx->auth_key, 0, QCRYPTO_MAX_KEY_SIZE);
  2228. memcpy(ctx->enc_key, key + ctx->auth_key_len, ctx->enc_key_len);
  2229. memcpy(ctx->auth_key, key, ctx->auth_key_len);
  2230. return 0;
  2231. badkey:
  2232. ctx->enc_key_len = 0;
  2233. crypto_aead_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  2234. return -EINVAL;
  2235. }
  2236. static int _qcrypto_aead_ccm_setkey(struct crypto_aead *aead, const u8 *key,
  2237. unsigned int keylen)
  2238. {
  2239. struct crypto_tfm *tfm = crypto_aead_tfm(aead);
  2240. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  2241. struct crypto_priv *cp = ctx->cp;
  2242. switch (keylen) {
  2243. case AES_KEYSIZE_128:
  2244. case AES_KEYSIZE_256:
  2245. break;
  2246. case AES_KEYSIZE_192:
  2247. if (cp->ce_support.aes_key_192)
  2248. break;
  2249. default:
  2250. ctx->enc_key_len = 0;
  2251. crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN);
  2252. return -EINVAL;
  2253. };
  2254. ctx->enc_key_len = keylen;
  2255. memcpy(ctx->enc_key, key, keylen);
  2256. ctx->auth_key_len = keylen;
  2257. memcpy(ctx->auth_key, key, keylen);
  2258. return 0;
  2259. }
  2260. static int _qcrypto_aead_rfc4309_ccm_setkey(struct crypto_aead *aead,
  2261. const u8 *key, unsigned int key_len)
  2262. {
  2263. struct crypto_tfm *tfm = crypto_aead_tfm(aead);
  2264. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(tfm);
  2265. int ret;
  2266. if (key_len < QCRYPTO_CCM4309_NONCE_LEN)
  2267. return -EINVAL;
  2268. key_len -= QCRYPTO_CCM4309_NONCE_LEN;
  2269. memcpy(ctx->ccm4309_nonce, key + key_len, QCRYPTO_CCM4309_NONCE_LEN);
  2270. ret = _qcrypto_aead_ccm_setkey(aead, key, key_len);
  2271. return ret;
  2272. };
  2273. static int _qcrypto_aead_encrypt_aes_cbc(struct aead_request *req)
  2274. {
  2275. struct qcrypto_cipher_req_ctx *rctx;
  2276. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2277. struct crypto_priv *cp = ctx->cp;
  2278. struct crypto_stat *pstat;
  2279. pstat = &_qcrypto_stat;
  2280. #ifdef QCRYPTO_DEBUG
  2281. dev_info(&ctx->pengine->pdev->dev,
  2282. "_qcrypto_aead_encrypt_aes_cbc: %p\n", req);
  2283. #endif
  2284. rctx = aead_request_ctx(req);
  2285. rctx->aead = 1;
  2286. rctx->alg = CIPHER_ALG_AES;
  2287. rctx->dir = QCE_ENCRYPT;
  2288. rctx->mode = QCE_MODE_CBC;
  2289. rctx->iv = req->iv;
  2290. pstat->aead_sha1_aes_enc++;
  2291. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2292. }
  2293. static int _qcrypto_aead_decrypt_aes_cbc(struct aead_request *req)
  2294. {
  2295. struct qcrypto_cipher_req_ctx *rctx;
  2296. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2297. struct crypto_priv *cp = ctx->cp;
  2298. struct crypto_stat *pstat;
  2299. pstat = &_qcrypto_stat;
  2300. #ifdef QCRYPTO_DEBUG
  2301. dev_info(&ctx->pengine->pdev->dev,
  2302. "_qcrypto_aead_decrypt_aes_cbc: %p\n", req);
  2303. #endif
  2304. rctx = aead_request_ctx(req);
  2305. rctx->aead = 1;
  2306. rctx->alg = CIPHER_ALG_AES;
  2307. rctx->dir = QCE_DECRYPT;
  2308. rctx->mode = QCE_MODE_CBC;
  2309. rctx->iv = req->iv;
  2310. pstat->aead_sha1_aes_dec++;
  2311. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2312. }
  2313. static int _qcrypto_aead_givencrypt_aes_cbc(struct aead_givcrypt_request *req)
  2314. {
  2315. struct aead_request *areq = &req->areq;
  2316. struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
  2317. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(areq->base.tfm);
  2318. struct crypto_priv *cp = ctx->cp;
  2319. struct qcrypto_cipher_req_ctx *rctx;
  2320. struct crypto_stat *pstat;
  2321. pstat = &_qcrypto_stat;
  2322. rctx = aead_request_ctx(areq);
  2323. rctx->aead = 1;
  2324. rctx->alg = CIPHER_ALG_AES;
  2325. rctx->dir = QCE_ENCRYPT;
  2326. rctx->mode = QCE_MODE_CBC;
  2327. rctx->iv = req->giv; /* generated iv */
  2328. memcpy(req->giv, ctx->iv, crypto_aead_ivsize(authenc));
  2329. /* avoid consecutive packets going out with same IV */
  2330. *(__be64 *)req->giv ^= cpu_to_be64(req->seq);
  2331. pstat->aead_sha1_aes_enc++;
  2332. return _qcrypto_queue_req(cp, ctx->pengine, &areq->base);
  2333. }
  2334. #ifdef QCRYPTO_AEAD_AES_CTR
  2335. static int _qcrypto_aead_encrypt_aes_ctr(struct aead_request *req)
  2336. {
  2337. struct qcrypto_cipher_req_ctx *rctx;
  2338. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2339. struct crypto_priv *cp = ctx->cp;
  2340. struct crypto_stat *pstat;
  2341. pstat = &_qcrypto_stat;
  2342. rctx = aead_request_ctx(req);
  2343. rctx->aead = 1;
  2344. rctx->alg = CIPHER_ALG_AES;
  2345. rctx->dir = QCE_ENCRYPT;
  2346. rctx->mode = QCE_MODE_CTR;
  2347. rctx->iv = req->iv;
  2348. pstat->aead_sha1_aes_enc++;
  2349. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2350. }
  2351. static int _qcrypto_aead_decrypt_aes_ctr(struct aead_request *req)
  2352. {
  2353. struct qcrypto_cipher_req_ctx *rctx;
  2354. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2355. struct crypto_priv *cp = ctx->cp;
  2356. struct crypto_stat *pstat;
  2357. pstat = &_qcrypto_stat;
  2358. rctx = aead_request_ctx(req);
  2359. rctx->aead = 1;
  2360. rctx->alg = CIPHER_ALG_AES;
  2361. /* Note. There is no such thing as aes/counter mode, decrypt */
  2362. rctx->dir = QCE_ENCRYPT;
  2363. rctx->mode = QCE_MODE_CTR;
  2364. rctx->iv = req->iv;
  2365. pstat->aead_sha1_aes_dec++;
  2366. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2367. }
  2368. static int _qcrypto_aead_givencrypt_aes_ctr(struct aead_givcrypt_request *req)
  2369. {
  2370. struct aead_request *areq = &req->areq;
  2371. struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
  2372. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(areq->base.tfm);
  2373. struct crypto_priv *cp = ctx->cp;
  2374. struct qcrypto_cipher_req_ctx *rctx;
  2375. struct crypto_stat *pstat;
  2376. pstat = &_qcrypto_stat;
  2377. rctx = aead_request_ctx(areq);
  2378. rctx->aead = 1;
  2379. rctx->alg = CIPHER_ALG_AES;
  2380. rctx->dir = QCE_ENCRYPT;
  2381. rctx->mode = QCE_MODE_CTR;
  2382. rctx->iv = req->giv; /* generated iv */
  2383. memcpy(req->giv, ctx->iv, crypto_aead_ivsize(authenc));
  2384. /* avoid consecutive packets going out with same IV */
  2385. *(__be64 *)req->giv ^= cpu_to_be64(req->seq);
  2386. pstat->aead_sha1_aes_enc++;
  2387. return _qcrypto_queue_req(cp, ctx->pengine, &areq->base);
  2388. };
  2389. #endif /* QCRYPTO_AEAD_AES_CTR */
  2390. static int _qcrypto_aead_encrypt_des_cbc(struct aead_request *req)
  2391. {
  2392. struct qcrypto_cipher_req_ctx *rctx;
  2393. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2394. struct crypto_priv *cp = ctx->cp;
  2395. struct crypto_stat *pstat;
  2396. pstat = &_qcrypto_stat;
  2397. rctx = aead_request_ctx(req);
  2398. rctx->aead = 1;
  2399. rctx->alg = CIPHER_ALG_DES;
  2400. rctx->dir = QCE_ENCRYPT;
  2401. rctx->mode = QCE_MODE_CBC;
  2402. rctx->iv = req->iv;
  2403. pstat->aead_sha1_des_enc++;
  2404. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2405. }
  2406. static int _qcrypto_aead_decrypt_des_cbc(struct aead_request *req)
  2407. {
  2408. struct qcrypto_cipher_req_ctx *rctx;
  2409. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2410. struct crypto_priv *cp = ctx->cp;
  2411. struct crypto_stat *pstat;
  2412. pstat = &_qcrypto_stat;
  2413. rctx = aead_request_ctx(req);
  2414. rctx->aead = 1;
  2415. rctx->alg = CIPHER_ALG_DES;
  2416. rctx->dir = QCE_DECRYPT;
  2417. rctx->mode = QCE_MODE_CBC;
  2418. rctx->iv = req->iv;
  2419. pstat->aead_sha1_des_dec++;
  2420. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2421. }
  2422. static int _qcrypto_aead_givencrypt_des_cbc(struct aead_givcrypt_request *req)
  2423. {
  2424. struct aead_request *areq = &req->areq;
  2425. struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
  2426. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(areq->base.tfm);
  2427. struct crypto_priv *cp = ctx->cp;
  2428. struct qcrypto_cipher_req_ctx *rctx;
  2429. struct crypto_stat *pstat;
  2430. pstat = &_qcrypto_stat;
  2431. rctx = aead_request_ctx(areq);
  2432. rctx->aead = 1;
  2433. rctx->alg = CIPHER_ALG_DES;
  2434. rctx->dir = QCE_ENCRYPT;
  2435. rctx->mode = QCE_MODE_CBC;
  2436. rctx->iv = req->giv; /* generated iv */
  2437. memcpy(req->giv, ctx->iv, crypto_aead_ivsize(authenc));
  2438. /* avoid consecutive packets going out with same IV */
  2439. *(__be64 *)req->giv ^= cpu_to_be64(req->seq);
  2440. pstat->aead_sha1_des_enc++;
  2441. return _qcrypto_queue_req(cp, ctx->pengine, &areq->base);
  2442. }
  2443. static int _qcrypto_aead_encrypt_3des_cbc(struct aead_request *req)
  2444. {
  2445. struct qcrypto_cipher_req_ctx *rctx;
  2446. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2447. struct crypto_priv *cp = ctx->cp;
  2448. struct crypto_stat *pstat;
  2449. pstat = &_qcrypto_stat;
  2450. rctx = aead_request_ctx(req);
  2451. rctx->aead = 1;
  2452. rctx->alg = CIPHER_ALG_3DES;
  2453. rctx->dir = QCE_ENCRYPT;
  2454. rctx->mode = QCE_MODE_CBC;
  2455. rctx->iv = req->iv;
  2456. pstat->aead_sha1_3des_enc++;
  2457. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2458. }
  2459. static int _qcrypto_aead_decrypt_3des_cbc(struct aead_request *req)
  2460. {
  2461. struct qcrypto_cipher_req_ctx *rctx;
  2462. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  2463. struct crypto_priv *cp = ctx->cp;
  2464. struct crypto_stat *pstat;
  2465. pstat = &_qcrypto_stat;
  2466. rctx = aead_request_ctx(req);
  2467. rctx->aead = 1;
  2468. rctx->alg = CIPHER_ALG_3DES;
  2469. rctx->dir = QCE_DECRYPT;
  2470. rctx->mode = QCE_MODE_CBC;
  2471. rctx->iv = req->iv;
  2472. pstat->aead_sha1_3des_dec++;
  2473. return _qcrypto_queue_req(cp, ctx->pengine, &req->base);
  2474. }
  2475. static int _qcrypto_aead_givencrypt_3des_cbc(struct aead_givcrypt_request *req)
  2476. {
  2477. struct aead_request *areq = &req->areq;
  2478. struct crypto_aead *authenc = crypto_aead_reqtfm(areq);
  2479. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(areq->base.tfm);
  2480. struct crypto_priv *cp = ctx->cp;
  2481. struct qcrypto_cipher_req_ctx *rctx;
  2482. struct crypto_stat *pstat;
  2483. pstat = &_qcrypto_stat;
  2484. rctx = aead_request_ctx(areq);
  2485. rctx->aead = 1;
  2486. rctx->alg = CIPHER_ALG_3DES;
  2487. rctx->dir = QCE_ENCRYPT;
  2488. rctx->mode = QCE_MODE_CBC;
  2489. rctx->iv = req->giv; /* generated iv */
  2490. memcpy(req->giv, ctx->iv, crypto_aead_ivsize(authenc));
  2491. /* avoid consecutive packets going out with same IV */
  2492. *(__be64 *)req->giv ^= cpu_to_be64(req->seq);
  2493. pstat->aead_sha1_3des_enc++;
  2494. return _qcrypto_queue_req(cp, ctx->pengine, &areq->base);
  2495. }
  2496. static int _sha_init(struct ahash_request *req)
  2497. {
  2498. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  2499. rctx->first_blk = 1;
  2500. rctx->last_blk = 0;
  2501. rctx->byte_count[0] = 0;
  2502. rctx->byte_count[1] = 0;
  2503. rctx->byte_count[2] = 0;
  2504. rctx->byte_count[3] = 0;
  2505. rctx->trailing_buf_len = 0;
  2506. rctx->count = 0;
  2507. return 0;
  2508. };
  2509. static int _sha1_init(struct ahash_request *req)
  2510. {
  2511. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  2512. struct crypto_stat *pstat;
  2513. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  2514. pstat = &_qcrypto_stat;
  2515. _sha_init(req);
  2516. sha_ctx->alg = QCE_HASH_SHA1;
  2517. memset(&rctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
  2518. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  2519. SHA1_DIGEST_SIZE);
  2520. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  2521. pstat->sha1_digest++;
  2522. return 0;
  2523. };
  2524. static int _sha256_init(struct ahash_request *req)
  2525. {
  2526. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  2527. struct crypto_stat *pstat;
  2528. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  2529. pstat = &_qcrypto_stat;
  2530. _sha_init(req);
  2531. sha_ctx->alg = QCE_HASH_SHA256;
  2532. memset(&rctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
  2533. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  2534. SHA256_DIGEST_SIZE);
  2535. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  2536. pstat->sha256_digest++;
  2537. return 0;
  2538. };
  2539. static int _sha1_export(struct ahash_request *req, void *out)
  2540. {
  2541. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  2542. struct sha1_state *out_ctx = (struct sha1_state *)out;
  2543. out_ctx->count = rctx->count;
  2544. _byte_stream_to_words(out_ctx->state, rctx->digest, SHA1_DIGEST_SIZE);
  2545. memcpy(out_ctx->buffer, rctx->trailing_buf, SHA1_BLOCK_SIZE);
  2546. return 0;
  2547. };
  2548. static int _sha1_hmac_export(struct ahash_request *req, void *out)
  2549. {
  2550. return _sha1_export(req, out);
  2551. }
  2552. /* crypto hw padding constant for hmac first operation */
  2553. #define HMAC_PADDING 64
  2554. static int __sha1_import_common(struct ahash_request *req, const void *in,
  2555. bool hmac)
  2556. {
  2557. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  2558. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  2559. struct sha1_state *in_ctx = (struct sha1_state *)in;
  2560. u64 hw_count = in_ctx->count;
  2561. rctx->count = in_ctx->count;
  2562. memcpy(rctx->trailing_buf, in_ctx->buffer, SHA1_BLOCK_SIZE);
  2563. if (in_ctx->count <= SHA1_BLOCK_SIZE) {
  2564. rctx->first_blk = 1;
  2565. } else {
  2566. rctx->first_blk = 0;
  2567. /*
  2568. * For hmac, there is a hardware padding done
  2569. * when first is set. So the byte_count will be
  2570. * incremened by 64 after the operstion of first
  2571. */
  2572. if (hmac)
  2573. hw_count += HMAC_PADDING;
  2574. }
  2575. rctx->byte_count[0] = (uint32_t)(hw_count & 0xFFFFFFC0);
  2576. rctx->byte_count[1] = (uint32_t)(hw_count >> 32);
  2577. _words_to_byte_stream(in_ctx->state, rctx->digest, sha_ctx->diglen);
  2578. rctx->trailing_buf_len = (uint32_t)(in_ctx->count &
  2579. (SHA1_BLOCK_SIZE-1));
  2580. return 0;
  2581. }
  2582. static int _sha1_import(struct ahash_request *req, const void *in)
  2583. {
  2584. return __sha1_import_common(req, in, false);
  2585. }
  2586. static int _sha1_hmac_import(struct ahash_request *req, const void *in)
  2587. {
  2588. return __sha1_import_common(req, in, true);
  2589. }
  2590. static int _sha256_export(struct ahash_request *req, void *out)
  2591. {
  2592. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  2593. struct sha256_state *out_ctx = (struct sha256_state *)out;
  2594. out_ctx->count = rctx->count;
  2595. _byte_stream_to_words(out_ctx->state, rctx->digest, SHA256_DIGEST_SIZE);
  2596. memcpy(out_ctx->buf, rctx->trailing_buf, SHA256_BLOCK_SIZE);
  2597. return 0;
  2598. };
  2599. static int _sha256_hmac_export(struct ahash_request *req, void *out)
  2600. {
  2601. return _sha256_export(req, out);
  2602. }
  2603. static int __sha256_import_common(struct ahash_request *req, const void *in,
  2604. bool hmac)
  2605. {
  2606. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  2607. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  2608. struct sha256_state *in_ctx = (struct sha256_state *)in;
  2609. u64 hw_count = in_ctx->count;
  2610. rctx->count = in_ctx->count;
  2611. memcpy(rctx->trailing_buf, in_ctx->buf, SHA256_BLOCK_SIZE);
  2612. if (in_ctx->count <= SHA256_BLOCK_SIZE) {
  2613. rctx->first_blk = 1;
  2614. } else {
  2615. rctx->first_blk = 0;
  2616. /*
  2617. * for hmac, there is a hardware padding done
  2618. * when first is set. So the byte_count will be
  2619. * incremened by 64 after the operstion of first
  2620. */
  2621. if (hmac)
  2622. hw_count += HMAC_PADDING;
  2623. }
  2624. rctx->byte_count[0] = (uint32_t)(hw_count & 0xFFFFFFC0);
  2625. rctx->byte_count[1] = (uint32_t)(hw_count >> 32);
  2626. _words_to_byte_stream(in_ctx->state, rctx->digest, sha_ctx->diglen);
  2627. rctx->trailing_buf_len = (uint32_t)(in_ctx->count &
  2628. (SHA256_BLOCK_SIZE-1));
  2629. return 0;
  2630. }
  2631. static int _sha256_import(struct ahash_request *req, const void *in)
  2632. {
  2633. return __sha256_import_common(req, in, false);
  2634. }
  2635. static int _sha256_hmac_import(struct ahash_request *req, const void *in)
  2636. {
  2637. return __sha256_import_common(req, in, true);
  2638. }
  2639. static int _copy_source(struct ahash_request *req)
  2640. {
  2641. struct qcrypto_sha_req_ctx *srctx = NULL;
  2642. uint32_t bytes = 0;
  2643. uint32_t num_sg = 0;
  2644. srctx = ahash_request_ctx(req);
  2645. srctx->orig_src = req->src;
  2646. srctx->data = kzalloc((req->nbytes + 64), GFP_ATOMIC);
  2647. if (srctx->data == NULL) {
  2648. pr_err("Mem Alloc fail rctx->data, err %ld for 0x%x\n",
  2649. PTR_ERR(srctx->data), (req->nbytes + 64));
  2650. return -ENOMEM;
  2651. }
  2652. num_sg = qcrypto_count_sg(req->src, req->nbytes);
  2653. bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, srctx->data,
  2654. req->nbytes);
  2655. if (bytes != req->nbytes)
  2656. pr_warn("bytes copied=0x%x bytes to copy= 0x%x", bytes,
  2657. req->nbytes);
  2658. sg_set_buf(&srctx->dsg, srctx->data,
  2659. req->nbytes);
  2660. sg_mark_end(&srctx->dsg);
  2661. req->src = &srctx->dsg;
  2662. return 0;
  2663. }
  2664. static int _sha_update(struct ahash_request *req, uint32_t sha_block_size)
  2665. {
  2666. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  2667. struct crypto_priv *cp = sha_ctx->cp;
  2668. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  2669. uint32_t total, len, num_sg;
  2670. struct scatterlist *sg_last;
  2671. uint8_t *k_src = NULL;
  2672. uint32_t sha_pad_len = 0;
  2673. uint32_t trailing_buf_len = 0;
  2674. uint32_t nbytes;
  2675. uint32_t offset = 0;
  2676. uint32_t bytes = 0;
  2677. uint8_t *staging;
  2678. int ret = 0;
  2679. /* check for trailing buffer from previous updates and append it */
  2680. total = req->nbytes + rctx->trailing_buf_len;
  2681. len = req->nbytes;
  2682. if (total <= sha_block_size) {
  2683. k_src = &rctx->trailing_buf[rctx->trailing_buf_len];
  2684. num_sg = qcrypto_count_sg(req->src, len);
  2685. bytes = qcrypto_sg_copy_to_buffer(req->src, num_sg, k_src, len);
  2686. rctx->trailing_buf_len = total;
  2687. return 0;
  2688. }
  2689. /* save the original req structure fields*/
  2690. rctx->src = req->src;
  2691. rctx->nbytes = req->nbytes;
  2692. staging = (uint8_t *) ALIGN(((unsigned int)rctx->staging_dmabuf),
  2693. L1_CACHE_BYTES);
  2694. memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
  2695. k_src = &rctx->trailing_buf[0];
  2696. /* get new trailing buffer */
  2697. sha_pad_len = ALIGN(total, sha_block_size) - total;
  2698. trailing_buf_len = sha_block_size - sha_pad_len;
  2699. offset = req->nbytes - trailing_buf_len;
  2700. if (offset != req->nbytes)
  2701. scatterwalk_map_and_copy(k_src, req->src, offset,
  2702. trailing_buf_len, 0);
  2703. nbytes = total - trailing_buf_len;
  2704. num_sg = qcrypto_count_sg(req->src, req->nbytes);
  2705. len = rctx->trailing_buf_len;
  2706. sg_last = req->src;
  2707. while (len < nbytes) {
  2708. if ((len + sg_last->length) > nbytes)
  2709. break;
  2710. len += sg_last->length;
  2711. sg_last = scatterwalk_sg_next(sg_last);
  2712. }
  2713. if (rctx->trailing_buf_len) {
  2714. if (cp->ce_support.aligned_only) {
  2715. rctx->data2 = kzalloc((req->nbytes + 64), GFP_ATOMIC);
  2716. if (rctx->data2 == NULL) {
  2717. pr_err("Mem Alloc fail srctx->data2, err %ld\n",
  2718. PTR_ERR(rctx->data2));
  2719. return -ENOMEM;
  2720. }
  2721. memcpy(rctx->data2, staging,
  2722. rctx->trailing_buf_len);
  2723. memcpy((rctx->data2 + rctx->trailing_buf_len),
  2724. rctx->data, req->src->length);
  2725. kzfree(rctx->data);
  2726. rctx->data = rctx->data2;
  2727. sg_set_buf(&rctx->sg[0], rctx->data,
  2728. (rctx->trailing_buf_len +
  2729. req->src->length));
  2730. req->src = rctx->sg;
  2731. sg_mark_end(&rctx->sg[0]);
  2732. } else {
  2733. sg_mark_end(sg_last);
  2734. memset(rctx->sg, 0, sizeof(rctx->sg));
  2735. sg_set_buf(&rctx->sg[0], staging,
  2736. rctx->trailing_buf_len);
  2737. sg_mark_end(&rctx->sg[1]);
  2738. sg_chain(rctx->sg, 2, req->src);
  2739. req->src = rctx->sg;
  2740. }
  2741. } else
  2742. sg_mark_end(sg_last);
  2743. req->nbytes = nbytes;
  2744. rctx->trailing_buf_len = trailing_buf_len;
  2745. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  2746. return ret;
  2747. };
  2748. static int _sha1_update(struct ahash_request *req)
  2749. {
  2750. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  2751. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  2752. struct crypto_priv *cp = sha_ctx->cp;
  2753. if (cp->ce_support.aligned_only) {
  2754. if (_copy_source(req))
  2755. return -ENOMEM;
  2756. }
  2757. rctx->count += req->nbytes;
  2758. return _sha_update(req, SHA1_BLOCK_SIZE);
  2759. }
  2760. static int _sha256_update(struct ahash_request *req)
  2761. {
  2762. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  2763. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  2764. struct crypto_priv *cp = sha_ctx->cp;
  2765. if (cp->ce_support.aligned_only) {
  2766. if (_copy_source(req))
  2767. return -ENOMEM;
  2768. }
  2769. rctx->count += req->nbytes;
  2770. return _sha_update(req, SHA256_BLOCK_SIZE);
  2771. }
  2772. static int _sha_final(struct ahash_request *req, uint32_t sha_block_size)
  2773. {
  2774. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  2775. struct crypto_priv *cp = sha_ctx->cp;
  2776. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  2777. int ret = 0;
  2778. uint8_t *staging;
  2779. if (cp->ce_support.aligned_only) {
  2780. if (_copy_source(req))
  2781. return -ENOMEM;
  2782. }
  2783. rctx->last_blk = 1;
  2784. /* save the original req structure fields*/
  2785. rctx->src = req->src;
  2786. rctx->nbytes = req->nbytes;
  2787. staging = (uint8_t *) ALIGN(((unsigned int)rctx->staging_dmabuf),
  2788. L1_CACHE_BYTES);
  2789. memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
  2790. sg_set_buf(&rctx->sg[0], staging, rctx->trailing_buf_len);
  2791. sg_mark_end(&rctx->sg[0]);
  2792. req->src = &rctx->sg[0];
  2793. req->nbytes = rctx->trailing_buf_len;
  2794. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  2795. return ret;
  2796. };
  2797. static int _sha1_final(struct ahash_request *req)
  2798. {
  2799. return _sha_final(req, SHA1_BLOCK_SIZE);
  2800. }
  2801. static int _sha256_final(struct ahash_request *req)
  2802. {
  2803. return _sha_final(req, SHA256_BLOCK_SIZE);
  2804. }
  2805. static int _sha_digest(struct ahash_request *req)
  2806. {
  2807. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  2808. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  2809. struct crypto_priv *cp = sha_ctx->cp;
  2810. int ret = 0;
  2811. if (cp->ce_support.aligned_only) {
  2812. if (_copy_source(req))
  2813. return -ENOMEM;
  2814. }
  2815. /* save the original req structure fields*/
  2816. rctx->src = req->src;
  2817. rctx->nbytes = req->nbytes;
  2818. rctx->first_blk = 1;
  2819. rctx->last_blk = 1;
  2820. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  2821. return ret;
  2822. }
  2823. static int _sha1_digest(struct ahash_request *req)
  2824. {
  2825. _sha1_init(req);
  2826. return _sha_digest(req);
  2827. }
  2828. static int _sha256_digest(struct ahash_request *req)
  2829. {
  2830. _sha256_init(req);
  2831. return _sha_digest(req);
  2832. }
  2833. static void _crypto_sha_hmac_ahash_req_complete(
  2834. struct crypto_async_request *req, int err)
  2835. {
  2836. struct completion *ahash_req_complete = req->data;
  2837. if (err == -EINPROGRESS)
  2838. return;
  2839. complete(ahash_req_complete);
  2840. }
  2841. static int _sha_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  2842. unsigned int len)
  2843. {
  2844. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
  2845. uint8_t *in_buf;
  2846. int ret = 0;
  2847. struct scatterlist sg;
  2848. struct ahash_request *ahash_req;
  2849. struct completion ahash_req_complete;
  2850. ahash_req = ahash_request_alloc(tfm, GFP_KERNEL);
  2851. if (ahash_req == NULL)
  2852. return -ENOMEM;
  2853. init_completion(&ahash_req_complete);
  2854. ahash_request_set_callback(ahash_req,
  2855. CRYPTO_TFM_REQ_MAY_BACKLOG,
  2856. _crypto_sha_hmac_ahash_req_complete,
  2857. &ahash_req_complete);
  2858. crypto_ahash_clear_flags(tfm, ~0);
  2859. in_buf = kzalloc(len + 64, GFP_KERNEL);
  2860. if (in_buf == NULL) {
  2861. pr_err("qcrypto Can't Allocate mem: in_buf, error %ld\n",
  2862. PTR_ERR(in_buf));
  2863. ahash_request_free(ahash_req);
  2864. return -ENOMEM;
  2865. }
  2866. memcpy(in_buf, key, len);
  2867. sg_set_buf(&sg, in_buf, len);
  2868. sg_mark_end(&sg);
  2869. ahash_request_set_crypt(ahash_req, &sg,
  2870. &sha_ctx->authkey[0], len);
  2871. if (sha_ctx->alg == QCE_HASH_SHA1)
  2872. ret = _sha1_digest(ahash_req);
  2873. else
  2874. ret = _sha256_digest(ahash_req);
  2875. if (ret == -EINPROGRESS || ret == -EBUSY) {
  2876. ret =
  2877. wait_for_completion_interruptible(
  2878. &ahash_req_complete);
  2879. INIT_COMPLETION(sha_ctx->ahash_req_complete);
  2880. }
  2881. kzfree(in_buf);
  2882. ahash_request_free(ahash_req);
  2883. return ret;
  2884. }
  2885. static int _sha1_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  2886. unsigned int len)
  2887. {
  2888. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
  2889. int ret = 0;
  2890. memset(&sha_ctx->authkey[0], 0, SHA1_BLOCK_SIZE);
  2891. if (len <= SHA1_BLOCK_SIZE) {
  2892. memcpy(&sha_ctx->authkey[0], key, len);
  2893. sha_ctx->authkey_in_len = len;
  2894. } else {
  2895. sha_ctx->alg = QCE_HASH_SHA1;
  2896. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  2897. ret = _sha_hmac_setkey(tfm, key, len);
  2898. if (ret)
  2899. pr_err("SHA1 hmac setkey failed\n");
  2900. sha_ctx->authkey_in_len = SHA1_BLOCK_SIZE;
  2901. }
  2902. return ret;
  2903. }
  2904. static int _sha256_hmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  2905. unsigned int len)
  2906. {
  2907. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(&tfm->base);
  2908. int ret = 0;
  2909. memset(&sha_ctx->authkey[0], 0, SHA256_BLOCK_SIZE);
  2910. if (len <= SHA256_BLOCK_SIZE) {
  2911. memcpy(&sha_ctx->authkey[0], key, len);
  2912. sha_ctx->authkey_in_len = len;
  2913. } else {
  2914. sha_ctx->alg = QCE_HASH_SHA256;
  2915. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  2916. ret = _sha_hmac_setkey(tfm, key, len);
  2917. if (ret)
  2918. pr_err("SHA256 hmac setkey failed\n");
  2919. sha_ctx->authkey_in_len = SHA256_BLOCK_SIZE;
  2920. }
  2921. return ret;
  2922. }
  2923. static int _sha_hmac_init_ihash(struct ahash_request *req,
  2924. uint32_t sha_block_size)
  2925. {
  2926. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  2927. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  2928. int i;
  2929. for (i = 0; i < sha_block_size; i++)
  2930. rctx->trailing_buf[i] = sha_ctx->authkey[i] ^ 0x36;
  2931. rctx->trailing_buf_len = sha_block_size;
  2932. return 0;
  2933. }
  2934. static int _sha1_hmac_init(struct ahash_request *req)
  2935. {
  2936. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  2937. struct crypto_priv *cp = sha_ctx->cp;
  2938. struct crypto_stat *pstat;
  2939. int ret = 0;
  2940. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  2941. pstat = &_qcrypto_stat;
  2942. pstat->sha1_hmac_digest++;
  2943. _sha_init(req);
  2944. memset(&rctx->trailing_buf[0], 0x00, SHA1_BLOCK_SIZE);
  2945. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  2946. SHA1_DIGEST_SIZE);
  2947. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  2948. if (cp->ce_support.sha_hmac)
  2949. sha_ctx->alg = QCE_HASH_SHA1_HMAC;
  2950. else {
  2951. sha_ctx->alg = QCE_HASH_SHA1;
  2952. ret = _sha_hmac_init_ihash(req, SHA1_BLOCK_SIZE);
  2953. }
  2954. return ret;
  2955. }
  2956. static int _sha256_hmac_init(struct ahash_request *req)
  2957. {
  2958. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  2959. struct crypto_priv *cp = sha_ctx->cp;
  2960. struct crypto_stat *pstat;
  2961. int ret = 0;
  2962. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  2963. pstat = &_qcrypto_stat;
  2964. pstat->sha256_hmac_digest++;
  2965. _sha_init(req);
  2966. memset(&rctx->trailing_buf[0], 0x00, SHA256_BLOCK_SIZE);
  2967. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  2968. SHA256_DIGEST_SIZE);
  2969. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  2970. if (cp->ce_support.sha_hmac)
  2971. sha_ctx->alg = QCE_HASH_SHA256_HMAC;
  2972. else {
  2973. sha_ctx->alg = QCE_HASH_SHA256;
  2974. ret = _sha_hmac_init_ihash(req, SHA256_BLOCK_SIZE);
  2975. }
  2976. return ret;
  2977. }
  2978. static int _sha1_hmac_update(struct ahash_request *req)
  2979. {
  2980. return _sha1_update(req);
  2981. }
  2982. static int _sha256_hmac_update(struct ahash_request *req)
  2983. {
  2984. return _sha256_update(req);
  2985. }
  2986. static int _sha_hmac_outer_hash(struct ahash_request *req,
  2987. uint32_t sha_digest_size, uint32_t sha_block_size)
  2988. {
  2989. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  2990. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  2991. struct crypto_priv *cp = sha_ctx->cp;
  2992. int i;
  2993. uint8_t *staging;
  2994. uint8_t *p;
  2995. staging = (uint8_t *) ALIGN(((unsigned int)rctx->staging_dmabuf),
  2996. L1_CACHE_BYTES);
  2997. p = staging;
  2998. for (i = 0; i < sha_block_size; i++)
  2999. *p++ = sha_ctx->authkey[i] ^ 0x5c;
  3000. memcpy(p, &rctx->digest[0], sha_digest_size);
  3001. sg_set_buf(&rctx->sg[0], staging, sha_block_size +
  3002. sha_digest_size);
  3003. sg_mark_end(&rctx->sg[0]);
  3004. /* save the original req structure fields*/
  3005. rctx->src = req->src;
  3006. rctx->nbytes = req->nbytes;
  3007. req->src = &rctx->sg[0];
  3008. req->nbytes = sha_block_size + sha_digest_size;
  3009. _sha_init(req);
  3010. if (sha_ctx->alg == QCE_HASH_SHA1) {
  3011. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3012. SHA1_DIGEST_SIZE);
  3013. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3014. } else {
  3015. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3016. SHA256_DIGEST_SIZE);
  3017. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3018. }
  3019. rctx->last_blk = 1;
  3020. return _qcrypto_queue_req(cp, sha_ctx->pengine, &req->base);
  3021. }
  3022. static int _sha_hmac_inner_hash(struct ahash_request *req,
  3023. uint32_t sha_digest_size, uint32_t sha_block_size)
  3024. {
  3025. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3026. struct ahash_request *areq = sha_ctx->ahash_req;
  3027. struct crypto_priv *cp = sha_ctx->cp;
  3028. int ret = 0;
  3029. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3030. uint8_t *staging;
  3031. staging = (uint8_t *) ALIGN(((unsigned int)rctx->staging_dmabuf),
  3032. L1_CACHE_BYTES);
  3033. memcpy(staging, rctx->trailing_buf, rctx->trailing_buf_len);
  3034. sg_set_buf(&rctx->sg[0], staging, rctx->trailing_buf_len);
  3035. sg_mark_end(&rctx->sg[0]);
  3036. ahash_request_set_crypt(areq, &rctx->sg[0], &rctx->digest[0],
  3037. rctx->trailing_buf_len);
  3038. rctx->last_blk = 1;
  3039. ret = _qcrypto_queue_req(cp, sha_ctx->pengine, &areq->base);
  3040. if (ret == -EINPROGRESS || ret == -EBUSY) {
  3041. ret =
  3042. wait_for_completion_interruptible(&sha_ctx->ahash_req_complete);
  3043. INIT_COMPLETION(sha_ctx->ahash_req_complete);
  3044. }
  3045. return ret;
  3046. }
  3047. static int _sha1_hmac_final(struct ahash_request *req)
  3048. {
  3049. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3050. struct crypto_priv *cp = sha_ctx->cp;
  3051. int ret = 0;
  3052. if (cp->ce_support.sha_hmac)
  3053. return _sha_final(req, SHA1_BLOCK_SIZE);
  3054. else {
  3055. ret = _sha_hmac_inner_hash(req, SHA1_DIGEST_SIZE,
  3056. SHA1_BLOCK_SIZE);
  3057. if (ret)
  3058. return ret;
  3059. return _sha_hmac_outer_hash(req, SHA1_DIGEST_SIZE,
  3060. SHA1_BLOCK_SIZE);
  3061. }
  3062. }
  3063. static int _sha256_hmac_final(struct ahash_request *req)
  3064. {
  3065. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3066. struct crypto_priv *cp = sha_ctx->cp;
  3067. int ret = 0;
  3068. if (cp->ce_support.sha_hmac)
  3069. return _sha_final(req, SHA256_BLOCK_SIZE);
  3070. else {
  3071. ret = _sha_hmac_inner_hash(req, SHA256_DIGEST_SIZE,
  3072. SHA256_BLOCK_SIZE);
  3073. if (ret)
  3074. return ret;
  3075. return _sha_hmac_outer_hash(req, SHA256_DIGEST_SIZE,
  3076. SHA256_BLOCK_SIZE);
  3077. }
  3078. return 0;
  3079. }
  3080. static int _sha1_hmac_digest(struct ahash_request *req)
  3081. {
  3082. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3083. struct crypto_stat *pstat;
  3084. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3085. pstat = &_qcrypto_stat;
  3086. pstat->sha1_hmac_digest++;
  3087. _sha_init(req);
  3088. memcpy(&rctx->digest[0], &_std_init_vector_sha1_uint8[0],
  3089. SHA1_DIGEST_SIZE);
  3090. sha_ctx->diglen = SHA1_DIGEST_SIZE;
  3091. sha_ctx->alg = QCE_HASH_SHA1_HMAC;
  3092. return _sha_digest(req);
  3093. }
  3094. static int _sha256_hmac_digest(struct ahash_request *req)
  3095. {
  3096. struct qcrypto_sha_ctx *sha_ctx = crypto_tfm_ctx(req->base.tfm);
  3097. struct crypto_stat *pstat;
  3098. struct qcrypto_sha_req_ctx *rctx = ahash_request_ctx(req);
  3099. pstat = &_qcrypto_stat;
  3100. pstat->sha256_hmac_digest++;
  3101. _sha_init(req);
  3102. memcpy(&rctx->digest[0], &_std_init_vector_sha256_uint8[0],
  3103. SHA256_DIGEST_SIZE);
  3104. sha_ctx->diglen = SHA256_DIGEST_SIZE;
  3105. sha_ctx->alg = QCE_HASH_SHA256_HMAC;
  3106. return _sha_digest(req);
  3107. }
  3108. static int _qcrypto_prefix_alg_cra_name(char cra_name[], unsigned int size)
  3109. {
  3110. char new_cra_name[CRYPTO_MAX_ALG_NAME] = "qcom-";
  3111. if (size >= CRYPTO_MAX_ALG_NAME - strlen("qcom-"))
  3112. return -EINVAL;
  3113. strlcat(new_cra_name, cra_name, CRYPTO_MAX_ALG_NAME);
  3114. strlcpy(cra_name, new_cra_name, CRYPTO_MAX_ALG_NAME);
  3115. return 0;
  3116. }
  3117. /*
  3118. * Fill up fips_selftest_data structure
  3119. */
  3120. static void _qcrypto_fips_selftest_d(struct fips_selftest_data *selftest_d,
  3121. struct ce_hw_support *ce_support,
  3122. char *prefix)
  3123. {
  3124. strlcpy(selftest_d->algo_prefix, prefix, CRYPTO_MAX_ALG_NAME);
  3125. selftest_d->prefix_ahash_algo = ce_support->use_sw_ahash_algo;
  3126. selftest_d->prefix_hmac_algo = ce_support->use_sw_hmac_algo;
  3127. selftest_d->prefix_aes_xts_algo = ce_support->use_sw_aes_xts_algo;
  3128. selftest_d->prefix_aes_cbc_ecb_ctr_algo =
  3129. ce_support->use_sw_aes_cbc_ecb_ctr_algo;
  3130. selftest_d->prefix_aead_algo = ce_support->use_sw_aead_algo;
  3131. selftest_d->ce_device = ce_support->ce_device;
  3132. }
  3133. int qcrypto_cipher_set_device(struct ablkcipher_request *req, unsigned int dev)
  3134. {
  3135. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3136. struct crypto_priv *cp = ctx->cp;
  3137. struct crypto_engine *pengine = NULL;
  3138. pengine = _qrypto_find_pengine_device(cp, dev);
  3139. if (pengine == NULL)
  3140. return -ENODEV;
  3141. ctx->pengine = pengine;
  3142. return 0;
  3143. };
  3144. EXPORT_SYMBOL(qcrypto_cipher_set_device);
  3145. int qcrypto_aead_set_device(struct aead_request *req, unsigned int dev)
  3146. {
  3147. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3148. struct crypto_priv *cp = ctx->cp;
  3149. struct crypto_engine *pengine = NULL;
  3150. pengine = _qrypto_find_pengine_device(cp, dev);
  3151. if (pengine == NULL)
  3152. return -ENODEV;
  3153. ctx->pengine = pengine;
  3154. return 0;
  3155. };
  3156. EXPORT_SYMBOL(qcrypto_aead_set_device);
  3157. int qcrypto_ahash_set_device(struct ahash_request *req, unsigned int dev)
  3158. {
  3159. struct qcrypto_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3160. struct crypto_priv *cp = ctx->cp;
  3161. struct crypto_engine *pengine = NULL;
  3162. pengine = _qrypto_find_pengine_device(cp, dev);
  3163. if (pengine == NULL)
  3164. return -ENODEV;
  3165. ctx->pengine = pengine;
  3166. return 0;
  3167. };
  3168. EXPORT_SYMBOL(qcrypto_ahash_set_device);
  3169. int qcrypto_cipher_set_flag(struct ablkcipher_request *req, unsigned int flags)
  3170. {
  3171. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3172. struct crypto_priv *cp = ctx->cp;
  3173. if ((flags & QCRYPTO_CTX_USE_HW_KEY) &&
  3174. (cp->platform_support.hw_key_support == false)) {
  3175. pr_err("%s HW key usage not supported\n", __func__);
  3176. return -EINVAL;
  3177. }
  3178. if (((flags | ctx->flags) & QCRYPTO_CTX_KEY_MASK) ==
  3179. QCRYPTO_CTX_KEY_MASK) {
  3180. pr_err("%s Cannot set all key flags\n", __func__);
  3181. return -EINVAL;
  3182. }
  3183. ctx->flags |= flags;
  3184. return 0;
  3185. };
  3186. EXPORT_SYMBOL(qcrypto_cipher_set_flag);
  3187. int qcrypto_aead_set_flag(struct aead_request *req, unsigned int flags)
  3188. {
  3189. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3190. struct crypto_priv *cp = ctx->cp;
  3191. if ((flags & QCRYPTO_CTX_USE_HW_KEY) &&
  3192. (cp->platform_support.hw_key_support == false)) {
  3193. pr_err("%s HW key usage not supported\n", __func__);
  3194. return -EINVAL;
  3195. }
  3196. if (((flags | ctx->flags) & QCRYPTO_CTX_KEY_MASK) ==
  3197. QCRYPTO_CTX_KEY_MASK) {
  3198. pr_err("%s Cannot set all key flags\n", __func__);
  3199. return -EINVAL;
  3200. }
  3201. ctx->flags |= flags;
  3202. return 0;
  3203. };
  3204. EXPORT_SYMBOL(qcrypto_aead_set_flag);
  3205. int qcrypto_ahash_set_flag(struct ahash_request *req, unsigned int flags)
  3206. {
  3207. struct qcrypto_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3208. struct crypto_priv *cp = ctx->cp;
  3209. if ((flags & QCRYPTO_CTX_USE_HW_KEY) &&
  3210. (cp->platform_support.hw_key_support == false)) {
  3211. pr_err("%s HW key usage not supported\n", __func__);
  3212. return -EINVAL;
  3213. }
  3214. if (((flags | ctx->flags) & QCRYPTO_CTX_KEY_MASK) ==
  3215. QCRYPTO_CTX_KEY_MASK) {
  3216. pr_err("%s Cannot set all key flags\n", __func__);
  3217. return -EINVAL;
  3218. }
  3219. ctx->flags |= flags;
  3220. return 0;
  3221. };
  3222. EXPORT_SYMBOL(qcrypto_ahash_set_flag);
  3223. int qcrypto_cipher_clear_flag(struct ablkcipher_request *req,
  3224. unsigned int flags)
  3225. {
  3226. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3227. ctx->flags &= ~flags;
  3228. return 0;
  3229. };
  3230. EXPORT_SYMBOL(qcrypto_cipher_clear_flag);
  3231. int qcrypto_aead_clear_flag(struct aead_request *req, unsigned int flags)
  3232. {
  3233. struct qcrypto_cipher_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3234. ctx->flags &= ~flags;
  3235. return 0;
  3236. };
  3237. EXPORT_SYMBOL(qcrypto_aead_clear_flag);
  3238. int qcrypto_ahash_clear_flag(struct ahash_request *req, unsigned int flags)
  3239. {
  3240. struct qcrypto_sha_ctx *ctx = crypto_tfm_ctx(req->base.tfm);
  3241. ctx->flags &= ~flags;
  3242. return 0;
  3243. };
  3244. EXPORT_SYMBOL(qcrypto_ahash_clear_flag);
  3245. static struct ahash_alg _qcrypto_ahash_algos[] = {
  3246. {
  3247. .init = _sha1_init,
  3248. .update = _sha1_update,
  3249. .final = _sha1_final,
  3250. .export = _sha1_export,
  3251. .import = _sha1_import,
  3252. .digest = _sha1_digest,
  3253. .halg = {
  3254. .digestsize = SHA1_DIGEST_SIZE,
  3255. .statesize = sizeof(struct sha1_state),
  3256. .base = {
  3257. .cra_name = "sha1",
  3258. .cra_driver_name = "qcrypto-sha1",
  3259. .cra_priority = 300,
  3260. .cra_flags = CRYPTO_ALG_TYPE_AHASH |
  3261. CRYPTO_ALG_ASYNC,
  3262. .cra_blocksize = SHA1_BLOCK_SIZE,
  3263. .cra_ctxsize =
  3264. sizeof(struct qcrypto_sha_ctx),
  3265. .cra_alignmask = 0,
  3266. .cra_type = &crypto_ahash_type,
  3267. .cra_module = THIS_MODULE,
  3268. .cra_init = _qcrypto_ahash_cra_init,
  3269. .cra_exit = _qcrypto_ahash_cra_exit,
  3270. },
  3271. },
  3272. },
  3273. {
  3274. .init = _sha256_init,
  3275. .update = _sha256_update,
  3276. .final = _sha256_final,
  3277. .export = _sha256_export,
  3278. .import = _sha256_import,
  3279. .digest = _sha256_digest,
  3280. .halg = {
  3281. .digestsize = SHA256_DIGEST_SIZE,
  3282. .statesize = sizeof(struct sha256_state),
  3283. .base = {
  3284. .cra_name = "sha256",
  3285. .cra_driver_name = "qcrypto-sha256",
  3286. .cra_priority = 300,
  3287. .cra_flags = CRYPTO_ALG_TYPE_AHASH |
  3288. CRYPTO_ALG_ASYNC,
  3289. .cra_blocksize = SHA256_BLOCK_SIZE,
  3290. .cra_ctxsize =
  3291. sizeof(struct qcrypto_sha_ctx),
  3292. .cra_alignmask = 0,
  3293. .cra_type = &crypto_ahash_type,
  3294. .cra_module = THIS_MODULE,
  3295. .cra_init = _qcrypto_ahash_cra_init,
  3296. .cra_exit = _qcrypto_ahash_cra_exit,
  3297. },
  3298. },
  3299. },
  3300. };
  3301. static struct ahash_alg _qcrypto_sha_hmac_algos[] = {
  3302. {
  3303. .init = _sha1_hmac_init,
  3304. .update = _sha1_hmac_update,
  3305. .final = _sha1_hmac_final,
  3306. .export = _sha1_hmac_export,
  3307. .import = _sha1_hmac_import,
  3308. .digest = _sha1_hmac_digest,
  3309. .setkey = _sha1_hmac_setkey,
  3310. .halg = {
  3311. .digestsize = SHA1_DIGEST_SIZE,
  3312. .statesize = sizeof(struct sha1_state),
  3313. .base = {
  3314. .cra_name = "hmac(sha1)",
  3315. .cra_driver_name = "qcrypto-hmac-sha1",
  3316. .cra_priority = 300,
  3317. .cra_flags = CRYPTO_ALG_TYPE_AHASH |
  3318. CRYPTO_ALG_ASYNC,
  3319. .cra_blocksize = SHA1_BLOCK_SIZE,
  3320. .cra_ctxsize =
  3321. sizeof(struct qcrypto_sha_ctx),
  3322. .cra_alignmask = 0,
  3323. .cra_type = &crypto_ahash_type,
  3324. .cra_module = THIS_MODULE,
  3325. .cra_init = _qcrypto_ahash_hmac_cra_init,
  3326. .cra_exit = _qcrypto_ahash_cra_exit,
  3327. },
  3328. },
  3329. },
  3330. {
  3331. .init = _sha256_hmac_init,
  3332. .update = _sha256_hmac_update,
  3333. .final = _sha256_hmac_final,
  3334. .export = _sha256_hmac_export,
  3335. .import = _sha256_hmac_import,
  3336. .digest = _sha256_hmac_digest,
  3337. .setkey = _sha256_hmac_setkey,
  3338. .halg = {
  3339. .digestsize = SHA256_DIGEST_SIZE,
  3340. .statesize = sizeof(struct sha256_state),
  3341. .base = {
  3342. .cra_name = "hmac(sha256)",
  3343. .cra_driver_name = "qcrypto-hmac-sha256",
  3344. .cra_priority = 300,
  3345. .cra_flags = CRYPTO_ALG_TYPE_AHASH |
  3346. CRYPTO_ALG_ASYNC,
  3347. .cra_blocksize = SHA256_BLOCK_SIZE,
  3348. .cra_ctxsize =
  3349. sizeof(struct qcrypto_sha_ctx),
  3350. .cra_alignmask = 0,
  3351. .cra_type = &crypto_ahash_type,
  3352. .cra_module = THIS_MODULE,
  3353. .cra_init = _qcrypto_ahash_hmac_cra_init,
  3354. .cra_exit = _qcrypto_ahash_cra_exit,
  3355. },
  3356. },
  3357. },
  3358. };
  3359. static struct crypto_alg _qcrypto_ablk_cipher_algos[] = {
  3360. {
  3361. .cra_name = "ecb(aes)",
  3362. .cra_driver_name = "qcrypto-ecb-aes",
  3363. .cra_priority = 300,
  3364. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  3365. .cra_blocksize = AES_BLOCK_SIZE,
  3366. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3367. .cra_alignmask = 0,
  3368. .cra_type = &crypto_ablkcipher_type,
  3369. .cra_module = THIS_MODULE,
  3370. .cra_init = _qcrypto_cra_ablkcipher_init,
  3371. .cra_exit = _qcrypto_cra_ablkcipher_exit,
  3372. .cra_u = {
  3373. .ablkcipher = {
  3374. .min_keysize = AES_MIN_KEY_SIZE,
  3375. .max_keysize = AES_MAX_KEY_SIZE,
  3376. .setkey = _qcrypto_setkey_aes,
  3377. .encrypt = _qcrypto_enc_aes_ecb,
  3378. .decrypt = _qcrypto_dec_aes_ecb,
  3379. },
  3380. },
  3381. },
  3382. {
  3383. .cra_name = "cbc(aes)",
  3384. .cra_driver_name = "qcrypto-cbc-aes",
  3385. .cra_priority = 300,
  3386. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  3387. .cra_blocksize = AES_BLOCK_SIZE,
  3388. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3389. .cra_alignmask = 0,
  3390. .cra_type = &crypto_ablkcipher_type,
  3391. .cra_module = THIS_MODULE,
  3392. .cra_init = _qcrypto_cra_ablkcipher_init,
  3393. .cra_exit = _qcrypto_cra_ablkcipher_exit,
  3394. .cra_u = {
  3395. .ablkcipher = {
  3396. .ivsize = AES_BLOCK_SIZE,
  3397. .min_keysize = AES_MIN_KEY_SIZE,
  3398. .max_keysize = AES_MAX_KEY_SIZE,
  3399. .setkey = _qcrypto_setkey_aes,
  3400. .encrypt = _qcrypto_enc_aes_cbc,
  3401. .decrypt = _qcrypto_dec_aes_cbc,
  3402. },
  3403. },
  3404. },
  3405. {
  3406. .cra_name = "ctr(aes)",
  3407. .cra_driver_name = "qcrypto-ctr-aes",
  3408. .cra_priority = 300,
  3409. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  3410. .cra_blocksize = AES_BLOCK_SIZE,
  3411. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3412. .cra_alignmask = 0,
  3413. .cra_type = &crypto_ablkcipher_type,
  3414. .cra_module = THIS_MODULE,
  3415. .cra_init = _qcrypto_cra_ablkcipher_init,
  3416. .cra_exit = _qcrypto_cra_ablkcipher_exit,
  3417. .cra_u = {
  3418. .ablkcipher = {
  3419. .ivsize = AES_BLOCK_SIZE,
  3420. .min_keysize = AES_MIN_KEY_SIZE,
  3421. .max_keysize = AES_MAX_KEY_SIZE,
  3422. .setkey = _qcrypto_setkey_aes,
  3423. .encrypt = _qcrypto_enc_aes_ctr,
  3424. .decrypt = _qcrypto_dec_aes_ctr,
  3425. },
  3426. },
  3427. },
  3428. {
  3429. .cra_name = "ecb(des)",
  3430. .cra_driver_name = "qcrypto-ecb-des",
  3431. .cra_priority = 300,
  3432. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  3433. .cra_blocksize = DES_BLOCK_SIZE,
  3434. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3435. .cra_alignmask = 0,
  3436. .cra_type = &crypto_ablkcipher_type,
  3437. .cra_module = THIS_MODULE,
  3438. .cra_init = _qcrypto_cra_ablkcipher_init,
  3439. .cra_exit = _qcrypto_cra_ablkcipher_exit,
  3440. .cra_u = {
  3441. .ablkcipher = {
  3442. .min_keysize = DES_KEY_SIZE,
  3443. .max_keysize = DES_KEY_SIZE,
  3444. .setkey = _qcrypto_setkey_des,
  3445. .encrypt = _qcrypto_enc_des_ecb,
  3446. .decrypt = _qcrypto_dec_des_ecb,
  3447. },
  3448. },
  3449. },
  3450. {
  3451. .cra_name = "cbc(des)",
  3452. .cra_driver_name = "qcrypto-cbc-des",
  3453. .cra_priority = 300,
  3454. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  3455. .cra_blocksize = DES_BLOCK_SIZE,
  3456. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3457. .cra_alignmask = 0,
  3458. .cra_type = &crypto_ablkcipher_type,
  3459. .cra_module = THIS_MODULE,
  3460. .cra_init = _qcrypto_cra_ablkcipher_init,
  3461. .cra_exit = _qcrypto_cra_ablkcipher_exit,
  3462. .cra_u = {
  3463. .ablkcipher = {
  3464. .ivsize = DES_BLOCK_SIZE,
  3465. .min_keysize = DES_KEY_SIZE,
  3466. .max_keysize = DES_KEY_SIZE,
  3467. .setkey = _qcrypto_setkey_des,
  3468. .encrypt = _qcrypto_enc_des_cbc,
  3469. .decrypt = _qcrypto_dec_des_cbc,
  3470. },
  3471. },
  3472. },
  3473. {
  3474. .cra_name = "ecb(des3_ede)",
  3475. .cra_driver_name = "qcrypto-ecb-3des",
  3476. .cra_priority = 300,
  3477. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  3478. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3479. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3480. .cra_alignmask = 0,
  3481. .cra_type = &crypto_ablkcipher_type,
  3482. .cra_module = THIS_MODULE,
  3483. .cra_init = _qcrypto_cra_ablkcipher_init,
  3484. .cra_exit = _qcrypto_cra_ablkcipher_exit,
  3485. .cra_u = {
  3486. .ablkcipher = {
  3487. .min_keysize = DES3_EDE_KEY_SIZE,
  3488. .max_keysize = DES3_EDE_KEY_SIZE,
  3489. .setkey = _qcrypto_setkey_3des,
  3490. .encrypt = _qcrypto_enc_3des_ecb,
  3491. .decrypt = _qcrypto_dec_3des_ecb,
  3492. },
  3493. },
  3494. },
  3495. {
  3496. .cra_name = "cbc(des3_ede)",
  3497. .cra_driver_name = "qcrypto-cbc-3des",
  3498. .cra_priority = 300,
  3499. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  3500. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3501. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3502. .cra_alignmask = 0,
  3503. .cra_type = &crypto_ablkcipher_type,
  3504. .cra_module = THIS_MODULE,
  3505. .cra_init = _qcrypto_cra_ablkcipher_init,
  3506. .cra_exit = _qcrypto_cra_ablkcipher_exit,
  3507. .cra_u = {
  3508. .ablkcipher = {
  3509. .ivsize = DES3_EDE_BLOCK_SIZE,
  3510. .min_keysize = DES3_EDE_KEY_SIZE,
  3511. .max_keysize = DES3_EDE_KEY_SIZE,
  3512. .setkey = _qcrypto_setkey_3des,
  3513. .encrypt = _qcrypto_enc_3des_cbc,
  3514. .decrypt = _qcrypto_dec_3des_cbc,
  3515. },
  3516. },
  3517. },
  3518. };
  3519. static struct crypto_alg _qcrypto_ablk_cipher_xts_algo = {
  3520. .cra_name = "xts(aes)",
  3521. .cra_driver_name = "qcrypto-xts-aes",
  3522. .cra_priority = 300,
  3523. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
  3524. .cra_blocksize = AES_BLOCK_SIZE,
  3525. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3526. .cra_alignmask = 0,
  3527. .cra_type = &crypto_ablkcipher_type,
  3528. .cra_module = THIS_MODULE,
  3529. .cra_init = _qcrypto_cra_ablkcipher_init,
  3530. .cra_exit = _qcrypto_cra_ablkcipher_exit,
  3531. .cra_u = {
  3532. .ablkcipher = {
  3533. .ivsize = AES_BLOCK_SIZE,
  3534. .min_keysize = AES_MIN_KEY_SIZE,
  3535. .max_keysize = AES_MAX_KEY_SIZE,
  3536. .setkey = _qcrypto_setkey_aes_xts,
  3537. .encrypt = _qcrypto_enc_aes_xts,
  3538. .decrypt = _qcrypto_dec_aes_xts,
  3539. },
  3540. },
  3541. };
  3542. static struct crypto_alg _qcrypto_aead_sha1_hmac_algos[] = {
  3543. {
  3544. .cra_name = "authenc(hmac(sha1),cbc(aes))",
  3545. .cra_driver_name = "qcrypto-aead-hmac-sha1-cbc-aes",
  3546. .cra_priority = 300,
  3547. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  3548. .cra_blocksize = AES_BLOCK_SIZE,
  3549. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3550. .cra_alignmask = 0,
  3551. .cra_type = &crypto_aead_type,
  3552. .cra_module = THIS_MODULE,
  3553. .cra_init = _qcrypto_cra_aead_init,
  3554. .cra_exit = _qcrypto_cra_aead_exit,
  3555. .cra_u = {
  3556. .aead = {
  3557. .ivsize = AES_BLOCK_SIZE,
  3558. .maxauthsize = SHA1_DIGEST_SIZE,
  3559. .setkey = _qcrypto_aead_setkey,
  3560. .setauthsize = _qcrypto_aead_setauthsize,
  3561. .encrypt = _qcrypto_aead_encrypt_aes_cbc,
  3562. .decrypt = _qcrypto_aead_decrypt_aes_cbc,
  3563. .givencrypt = _qcrypto_aead_givencrypt_aes_cbc,
  3564. .geniv = "<built-in>",
  3565. }
  3566. }
  3567. },
  3568. #ifdef QCRYPTO_AEAD_AES_CTR
  3569. {
  3570. .cra_name = "authenc(hmac(sha1),ctr(aes))",
  3571. .cra_driver_name = "qcrypto-aead-hmac-sha1-ctr-aes",
  3572. .cra_priority = 300,
  3573. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  3574. .cra_blocksize = AES_BLOCK_SIZE,
  3575. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3576. .cra_alignmask = 0,
  3577. .cra_type = &crypto_aead_type,
  3578. .cra_module = THIS_MODULE,
  3579. .cra_init = _qcrypto_cra_aead_init,
  3580. .cra_exit = _qcrypto_cra_aead_exit,
  3581. .cra_u = {
  3582. .aead = {
  3583. .ivsize = AES_BLOCK_SIZE,
  3584. .maxauthsize = SHA1_DIGEST_SIZE,
  3585. .setkey = _qcrypto_aead_setkey,
  3586. .setauthsize = _qcrypto_aead_setauthsize,
  3587. .encrypt = _qcrypto_aead_encrypt_aes_ctr,
  3588. .decrypt = _qcrypto_aead_decrypt_aes_ctr,
  3589. .givencrypt = _qcrypto_aead_givencrypt_aes_ctr,
  3590. .geniv = "<built-in>",
  3591. }
  3592. }
  3593. },
  3594. #endif /* QCRYPTO_AEAD_AES_CTR */
  3595. {
  3596. .cra_name = "authenc(hmac(sha1),cbc(des))",
  3597. .cra_driver_name = "qcrypto-aead-hmac-sha1-cbc-des",
  3598. .cra_priority = 300,
  3599. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  3600. .cra_blocksize = DES_BLOCK_SIZE,
  3601. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3602. .cra_alignmask = 0,
  3603. .cra_type = &crypto_aead_type,
  3604. .cra_module = THIS_MODULE,
  3605. .cra_init = _qcrypto_cra_aead_init,
  3606. .cra_exit = _qcrypto_cra_aead_exit,
  3607. .cra_u = {
  3608. .aead = {
  3609. .ivsize = DES_BLOCK_SIZE,
  3610. .maxauthsize = SHA1_DIGEST_SIZE,
  3611. .setkey = _qcrypto_aead_setkey,
  3612. .setauthsize = _qcrypto_aead_setauthsize,
  3613. .encrypt = _qcrypto_aead_encrypt_des_cbc,
  3614. .decrypt = _qcrypto_aead_decrypt_des_cbc,
  3615. .givencrypt = _qcrypto_aead_givencrypt_des_cbc,
  3616. .geniv = "<built-in>",
  3617. }
  3618. }
  3619. },
  3620. {
  3621. .cra_name = "authenc(hmac(sha1),cbc(des3_ede))",
  3622. .cra_driver_name = "qcrypto-aead-hmac-sha1-cbc-3des",
  3623. .cra_priority = 300,
  3624. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  3625. .cra_blocksize = DES3_EDE_BLOCK_SIZE,
  3626. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3627. .cra_alignmask = 0,
  3628. .cra_type = &crypto_aead_type,
  3629. .cra_module = THIS_MODULE,
  3630. .cra_init = _qcrypto_cra_aead_init,
  3631. .cra_exit = _qcrypto_cra_aead_exit,
  3632. .cra_u = {
  3633. .aead = {
  3634. .ivsize = DES3_EDE_BLOCK_SIZE,
  3635. .maxauthsize = SHA1_DIGEST_SIZE,
  3636. .setkey = _qcrypto_aead_setkey,
  3637. .setauthsize = _qcrypto_aead_setauthsize,
  3638. .encrypt = _qcrypto_aead_encrypt_3des_cbc,
  3639. .decrypt = _qcrypto_aead_decrypt_3des_cbc,
  3640. .givencrypt = _qcrypto_aead_givencrypt_3des_cbc,
  3641. .geniv = "<built-in>",
  3642. }
  3643. }
  3644. },
  3645. };
  3646. static struct crypto_alg _qcrypto_aead_ccm_algo = {
  3647. .cra_name = "ccm(aes)",
  3648. .cra_driver_name = "qcrypto-aes-ccm",
  3649. .cra_priority = 300,
  3650. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  3651. .cra_blocksize = AES_BLOCK_SIZE,
  3652. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3653. .cra_alignmask = 0,
  3654. .cra_type = &crypto_aead_type,
  3655. .cra_module = THIS_MODULE,
  3656. .cra_init = _qcrypto_cra_aead_init,
  3657. .cra_exit = _qcrypto_cra_aead_exit,
  3658. .cra_u = {
  3659. .aead = {
  3660. .ivsize = AES_BLOCK_SIZE,
  3661. .maxauthsize = AES_BLOCK_SIZE,
  3662. .setkey = _qcrypto_aead_ccm_setkey,
  3663. .setauthsize = _qcrypto_aead_ccm_setauthsize,
  3664. .encrypt = _qcrypto_aead_encrypt_aes_ccm,
  3665. .decrypt = _qcrypto_aead_decrypt_aes_ccm,
  3666. .geniv = "<built-in>",
  3667. }
  3668. }
  3669. };
  3670. static struct crypto_alg _qcrypto_aead_rfc4309_ccm_algo = {
  3671. .cra_name = "rfc4309(ccm(aes))",
  3672. .cra_driver_name = "qcrypto-rfc4309-aes-ccm",
  3673. .cra_priority = 300,
  3674. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  3675. .cra_blocksize = 1,
  3676. .cra_ctxsize = sizeof(struct qcrypto_cipher_ctx),
  3677. .cra_alignmask = 0,
  3678. .cra_type = &crypto_nivaead_type,
  3679. .cra_module = THIS_MODULE,
  3680. .cra_init = _qcrypto_cra_aead_init,
  3681. .cra_exit = _qcrypto_cra_aead_exit,
  3682. .cra_u = {
  3683. .aead = {
  3684. .ivsize = 8,
  3685. .maxauthsize = 16,
  3686. .setkey = _qcrypto_aead_rfc4309_ccm_setkey,
  3687. .setauthsize = _qcrypto_aead_rfc4309_ccm_setauthsize,
  3688. .encrypt = _qcrypto_aead_rfc4309_enc_aes_ccm,
  3689. .decrypt = _qcrypto_aead_rfc4309_dec_aes_ccm,
  3690. .geniv = "seqiv",
  3691. }
  3692. }
  3693. };
  3694. static int _qcrypto_probe(struct platform_device *pdev)
  3695. {
  3696. int rc = 0;
  3697. void *handle;
  3698. struct crypto_priv *cp = &qcrypto_dev;
  3699. int i;
  3700. struct msm_ce_hw_support *platform_support;
  3701. struct crypto_engine *pengine;
  3702. unsigned long flags;
  3703. /* For FIPS140-2 Power on self tests */
  3704. struct fips_selftest_data selftest_d;
  3705. char prefix[10] = "";
  3706. pengine = kzalloc(sizeof(*pengine), GFP_KERNEL);
  3707. if (!pengine) {
  3708. pr_err("qcrypto Memory allocation of q_alg FAIL, error %ld\n",
  3709. PTR_ERR(pengine));
  3710. return -ENOMEM;
  3711. }
  3712. /* open qce */
  3713. handle = qce_open(pdev, &rc);
  3714. if (handle == NULL) {
  3715. kzfree(pengine);
  3716. platform_set_drvdata(pdev, NULL);
  3717. return rc;
  3718. }
  3719. platform_set_drvdata(pdev, pengine);
  3720. pengine->qce = handle;
  3721. pengine->pcp = cp;
  3722. pengine->pdev = pdev;
  3723. pengine->req = NULL;
  3724. pengine->signature = 0xdeadbeef;
  3725. init_timer(&(pengine->bw_reaper_timer));
  3726. INIT_WORK(&pengine->bw_reaper_ws, qcrypto_bw_reaper_work);
  3727. pengine->bw_reaper_timer.function =
  3728. qcrypto_bw_reaper_timer_callback;
  3729. INIT_WORK(&pengine->bw_allocate_ws, qcrypto_bw_allocate_work);
  3730. pengine->high_bw_req = false;
  3731. pengine->active_seq = 0;
  3732. pengine->last_active_seq = 0;
  3733. pengine->check_flag = false;
  3734. device_init_wakeup(&pengine->pdev->dev, true);
  3735. tasklet_init(&pengine->done_tasklet, req_done, (unsigned long)pengine);
  3736. crypto_init_queue(&pengine->req_queue, MSM_QCRYPTO_REQ_QUEUE_LENGTH);
  3737. mutex_lock(&cp->engine_lock);
  3738. cp->total_units++;
  3739. pengine->unit = cp->total_units;
  3740. spin_lock_irqsave(&cp->lock, flags);
  3741. list_add_tail(&pengine->elist, &cp->engine_list);
  3742. cp->next_engine = pengine;
  3743. spin_unlock_irqrestore(&cp->lock, flags);
  3744. qce_hw_support(pengine->qce, &cp->ce_support);
  3745. if (cp->ce_support.bam) {
  3746. cp->platform_support.ce_shared = cp->ce_support.is_shared;
  3747. cp->platform_support.shared_ce_resource = 0;
  3748. cp->platform_support.hw_key_support = cp->ce_support.hw_key;
  3749. cp->platform_support.sha_hmac = 1;
  3750. cp->platform_support.bus_scale_table =
  3751. (struct msm_bus_scale_pdata *)
  3752. msm_bus_cl_get_pdata(pdev);
  3753. if (!cp->platform_support.bus_scale_table)
  3754. pr_warn("bus_scale_table is NULL\n");
  3755. pengine->ce_device = cp->ce_support.ce_device;
  3756. } else {
  3757. platform_support =
  3758. (struct msm_ce_hw_support *)pdev->dev.platform_data;
  3759. cp->platform_support.ce_shared = platform_support->ce_shared;
  3760. cp->platform_support.shared_ce_resource =
  3761. platform_support->shared_ce_resource;
  3762. cp->platform_support.hw_key_support =
  3763. platform_support->hw_key_support;
  3764. cp->platform_support.bus_scale_table =
  3765. platform_support->bus_scale_table;
  3766. cp->platform_support.sha_hmac = platform_support->sha_hmac;
  3767. }
  3768. pengine->bus_scale_handle = 0;
  3769. if (cp->platform_support.bus_scale_table != NULL) {
  3770. pengine->bus_scale_handle =
  3771. msm_bus_scale_register_client(
  3772. (struct msm_bus_scale_pdata *)
  3773. cp->platform_support.bus_scale_table);
  3774. if (!pengine->bus_scale_handle) {
  3775. pr_err("%s not able to get bus scale\n",
  3776. __func__);
  3777. rc = -ENOMEM;
  3778. goto err;
  3779. }
  3780. pengine->bw_state = BUS_NO_BANDWIDTH;
  3781. } else {
  3782. pengine->bw_state = BUS_HAS_BANDWIDTH;
  3783. }
  3784. if (cp->total_units != 1) {
  3785. mutex_unlock(&cp->engine_lock);
  3786. goto fips_selftest;
  3787. }
  3788. /* register crypto cipher algorithms the device supports */
  3789. for (i = 0; i < ARRAY_SIZE(_qcrypto_ablk_cipher_algos); i++) {
  3790. struct qcrypto_alg *q_alg;
  3791. q_alg = _qcrypto_cipher_alg_alloc(cp,
  3792. &_qcrypto_ablk_cipher_algos[i]);
  3793. if (IS_ERR(q_alg)) {
  3794. rc = PTR_ERR(q_alg);
  3795. goto err;
  3796. }
  3797. if (cp->ce_support.use_sw_aes_cbc_ecb_ctr_algo) {
  3798. rc = _qcrypto_prefix_alg_cra_name(
  3799. q_alg->cipher_alg.cra_name,
  3800. strlen(q_alg->cipher_alg.cra_name));
  3801. if (rc) {
  3802. dev_err(&pdev->dev,
  3803. "The algorithm name %s is too long.\n",
  3804. q_alg->cipher_alg.cra_name);
  3805. kfree(q_alg);
  3806. goto err;
  3807. }
  3808. }
  3809. rc = crypto_register_alg(&q_alg->cipher_alg);
  3810. if (rc) {
  3811. dev_err(&pdev->dev, "%s alg registration failed\n",
  3812. q_alg->cipher_alg.cra_driver_name);
  3813. kzfree(q_alg);
  3814. } else {
  3815. list_add_tail(&q_alg->entry, &cp->alg_list);
  3816. dev_info(&pdev->dev, "%s\n",
  3817. q_alg->cipher_alg.cra_driver_name);
  3818. }
  3819. }
  3820. /* register crypto cipher algorithms the device supports */
  3821. if (cp->ce_support.aes_xts) {
  3822. struct qcrypto_alg *q_alg;
  3823. q_alg = _qcrypto_cipher_alg_alloc(cp,
  3824. &_qcrypto_ablk_cipher_xts_algo);
  3825. if (IS_ERR(q_alg)) {
  3826. rc = PTR_ERR(q_alg);
  3827. goto err;
  3828. }
  3829. if (cp->ce_support.use_sw_aes_xts_algo) {
  3830. rc = _qcrypto_prefix_alg_cra_name(
  3831. q_alg->cipher_alg.cra_name,
  3832. strlen(q_alg->cipher_alg.cra_name));
  3833. if (rc) {
  3834. dev_err(&pdev->dev,
  3835. "The algorithm name %s is too long.\n",
  3836. q_alg->cipher_alg.cra_name);
  3837. kfree(q_alg);
  3838. goto err;
  3839. }
  3840. }
  3841. rc = crypto_register_alg(&q_alg->cipher_alg);
  3842. if (rc) {
  3843. dev_err(&pdev->dev, "%s alg registration failed\n",
  3844. q_alg->cipher_alg.cra_driver_name);
  3845. kzfree(q_alg);
  3846. } else {
  3847. list_add_tail(&q_alg->entry, &cp->alg_list);
  3848. dev_info(&pdev->dev, "%s\n",
  3849. q_alg->cipher_alg.cra_driver_name);
  3850. }
  3851. }
  3852. /*
  3853. * Register crypto hash (sha1 and sha256) algorithms the
  3854. * device supports
  3855. */
  3856. for (i = 0; i < ARRAY_SIZE(_qcrypto_ahash_algos); i++) {
  3857. struct qcrypto_alg *q_alg = NULL;
  3858. q_alg = _qcrypto_sha_alg_alloc(cp, &_qcrypto_ahash_algos[i]);
  3859. if (IS_ERR(q_alg)) {
  3860. rc = PTR_ERR(q_alg);
  3861. goto err;
  3862. }
  3863. if (cp->ce_support.use_sw_ahash_algo) {
  3864. rc = _qcrypto_prefix_alg_cra_name(
  3865. q_alg->sha_alg.halg.base.cra_name,
  3866. strlen(q_alg->sha_alg.halg.base.cra_name));
  3867. if (rc) {
  3868. dev_err(&pdev->dev,
  3869. "The algorithm name %s is too long.\n",
  3870. q_alg->sha_alg.halg.base.cra_name);
  3871. kfree(q_alg);
  3872. goto err;
  3873. }
  3874. }
  3875. rc = crypto_register_ahash(&q_alg->sha_alg);
  3876. if (rc) {
  3877. dev_err(&pdev->dev, "%s alg registration failed\n",
  3878. q_alg->sha_alg.halg.base.cra_driver_name);
  3879. kzfree(q_alg);
  3880. } else {
  3881. list_add_tail(&q_alg->entry, &cp->alg_list);
  3882. dev_info(&pdev->dev, "%s\n",
  3883. q_alg->sha_alg.halg.base.cra_driver_name);
  3884. }
  3885. }
  3886. /* register crypto aead (hmac-sha1) algorithms the device supports */
  3887. if (cp->ce_support.sha1_hmac_20 || cp->ce_support.sha1_hmac
  3888. || cp->ce_support.sha_hmac) {
  3889. for (i = 0; i < ARRAY_SIZE(_qcrypto_aead_sha1_hmac_algos);
  3890. i++) {
  3891. struct qcrypto_alg *q_alg;
  3892. q_alg = _qcrypto_cipher_alg_alloc(cp,
  3893. &_qcrypto_aead_sha1_hmac_algos[i]);
  3894. if (IS_ERR(q_alg)) {
  3895. rc = PTR_ERR(q_alg);
  3896. goto err;
  3897. }
  3898. if (cp->ce_support.use_sw_aead_algo) {
  3899. rc = _qcrypto_prefix_alg_cra_name(
  3900. q_alg->cipher_alg.cra_name,
  3901. strlen(q_alg->cipher_alg.cra_name));
  3902. if (rc) {
  3903. dev_err(&pdev->dev,
  3904. "The algorithm name %s is too long.\n",
  3905. q_alg->cipher_alg.cra_name);
  3906. kfree(q_alg);
  3907. goto err;
  3908. }
  3909. }
  3910. rc = crypto_register_alg(&q_alg->cipher_alg);
  3911. if (rc) {
  3912. dev_err(&pdev->dev,
  3913. "%s alg registration failed\n",
  3914. q_alg->cipher_alg.cra_driver_name);
  3915. kfree(q_alg);
  3916. } else {
  3917. list_add_tail(&q_alg->entry, &cp->alg_list);
  3918. dev_info(&pdev->dev, "%s\n",
  3919. q_alg->cipher_alg.cra_driver_name);
  3920. }
  3921. }
  3922. }
  3923. if ((cp->ce_support.sha_hmac) || (cp->platform_support.sha_hmac)) {
  3924. /* register crypto hmac algorithms the device supports */
  3925. for (i = 0; i < ARRAY_SIZE(_qcrypto_sha_hmac_algos); i++) {
  3926. struct qcrypto_alg *q_alg = NULL;
  3927. q_alg = _qcrypto_sha_alg_alloc(cp,
  3928. &_qcrypto_sha_hmac_algos[i]);
  3929. if (IS_ERR(q_alg)) {
  3930. rc = PTR_ERR(q_alg);
  3931. goto err;
  3932. }
  3933. if (cp->ce_support.use_sw_hmac_algo) {
  3934. rc = _qcrypto_prefix_alg_cra_name(
  3935. q_alg->sha_alg.halg.base.cra_name,
  3936. strlen(
  3937. q_alg->sha_alg.halg.base.cra_name));
  3938. if (rc) {
  3939. dev_err(&pdev->dev,
  3940. "The algorithm name %s is too long.\n",
  3941. q_alg->sha_alg.halg.base.cra_name);
  3942. kfree(q_alg);
  3943. goto err;
  3944. }
  3945. }
  3946. rc = crypto_register_ahash(&q_alg->sha_alg);
  3947. if (rc) {
  3948. dev_err(&pdev->dev,
  3949. "%s alg registration failed\n",
  3950. q_alg->sha_alg.halg.base.cra_driver_name);
  3951. kzfree(q_alg);
  3952. } else {
  3953. list_add_tail(&q_alg->entry, &cp->alg_list);
  3954. dev_info(&pdev->dev, "%s\n",
  3955. q_alg->sha_alg.halg.base.cra_driver_name);
  3956. }
  3957. }
  3958. }
  3959. /*
  3960. * Register crypto cipher (aes-ccm) algorithms the
  3961. * device supports
  3962. */
  3963. if (cp->ce_support.aes_ccm) {
  3964. struct qcrypto_alg *q_alg;
  3965. q_alg = _qcrypto_cipher_alg_alloc(cp, &_qcrypto_aead_ccm_algo);
  3966. if (IS_ERR(q_alg)) {
  3967. rc = PTR_ERR(q_alg);
  3968. goto err;
  3969. }
  3970. if (cp->ce_support.use_sw_aes_ccm_algo) {
  3971. rc = _qcrypto_prefix_alg_cra_name(
  3972. q_alg->cipher_alg.cra_name,
  3973. strlen(q_alg->cipher_alg.cra_name));
  3974. if (rc) {
  3975. dev_err(&pdev->dev,
  3976. "The algorithm name %s is too long.\n",
  3977. q_alg->cipher_alg.cra_name);
  3978. kfree(q_alg);
  3979. goto err;
  3980. }
  3981. }
  3982. rc = crypto_register_alg(&q_alg->cipher_alg);
  3983. if (rc) {
  3984. dev_err(&pdev->dev, "%s alg registration failed\n",
  3985. q_alg->cipher_alg.cra_driver_name);
  3986. kzfree(q_alg);
  3987. } else {
  3988. list_add_tail(&q_alg->entry, &cp->alg_list);
  3989. dev_info(&pdev->dev, "%s\n",
  3990. q_alg->cipher_alg.cra_driver_name);
  3991. }
  3992. q_alg = _qcrypto_cipher_alg_alloc(cp,
  3993. &_qcrypto_aead_rfc4309_ccm_algo);
  3994. if (IS_ERR(q_alg)) {
  3995. rc = PTR_ERR(q_alg);
  3996. goto err;
  3997. }
  3998. if (cp->ce_support.use_sw_aes_ccm_algo) {
  3999. rc = _qcrypto_prefix_alg_cra_name(
  4000. q_alg->cipher_alg.cra_name,
  4001. strlen(q_alg->cipher_alg.cra_name));
  4002. if (rc) {
  4003. dev_err(&pdev->dev,
  4004. "The algorithm name %s is too long.\n",
  4005. q_alg->cipher_alg.cra_name);
  4006. kfree(q_alg);
  4007. goto err;
  4008. }
  4009. }
  4010. rc = crypto_register_alg(&q_alg->cipher_alg);
  4011. if (rc) {
  4012. dev_err(&pdev->dev, "%s alg registration failed\n",
  4013. q_alg->cipher_alg.cra_driver_name);
  4014. kfree(q_alg);
  4015. } else {
  4016. list_add_tail(&q_alg->entry, &cp->alg_list);
  4017. dev_info(&pdev->dev, "%s\n",
  4018. q_alg->cipher_alg.cra_driver_name);
  4019. }
  4020. }
  4021. mutex_unlock(&cp->engine_lock);
  4022. fips_selftest:
  4023. /*
  4024. * FIPS140-2 Known Answer Tests :
  4025. * IN case of any failure, do not Init the module
  4026. */
  4027. is_fips_qcrypto_tests_done = false;
  4028. if (g_fips140_status != FIPS140_STATUS_NA) {
  4029. _qcrypto_prefix_alg_cra_name(prefix, 0);
  4030. _qcrypto_fips_selftest_d(&selftest_d, &cp->ce_support, prefix);
  4031. if (_fips_qcrypto_sha_selftest(&selftest_d) ||
  4032. _fips_qcrypto_cipher_selftest(&selftest_d) ||
  4033. _fips_qcrypto_aead_selftest(&selftest_d)) {
  4034. pr_err("qcrypto: FIPS140-2 Known Answer Tests : Failed\n");
  4035. panic("SYSTEM CAN NOT BOOT!!!");
  4036. rc = -1;
  4037. goto err;
  4038. } else
  4039. pr_info("qcrypto: FIPS140-2 Known Answer Tests: Successful\n");
  4040. if (g_fips140_status != FIPS140_STATUS_PASS)
  4041. g_fips140_status = FIPS140_STATUS_PASS_CRYPTO;
  4042. } else
  4043. pr_info("qcrypto: FIPS140-2 Known Answer Tests: Skipped\n");
  4044. is_fips_qcrypto_tests_done = true;
  4045. return 0;
  4046. err:
  4047. _qcrypto_remove_engine(pengine);
  4048. mutex_unlock(&cp->engine_lock);
  4049. if (pengine->qce)
  4050. qce_close(pengine->qce);
  4051. kzfree(pengine);
  4052. return rc;
  4053. };
  4054. static int _qcrypto_engine_in_use(struct crypto_engine *pengine)
  4055. {
  4056. struct crypto_priv *cp = pengine->pcp;
  4057. if (pengine->req || pengine->req_queue.qlen || cp->req_queue.qlen)
  4058. return 1;
  4059. return 0;
  4060. }
  4061. static void _qcrypto_do_suspending(struct crypto_engine *pengine)
  4062. {
  4063. struct crypto_priv *cp = pengine->pcp;
  4064. if (cp->platform_support.bus_scale_table == NULL)
  4065. return;
  4066. del_timer_sync(&pengine->bw_reaper_timer);
  4067. qcrypto_ce_set_bus(pengine, false);
  4068. }
  4069. static int _qcrypto_suspend(struct platform_device *pdev, pm_message_t state)
  4070. {
  4071. int ret = 0;
  4072. struct crypto_engine *pengine;
  4073. struct crypto_priv *cp;
  4074. unsigned long flags;
  4075. pengine = platform_get_drvdata(pdev);
  4076. if (!pengine)
  4077. return -EINVAL;
  4078. /*
  4079. * Check if this platform supports clock management in suspend/resume
  4080. * If not, just simply return 0.
  4081. */
  4082. cp = pengine->pcp;
  4083. if (!cp->ce_support.clk_mgmt_sus_res)
  4084. return 0;
  4085. spin_lock_irqsave(&cp->lock, flags);
  4086. switch (pengine->bw_state) {
  4087. case BUS_NO_BANDWIDTH:
  4088. if (pengine->high_bw_req == false)
  4089. pengine->bw_state = BUS_SUSPENDED;
  4090. else
  4091. ret = -EBUSY;
  4092. break;
  4093. case BUS_HAS_BANDWIDTH:
  4094. if (_qcrypto_engine_in_use(pengine)) {
  4095. ret = -EBUSY;
  4096. } else {
  4097. pengine->bw_state = BUS_SUSPENDING;
  4098. spin_unlock_irqrestore(&cp->lock, flags);
  4099. _qcrypto_do_suspending(pengine);
  4100. spin_lock_irqsave(&cp->lock, flags);
  4101. pengine->bw_state = BUS_SUSPENDED;
  4102. }
  4103. break;
  4104. case BUS_BANDWIDTH_RELEASING:
  4105. case BUS_BANDWIDTH_ALLOCATING:
  4106. case BUS_SUSPENDED:
  4107. case BUS_SUSPENDING:
  4108. default:
  4109. ret = -EBUSY;
  4110. break;
  4111. }
  4112. spin_unlock_irqrestore(&cp->lock, flags);
  4113. if (ret)
  4114. return ret;
  4115. else {
  4116. if (qce_pm_table.suspend)
  4117. qce_pm_table.suspend(pengine->qce);
  4118. return 0;
  4119. }
  4120. }
  4121. static int _qcrypto_resume(struct platform_device *pdev)
  4122. {
  4123. struct crypto_engine *pengine;
  4124. struct crypto_priv *cp;
  4125. unsigned long flags;
  4126. int ret = 0;
  4127. pengine = platform_get_drvdata(pdev);
  4128. if (!pengine)
  4129. return -EINVAL;
  4130. cp = pengine->pcp;
  4131. if (!cp->ce_support.clk_mgmt_sus_res)
  4132. return 0;
  4133. spin_lock_irqsave(&cp->lock, flags);
  4134. if (pengine->bw_state == BUS_SUSPENDED) {
  4135. spin_unlock_irqrestore(&cp->lock, flags);
  4136. if (qce_pm_table.resume)
  4137. qce_pm_table.resume(pengine->qce);
  4138. spin_lock_irqsave(&cp->lock, flags);
  4139. pengine->bw_state = BUS_NO_BANDWIDTH;
  4140. pengine->active_seq++;
  4141. pengine->check_flag = false;
  4142. if (cp->req_queue.qlen || pengine->req_queue.qlen) {
  4143. if (pengine->high_bw_req == false) {
  4144. qcrypto_ce_bw_allocate_req(pengine);
  4145. pengine->high_bw_req = true;
  4146. }
  4147. }
  4148. } else
  4149. ret = -EBUSY;
  4150. spin_unlock_irqrestore(&cp->lock, flags);
  4151. return ret;
  4152. }
  4153. static struct of_device_id qcrypto_match[] = {
  4154. { .compatible = "qcom,qcrypto",
  4155. },
  4156. {}
  4157. };
  4158. static struct platform_driver _qualcomm_crypto = {
  4159. .probe = _qcrypto_probe,
  4160. .remove = _qcrypto_remove,
  4161. .suspend = _qcrypto_suspend,
  4162. .resume = _qcrypto_resume,
  4163. .driver = {
  4164. .owner = THIS_MODULE,
  4165. .name = "qcrypto",
  4166. .of_match_table = qcrypto_match,
  4167. },
  4168. };
  4169. static int _debug_qcrypto;
  4170. static int _debug_stats_open(struct inode *inode, struct file *file)
  4171. {
  4172. file->private_data = inode->i_private;
  4173. return 0;
  4174. }
  4175. static ssize_t _debug_stats_read(struct file *file, char __user *buf,
  4176. size_t count, loff_t *ppos)
  4177. {
  4178. int rc = -EINVAL;
  4179. int qcrypto = *((int *) file->private_data);
  4180. int len;
  4181. len = _disp_stats(qcrypto);
  4182. if (len <= count)
  4183. rc = simple_read_from_buffer((void __user *) buf, len,
  4184. ppos, (void *) _debug_read_buf, len);
  4185. return rc;
  4186. }
  4187. static ssize_t _debug_stats_write(struct file *file, const char __user *buf,
  4188. size_t count, loff_t *ppos)
  4189. {
  4190. unsigned long flags;
  4191. struct crypto_priv *cp = &qcrypto_dev;
  4192. struct crypto_engine *pe;
  4193. memset((char *)&_qcrypto_stat, 0, sizeof(struct crypto_stat));
  4194. spin_lock_irqsave(&cp->lock, flags);
  4195. list_for_each_entry(pe, &cp->engine_list, elist) {
  4196. pe->total_req = 0;
  4197. pe->err_req = 0;
  4198. }
  4199. spin_unlock_irqrestore(&cp->lock, flags);
  4200. return count;
  4201. }
  4202. static const struct file_operations _debug_stats_ops = {
  4203. .open = _debug_stats_open,
  4204. .read = _debug_stats_read,
  4205. .write = _debug_stats_write,
  4206. };
  4207. static int _qcrypto_debug_init(void)
  4208. {
  4209. int rc;
  4210. char name[DEBUG_MAX_FNAME];
  4211. struct dentry *dent;
  4212. _debug_dent = debugfs_create_dir("qcrypto", NULL);
  4213. if (IS_ERR(_debug_dent)) {
  4214. pr_err("qcrypto debugfs_create_dir fail, error %ld\n",
  4215. PTR_ERR(_debug_dent));
  4216. return PTR_ERR(_debug_dent);
  4217. }
  4218. snprintf(name, DEBUG_MAX_FNAME-1, "stats-%d", 1);
  4219. _debug_qcrypto = 0;
  4220. dent = debugfs_create_file(name, 0644, _debug_dent,
  4221. &_debug_qcrypto, &_debug_stats_ops);
  4222. if (dent == NULL) {
  4223. pr_err("qcrypto debugfs_create_file fail, error %ld\n",
  4224. PTR_ERR(dent));
  4225. rc = PTR_ERR(dent);
  4226. goto err;
  4227. }
  4228. return 0;
  4229. err:
  4230. debugfs_remove_recursive(_debug_dent);
  4231. return rc;
  4232. }
  4233. static int __init _qcrypto_init(void)
  4234. {
  4235. int rc;
  4236. struct crypto_priv *pcp = &qcrypto_dev;
  4237. rc = _qcrypto_debug_init();
  4238. if (rc)
  4239. return rc;
  4240. INIT_LIST_HEAD(&pcp->alg_list);
  4241. INIT_LIST_HEAD(&pcp->engine_list);
  4242. INIT_WORK(&pcp->unlock_ce_ws, qcrypto_unlock_ce);
  4243. spin_lock_init(&pcp->lock);
  4244. mutex_init(&pcp->engine_lock);
  4245. pcp->total_units = 0;
  4246. pcp->ce_lock_count = 0;
  4247. pcp->platform_support.bus_scale_table = NULL;
  4248. pcp->next_engine = NULL;
  4249. crypto_init_queue(&pcp->req_queue, MSM_QCRYPTO_REQ_QUEUE_LENGTH);
  4250. return platform_driver_register(&_qualcomm_crypto);
  4251. }
  4252. static void __exit _qcrypto_exit(void)
  4253. {
  4254. pr_debug("%s Unregister QCRYPTO\n", __func__);
  4255. debugfs_remove_recursive(_debug_dent);
  4256. platform_driver_unregister(&_qualcomm_crypto);
  4257. }
  4258. module_init(_qcrypto_init);
  4259. module_exit(_qcrypto_exit);
  4260. MODULE_LICENSE("GPL v2");
  4261. MODULE_DESCRIPTION("Qualcomm Crypto driver");