csrc-sb1250.c 2.1 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970
  1. /*
  2. * Copyright (C) 2000, 2001 Broadcom Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation; either version 2
  7. * of the License, or (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  17. */
  18. #include <linux/clocksource.h>
  19. #include <asm/addrspace.h>
  20. #include <asm/io.h>
  21. #include <asm/time.h>
  22. #include <asm/sibyte/sb1250.h>
  23. #include <asm/sibyte/sb1250_regs.h>
  24. #include <asm/sibyte/sb1250_int.h>
  25. #include <asm/sibyte/sb1250_scd.h>
  26. #define SB1250_HPT_NUM 3
  27. #define SB1250_HPT_VALUE M_SCD_TIMER_CNT /* max value */
  28. /*
  29. * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over
  30. * again.
  31. */
  32. static cycle_t sb1250_hpt_read(struct clocksource *cs)
  33. {
  34. unsigned int count;
  35. count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT))));
  36. return SB1250_HPT_VALUE - count;
  37. }
  38. struct clocksource bcm1250_clocksource = {
  39. .name = "bcm1250-counter-3",
  40. .rating = 200,
  41. .read = sb1250_hpt_read,
  42. .mask = CLOCKSOURCE_MASK(23),
  43. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  44. };
  45. void __init sb1250_clocksource_init(void)
  46. {
  47. struct clocksource *cs = &bcm1250_clocksource;
  48. /* Setup hpt using timer #3 but do not enable irq for it */
  49. __raw_writeq(0,
  50. IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM,
  51. R_SCD_TIMER_CFG)));
  52. __raw_writeq(SB1250_HPT_VALUE,
  53. IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM,
  54. R_SCD_TIMER_INIT)));
  55. __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
  56. IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM,
  57. R_SCD_TIMER_CFG)));
  58. clocksource_register_hz(cs, V_SCD_TIMER_FREQ);
  59. }