mb.c 4.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162
  1. /*
  2. * CPU-version specific code
  3. *
  4. * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
  5. * Copyright (C) 2006-2009 PetaLogix
  6. *
  7. * This file is subject to the terms and conditions of the GNU General Public
  8. * License. See the file "COPYING" in the main directory of this archive
  9. * for more details.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/string.h>
  13. #include <linux/seq_file.h>
  14. #include <linux/cpu.h>
  15. #include <linux/initrd.h>
  16. #include <linux/bug.h>
  17. #include <asm/cpuinfo.h>
  18. #include <linux/delay.h>
  19. #include <linux/io.h>
  20. #include <asm/page.h>
  21. #include <linux/param.h>
  22. #include <asm/pvr.h>
  23. #include <asm/sections.h>
  24. #include <asm/setup.h>
  25. static int show_cpuinfo(struct seq_file *m, void *v)
  26. {
  27. int count = 0;
  28. char *fpga_family = "Unknown";
  29. char *cpu_ver = "Unknown";
  30. int i;
  31. /* Denormalised to get the fpga family string */
  32. for (i = 0; family_string_lookup[i].s != NULL; i++) {
  33. if (cpuinfo.fpga_family_code == family_string_lookup[i].k) {
  34. fpga_family = (char *)family_string_lookup[i].s;
  35. break;
  36. }
  37. }
  38. /* Denormalised to get the hw version string */
  39. for (i = 0; cpu_ver_lookup[i].s != NULL; i++) {
  40. if (cpuinfo.ver_code == cpu_ver_lookup[i].k) {
  41. cpu_ver = (char *)cpu_ver_lookup[i].s;
  42. break;
  43. }
  44. }
  45. count = seq_printf(m,
  46. "CPU-Family: MicroBlaze\n"
  47. "FPGA-Arch: %s\n"
  48. "CPU-Ver: %s, %s endian\n"
  49. "CPU-MHz: %d.%02d\n"
  50. "BogoMips: %lu.%02lu\n",
  51. fpga_family,
  52. cpu_ver,
  53. cpuinfo.endian ? "little" : "big",
  54. cpuinfo.cpu_clock_freq /
  55. 1000000,
  56. cpuinfo.cpu_clock_freq %
  57. 1000000,
  58. loops_per_jiffy / (500000 / HZ),
  59. (loops_per_jiffy / (5000 / HZ)) % 100);
  60. count += seq_printf(m,
  61. "HW:\n Shift:\t\t%s\n"
  62. " MSR:\t\t%s\n"
  63. " PCMP:\t\t%s\n"
  64. " DIV:\t\t%s\n",
  65. (cpuinfo.use_instr & PVR0_USE_BARREL_MASK) ? "yes" : "no",
  66. (cpuinfo.use_instr & PVR2_USE_MSR_INSTR) ? "yes" : "no",
  67. (cpuinfo.use_instr & PVR2_USE_PCMP_INSTR) ? "yes" : "no",
  68. (cpuinfo.use_instr & PVR0_USE_DIV_MASK) ? "yes" : "no");
  69. count += seq_printf(m,
  70. " MMU:\t\t%x\n",
  71. cpuinfo.mmu);
  72. count += seq_printf(m,
  73. " MUL:\t\t%s\n"
  74. " FPU:\t\t%s\n",
  75. (cpuinfo.use_mult & PVR2_USE_MUL64_MASK) ? "v2" :
  76. (cpuinfo.use_mult & PVR0_USE_HW_MUL_MASK) ? "v1" : "no",
  77. (cpuinfo.use_fpu & PVR2_USE_FPU2_MASK) ? "v2" :
  78. (cpuinfo.use_fpu & PVR0_USE_FPU_MASK) ? "v1" : "no");
  79. count += seq_printf(m,
  80. " Exc:\t\t%s%s%s%s%s%s%s%s\n",
  81. (cpuinfo.use_exc & PVR2_OPCODE_0x0_ILL_MASK) ? "op0x0 " : "",
  82. (cpuinfo.use_exc & PVR2_UNALIGNED_EXC_MASK) ? "unal " : "",
  83. (cpuinfo.use_exc & PVR2_ILL_OPCODE_EXC_MASK) ? "ill " : "",
  84. (cpuinfo.use_exc & PVR2_IOPB_BUS_EXC_MASK) ? "iopb " : "",
  85. (cpuinfo.use_exc & PVR2_DOPB_BUS_EXC_MASK) ? "dopb " : "",
  86. (cpuinfo.use_exc & PVR2_DIV_ZERO_EXC_MASK) ? "zero " : "",
  87. (cpuinfo.use_exc & PVR2_FPU_EXC_MASK) ? "fpu " : "",
  88. (cpuinfo.use_exc & PVR2_USE_FSL_EXC) ? "fsl " : "");
  89. count += seq_printf(m,
  90. "Stream-insns:\t%sprivileged\n",
  91. cpuinfo.mmu_privins ? "un" : "");
  92. if (cpuinfo.use_icache)
  93. count += seq_printf(m,
  94. "Icache:\t\t%ukB\tline length:\t%dB\n",
  95. cpuinfo.icache_size >> 10,
  96. cpuinfo.icache_line_length);
  97. else
  98. count += seq_printf(m, "Icache:\t\tno\n");
  99. if (cpuinfo.use_dcache) {
  100. count += seq_printf(m,
  101. "Dcache:\t\t%ukB\tline length:\t%dB\n",
  102. cpuinfo.dcache_size >> 10,
  103. cpuinfo.dcache_line_length);
  104. seq_printf(m, "Dcache-Policy:\t");
  105. if (cpuinfo.dcache_wb)
  106. count += seq_printf(m, "write-back\n");
  107. else
  108. count += seq_printf(m, "write-through\n");
  109. } else
  110. count += seq_printf(m, "Dcache:\t\tno\n");
  111. count += seq_printf(m,
  112. "HW-Debug:\t%s\n",
  113. cpuinfo.hw_debug ? "yes" : "no");
  114. count += seq_printf(m,
  115. "PVR-USR1:\t%02x\n"
  116. "PVR-USR2:\t%08x\n",
  117. cpuinfo.pvr_user1,
  118. cpuinfo.pvr_user2);
  119. count += seq_printf(m, "Page size:\t%lu\n", PAGE_SIZE);
  120. return 0;
  121. }
  122. static void *c_start(struct seq_file *m, loff_t *pos)
  123. {
  124. int i = *pos;
  125. return i < NR_CPUS ? (void *) (i + 1) : NULL;
  126. }
  127. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  128. {
  129. ++*pos;
  130. return c_start(m, pos);
  131. }
  132. static void c_stop(struct seq_file *m, void *v)
  133. {
  134. }
  135. const struct seq_operations cpuinfo_op = {
  136. .start = c_start,
  137. .next = c_next,
  138. .stop = c_stop,
  139. .show = show_cpuinfo,
  140. };