config.c 2.5 KB

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  1. /***************************************************************************/
  2. /*
  3. * linux/arch/m68knommu/platform/5249/config.c
  4. *
  5. * Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
  6. */
  7. /***************************************************************************/
  8. #include <linux/kernel.h>
  9. #include <linux/param.h>
  10. #include <linux/init.h>
  11. #include <linux/io.h>
  12. #include <linux/platform_device.h>
  13. #include <asm/machdep.h>
  14. #include <asm/coldfire.h>
  15. #include <asm/mcfsim.h>
  16. /***************************************************************************/
  17. #ifdef CONFIG_M5249C3
  18. static struct resource m5249_smc91x_resources[] = {
  19. {
  20. .start = 0xe0000300,
  21. .end = 0xe0000300 + 0x100,
  22. .flags = IORESOURCE_MEM,
  23. },
  24. {
  25. .start = MCFINTC2_GPIOIRQ6,
  26. .end = MCFINTC2_GPIOIRQ6,
  27. .flags = IORESOURCE_IRQ,
  28. },
  29. };
  30. static struct platform_device m5249_smc91x = {
  31. .name = "smc91x",
  32. .id = 0,
  33. .num_resources = ARRAY_SIZE(m5249_smc91x_resources),
  34. .resource = m5249_smc91x_resources,
  35. };
  36. #endif /* CONFIG_M5249C3 */
  37. static struct platform_device *m5249_devices[] __initdata = {
  38. #ifdef CONFIG_M5249C3
  39. &m5249_smc91x,
  40. #endif
  41. };
  42. /***************************************************************************/
  43. #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
  44. static void __init m5249_qspi_init(void)
  45. {
  46. /* QSPI irq setup */
  47. writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0,
  48. MCF_MBAR + MCFSIM_QSPIICR);
  49. mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
  50. }
  51. #endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
  52. /***************************************************************************/
  53. #ifdef CONFIG_M5249C3
  54. static void __init m5249_smc91x_init(void)
  55. {
  56. u32 gpio;
  57. /* Set the GPIO line as interrupt source for smc91x device */
  58. gpio = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
  59. writel(gpio | 0x40, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
  60. gpio = readl(MCF_MBAR2 + MCFSIM2_INTLEVEL5);
  61. writel(gpio | 0x04000000, MCF_MBAR2 + MCFSIM2_INTLEVEL5);
  62. }
  63. #endif /* CONFIG_M5249C3 */
  64. /***************************************************************************/
  65. void __init config_BSP(char *commandp, int size)
  66. {
  67. mach_sched_init = hw_timer_init;
  68. #ifdef CONFIG_M5249C3
  69. m5249_smc91x_init();
  70. #endif
  71. #if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
  72. m5249_qspi_init();
  73. #endif
  74. }
  75. /***************************************************************************/
  76. static int __init init_BSP(void)
  77. {
  78. platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
  79. return 0;
  80. }
  81. arch_initcall(init_BSP);
  82. /***************************************************************************/