config.c 9.7 KB

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  1. /*
  2. * arch/m68k/bvme6000/config.c
  3. *
  4. * Copyright (C) 1997 Richard Hirst [richard@sleepie.demon.co.uk]
  5. *
  6. * Based on:
  7. *
  8. * linux/amiga/config.c
  9. *
  10. * Copyright (C) 1993 Hamish Macdonald
  11. *
  12. * This file is subject to the terms and conditions of the GNU General Public
  13. * License. See the file README.legal in the main directory of this archive
  14. * for more details.
  15. */
  16. #include <linux/types.h>
  17. #include <linux/kernel.h>
  18. #include <linux/mm.h>
  19. #include <linux/tty.h>
  20. #include <linux/console.h>
  21. #include <linux/linkage.h>
  22. #include <linux/init.h>
  23. #include <linux/major.h>
  24. #include <linux/genhd.h>
  25. #include <linux/rtc.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/bcd.h>
  28. #include <asm/bootinfo.h>
  29. #include <asm/pgtable.h>
  30. #include <asm/setup.h>
  31. #include <asm/irq.h>
  32. #include <asm/traps.h>
  33. #include <asm/rtc.h>
  34. #include <asm/machdep.h>
  35. #include <asm/bvme6000hw.h>
  36. static void bvme6000_get_model(char *model);
  37. extern void bvme6000_sched_init(irq_handler_t handler);
  38. extern unsigned long bvme6000_gettimeoffset (void);
  39. extern int bvme6000_hwclk (int, struct rtc_time *);
  40. extern int bvme6000_set_clock_mmss (unsigned long);
  41. extern void bvme6000_reset (void);
  42. void bvme6000_set_vectors (void);
  43. /* Save tick handler routine pointer, will point to xtime_update() in
  44. * kernel/timer/timekeeping.c, called via bvme6000_process_int() */
  45. static irq_handler_t tick_handler;
  46. int bvme6000_parse_bootinfo(const struct bi_record *bi)
  47. {
  48. if (bi->tag == BI_VME_TYPE)
  49. return 0;
  50. else
  51. return 1;
  52. }
  53. void bvme6000_reset(void)
  54. {
  55. volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
  56. printk ("\r\n\nCalled bvme6000_reset\r\n"
  57. "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
  58. /* The string of returns is to delay the reset until the whole
  59. * message is output. */
  60. /* Enable the watchdog, via PIT port C bit 4 */
  61. pit->pcddr |= 0x10; /* WDOG enable */
  62. while(1)
  63. ;
  64. }
  65. static void bvme6000_get_model(char *model)
  66. {
  67. sprintf(model, "BVME%d000", m68k_cputype == CPU_68060 ? 6 : 4);
  68. }
  69. /*
  70. * This function is called during kernel startup to initialize
  71. * the bvme6000 IRQ handling routines.
  72. */
  73. static void __init bvme6000_init_IRQ(void)
  74. {
  75. m68k_setup_user_interrupt(VEC_USER, 192);
  76. }
  77. void __init config_bvme6000(void)
  78. {
  79. volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
  80. /* Board type is only set by newer versions of vmelilo/tftplilo */
  81. if (!vme_brdtype) {
  82. if (m68k_cputype == CPU_68060)
  83. vme_brdtype = VME_TYPE_BVME6000;
  84. else
  85. vme_brdtype = VME_TYPE_BVME4000;
  86. }
  87. #if 0
  88. /* Call bvme6000_set_vectors() so ABORT will work, along with BVMBug
  89. * debugger. Note trap_init() will splat the abort vector, but
  90. * bvme6000_init_IRQ() will put it back again. Hopefully. */
  91. bvme6000_set_vectors();
  92. #endif
  93. mach_max_dma_address = 0xffffffff;
  94. mach_sched_init = bvme6000_sched_init;
  95. mach_init_IRQ = bvme6000_init_IRQ;
  96. mach_gettimeoffset = bvme6000_gettimeoffset;
  97. mach_hwclk = bvme6000_hwclk;
  98. mach_set_clock_mmss = bvme6000_set_clock_mmss;
  99. mach_reset = bvme6000_reset;
  100. mach_get_model = bvme6000_get_model;
  101. printk ("Board is %sconfigured as a System Controller\n",
  102. *config_reg_ptr & BVME_CONFIG_SW1 ? "" : "not ");
  103. /* Now do the PIT configuration */
  104. pit->pgcr = 0x00; /* Unidirectional 8 bit, no handshake for now */
  105. pit->psrr = 0x18; /* PIACK and PIRQ functions enabled */
  106. pit->pacr = 0x00; /* Sub Mode 00, H2 i/p, no DMA */
  107. pit->padr = 0x00; /* Just to be tidy! */
  108. pit->paddr = 0x00; /* All inputs for now (safest) */
  109. pit->pbcr = 0x80; /* Sub Mode 1x, H4 i/p, no DMA */
  110. pit->pbdr = 0xbc | (*config_reg_ptr & BVME_CONFIG_SW1 ? 0 : 0x40);
  111. /* PRI, SYSCON?, Level3, SCC clks from xtal */
  112. pit->pbddr = 0xf3; /* Mostly outputs */
  113. pit->pcdr = 0x01; /* PA transceiver disabled */
  114. pit->pcddr = 0x03; /* WDOG disable */
  115. /* Disable snooping for Ethernet and VME accesses */
  116. bvme_acr_addrctl = 0;
  117. }
  118. irqreturn_t bvme6000_abort_int (int irq, void *dev_id)
  119. {
  120. unsigned long *new = (unsigned long *)vectors;
  121. unsigned long *old = (unsigned long *)0xf8000000;
  122. /* Wait for button release */
  123. while (*(volatile unsigned char *)BVME_LOCAL_IRQ_STAT & BVME_ABORT_STATUS)
  124. ;
  125. *(new+4) = *(old+4); /* Illegal instruction */
  126. *(new+9) = *(old+9); /* Trace */
  127. *(new+47) = *(old+47); /* Trap #15 */
  128. *(new+0x1f) = *(old+0x1f); /* ABORT switch */
  129. return IRQ_HANDLED;
  130. }
  131. static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
  132. {
  133. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  134. unsigned char msr = rtc->msr & 0xc0;
  135. rtc->msr = msr | 0x20; /* Ack the interrupt */
  136. return tick_handler(irq, dev_id);
  137. }
  138. /*
  139. * Set up the RTC timer 1 to mode 2, so T1 output toggles every 5ms
  140. * (40000 x 125ns). It will interrupt every 10ms, when T1 goes low.
  141. * So, when reading the elapsed time, you should read timer1,
  142. * subtract it from 39999, and then add 40000 if T1 is high.
  143. * That gives you the number of 125ns ticks in to the 10ms period,
  144. * so divide by 8 to get the microsecond result.
  145. */
  146. void bvme6000_sched_init (irq_handler_t timer_routine)
  147. {
  148. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  149. unsigned char msr = rtc->msr & 0xc0;
  150. rtc->msr = 0; /* Ensure timer registers accessible */
  151. tick_handler = timer_routine;
  152. if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0,
  153. "timer", bvme6000_timer_int))
  154. panic ("Couldn't register timer int");
  155. rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */
  156. rtc->t1msb = 39999 >> 8;
  157. rtc->t1lsb = 39999 & 0xff;
  158. rtc->irr_icr1 &= 0xef; /* Route timer 1 to INTR pin */
  159. rtc->msr = 0x40; /* Access int.cntrl, etc */
  160. rtc->pfr_icr0 = 0x80; /* Just timer 1 ints enabled */
  161. rtc->irr_icr1 = 0;
  162. rtc->t1cr_omr = 0x0a; /* INTR+T1 active lo, push-pull */
  163. rtc->t0cr_rtmr &= 0xdf; /* Stop timers in standby */
  164. rtc->msr = 0; /* Access timer 1 control */
  165. rtc->t1cr_omr = 0x05; /* Mode 2, ext clk, GO */
  166. rtc->msr = msr;
  167. if (request_irq(BVME_IRQ_ABORT, bvme6000_abort_int, 0,
  168. "abort", bvme6000_abort_int))
  169. panic ("Couldn't register abort int");
  170. }
  171. /* This is always executed with interrupts disabled. */
  172. /*
  173. * NOTE: Don't accept any readings within 5us of rollover, as
  174. * the T1INT bit may be a little slow getting set. There is also
  175. * a fault in the chip, meaning that reads may produce invalid
  176. * results...
  177. */
  178. unsigned long bvme6000_gettimeoffset (void)
  179. {
  180. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  181. volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
  182. unsigned char msr = rtc->msr & 0xc0;
  183. unsigned char t1int, t1op;
  184. unsigned long v = 800000, ov;
  185. rtc->msr = 0; /* Ensure timer registers accessible */
  186. do {
  187. ov = v;
  188. t1int = rtc->msr & 0x20;
  189. t1op = pit->pcdr & 0x04;
  190. rtc->t1cr_omr |= 0x40; /* Latch timer1 */
  191. v = rtc->t1msb << 8; /* Read timer1 */
  192. v |= rtc->t1lsb; /* Read timer1 */
  193. } while (t1int != (rtc->msr & 0x20) ||
  194. t1op != (pit->pcdr & 0x04) ||
  195. abs(ov-v) > 80 ||
  196. v > 39960);
  197. v = 39999 - v;
  198. if (!t1op) /* If in second half cycle.. */
  199. v += 40000;
  200. v /= 8; /* Convert ticks to microseconds */
  201. if (t1int)
  202. v += 10000; /* Int pending, + 10ms */
  203. rtc->msr = msr;
  204. return v;
  205. }
  206. /*
  207. * Looks like op is non-zero for setting the clock, and zero for
  208. * reading the clock.
  209. *
  210. * struct hwclk_time {
  211. * unsigned sec; 0..59
  212. * unsigned min; 0..59
  213. * unsigned hour; 0..23
  214. * unsigned day; 1..31
  215. * unsigned mon; 0..11
  216. * unsigned year; 00...
  217. * int wday; 0..6, 0 is Sunday, -1 means unknown/don't set
  218. * };
  219. */
  220. int bvme6000_hwclk(int op, struct rtc_time *t)
  221. {
  222. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  223. unsigned char msr = rtc->msr & 0xc0;
  224. rtc->msr = 0x40; /* Ensure clock and real-time-mode-register
  225. * are accessible */
  226. if (op)
  227. { /* Write.... */
  228. rtc->t0cr_rtmr = t->tm_year%4;
  229. rtc->bcd_tenms = 0;
  230. rtc->bcd_sec = bin2bcd(t->tm_sec);
  231. rtc->bcd_min = bin2bcd(t->tm_min);
  232. rtc->bcd_hr = bin2bcd(t->tm_hour);
  233. rtc->bcd_dom = bin2bcd(t->tm_mday);
  234. rtc->bcd_mth = bin2bcd(t->tm_mon + 1);
  235. rtc->bcd_year = bin2bcd(t->tm_year%100);
  236. if (t->tm_wday >= 0)
  237. rtc->bcd_dow = bin2bcd(t->tm_wday+1);
  238. rtc->t0cr_rtmr = t->tm_year%4 | 0x08;
  239. }
  240. else
  241. { /* Read.... */
  242. do {
  243. t->tm_sec = bcd2bin(rtc->bcd_sec);
  244. t->tm_min = bcd2bin(rtc->bcd_min);
  245. t->tm_hour = bcd2bin(rtc->bcd_hr);
  246. t->tm_mday = bcd2bin(rtc->bcd_dom);
  247. t->tm_mon = bcd2bin(rtc->bcd_mth)-1;
  248. t->tm_year = bcd2bin(rtc->bcd_year);
  249. if (t->tm_year < 70)
  250. t->tm_year += 100;
  251. t->tm_wday = bcd2bin(rtc->bcd_dow)-1;
  252. } while (t->tm_sec != bcd2bin(rtc->bcd_sec));
  253. }
  254. rtc->msr = msr;
  255. return 0;
  256. }
  257. /*
  258. * Set the minutes and seconds from seconds value 'nowtime'. Fail if
  259. * clock is out by > 30 minutes. Logic lifted from atari code.
  260. * Algorithm is to wait for the 10ms register to change, and then to
  261. * wait a short while, and then set it.
  262. */
  263. int bvme6000_set_clock_mmss (unsigned long nowtime)
  264. {
  265. int retval = 0;
  266. short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
  267. unsigned char rtc_minutes, rtc_tenms;
  268. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  269. unsigned char msr = rtc->msr & 0xc0;
  270. unsigned long flags;
  271. volatile int i;
  272. rtc->msr = 0; /* Ensure clock accessible */
  273. rtc_minutes = bcd2bin (rtc->bcd_min);
  274. if ((rtc_minutes < real_minutes
  275. ? real_minutes - rtc_minutes
  276. : rtc_minutes - real_minutes) < 30)
  277. {
  278. local_irq_save(flags);
  279. rtc_tenms = rtc->bcd_tenms;
  280. while (rtc_tenms == rtc->bcd_tenms)
  281. ;
  282. for (i = 0; i < 1000; i++)
  283. ;
  284. rtc->bcd_min = bin2bcd(real_minutes);
  285. rtc->bcd_sec = bin2bcd(real_seconds);
  286. local_irq_restore(flags);
  287. }
  288. else
  289. retval = -1;
  290. rtc->msr = msr;
  291. return retval;
  292. }