ptrace.c 10 KB

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  1. /*
  2. * Copyright (C) 2000-2007, Axis Communications AB.
  3. */
  4. #include <linux/kernel.h>
  5. #include <linux/sched.h>
  6. #include <linux/mm.h>
  7. #include <linux/smp.h>
  8. #include <linux/errno.h>
  9. #include <linux/ptrace.h>
  10. #include <linux/user.h>
  11. #include <linux/signal.h>
  12. #include <linux/security.h>
  13. #include <asm/uaccess.h>
  14. #include <asm/page.h>
  15. #include <asm/pgtable.h>
  16. #include <asm/processor.h>
  17. #include <arch/hwregs/supp_reg.h>
  18. /*
  19. * Determines which bits in CCS the user has access to.
  20. * 1 = access, 0 = no access.
  21. */
  22. #define CCS_MASK 0x00087c00 /* SXNZVC */
  23. #define SBIT_USER (1 << (S_CCS_BITNR + CCS_SHIFT))
  24. static int put_debugreg(long pid, unsigned int regno, long data);
  25. static long get_debugreg(long pid, unsigned int regno);
  26. static unsigned long get_pseudo_pc(struct task_struct *child);
  27. void deconfigure_bp(long pid);
  28. extern unsigned long cris_signal_return_page;
  29. /*
  30. * Get contents of register REGNO in task TASK.
  31. */
  32. long get_reg(struct task_struct *task, unsigned int regno)
  33. {
  34. /* USP is a special case, it's not in the pt_regs struct but
  35. * in the tasks thread struct
  36. */
  37. unsigned long ret;
  38. if (regno <= PT_EDA)
  39. ret = ((unsigned long *)task_pt_regs(task))[regno];
  40. else if (regno == PT_USP)
  41. ret = task->thread.usp;
  42. else if (regno == PT_PPC)
  43. ret = get_pseudo_pc(task);
  44. else if (regno <= PT_MAX)
  45. ret = get_debugreg(task->pid, regno);
  46. else
  47. ret = 0;
  48. return ret;
  49. }
  50. /*
  51. * Write contents of register REGNO in task TASK.
  52. */
  53. int put_reg(struct task_struct *task, unsigned int regno, unsigned long data)
  54. {
  55. if (regno <= PT_EDA)
  56. ((unsigned long *)task_pt_regs(task))[regno] = data;
  57. else if (regno == PT_USP)
  58. task->thread.usp = data;
  59. else if (regno == PT_PPC) {
  60. /* Write pseudo-PC to ERP only if changed. */
  61. if (data != get_pseudo_pc(task))
  62. task_pt_regs(task)->erp = data;
  63. } else if (regno <= PT_MAX)
  64. return put_debugreg(task->pid, regno, data);
  65. else
  66. return -1;
  67. return 0;
  68. }
  69. void user_enable_single_step(struct task_struct *child)
  70. {
  71. unsigned long tmp;
  72. /*
  73. * Set up SPC if not set already (in which case we have no other
  74. * choice but to trust it).
  75. */
  76. if (!get_reg(child, PT_SPC)) {
  77. /* In case we're stopped in a delay slot. */
  78. tmp = get_reg(child, PT_ERP) & ~1;
  79. put_reg(child, PT_SPC, tmp);
  80. }
  81. tmp = get_reg(child, PT_CCS) | SBIT_USER;
  82. put_reg(child, PT_CCS, tmp);
  83. }
  84. void user_disable_single_step(struct task_struct *child)
  85. {
  86. put_reg(child, PT_SPC, 0);
  87. if (!get_debugreg(child->pid, PT_BP_CTRL)) {
  88. unsigned long tmp;
  89. /* If no h/w bp configured, disable S bit. */
  90. tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
  91. put_reg(child, PT_CCS, tmp);
  92. }
  93. }
  94. /*
  95. * Called by kernel/ptrace.c when detaching.
  96. *
  97. * Make sure the single step bit is not set.
  98. */
  99. void
  100. ptrace_disable(struct task_struct *child)
  101. {
  102. unsigned long tmp;
  103. /* Deconfigure SPC and S-bit. */
  104. user_disable_single_step(child);
  105. put_reg(child, PT_SPC, 0);
  106. /* Deconfigure any watchpoints associated with the child. */
  107. deconfigure_bp(child->pid);
  108. }
  109. long arch_ptrace(struct task_struct *child, long request,
  110. unsigned long addr, unsigned long data)
  111. {
  112. int ret;
  113. unsigned int regno = addr >> 2;
  114. unsigned long __user *datap = (unsigned long __user *)data;
  115. switch (request) {
  116. /* Read word at location address. */
  117. case PTRACE_PEEKTEXT:
  118. case PTRACE_PEEKDATA: {
  119. unsigned long tmp;
  120. int copied;
  121. ret = -EIO;
  122. /* The signal trampoline page is outside the normal user-addressable
  123. * space but still accessible. This is hack to make it possible to
  124. * access the signal handler code in GDB.
  125. */
  126. if ((addr & PAGE_MASK) == cris_signal_return_page) {
  127. /* The trampoline page is globally mapped, no page table to traverse.*/
  128. tmp = *(unsigned long*)addr;
  129. } else {
  130. copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
  131. if (copied != sizeof(tmp))
  132. break;
  133. }
  134. ret = put_user(tmp,datap);
  135. break;
  136. }
  137. /* Read the word at location address in the USER area. */
  138. case PTRACE_PEEKUSR: {
  139. unsigned long tmp;
  140. ret = -EIO;
  141. if ((addr & 3) || regno > PT_MAX)
  142. break;
  143. tmp = get_reg(child, regno);
  144. ret = put_user(tmp, datap);
  145. break;
  146. }
  147. /* Write the word at location address. */
  148. case PTRACE_POKETEXT:
  149. case PTRACE_POKEDATA:
  150. ret = generic_ptrace_pokedata(child, addr, data);
  151. break;
  152. /* Write the word at location address in the USER area. */
  153. case PTRACE_POKEUSR:
  154. ret = -EIO;
  155. if ((addr & 3) || regno > PT_MAX)
  156. break;
  157. if (regno == PT_CCS) {
  158. /* don't allow the tracing process to change stuff like
  159. * interrupt enable, kernel/user bit, dma enables etc.
  160. */
  161. data &= CCS_MASK;
  162. data |= get_reg(child, PT_CCS) & ~CCS_MASK;
  163. }
  164. if (put_reg(child, regno, data))
  165. break;
  166. ret = 0;
  167. break;
  168. /* Get all GP registers from the child. */
  169. case PTRACE_GETREGS: {
  170. int i;
  171. unsigned long tmp;
  172. for (i = 0; i <= PT_MAX; i++) {
  173. tmp = get_reg(child, i);
  174. if (put_user(tmp, datap)) {
  175. ret = -EFAULT;
  176. goto out_tsk;
  177. }
  178. datap++;
  179. }
  180. ret = 0;
  181. break;
  182. }
  183. /* Set all GP registers in the child. */
  184. case PTRACE_SETREGS: {
  185. int i;
  186. unsigned long tmp;
  187. for (i = 0; i <= PT_MAX; i++) {
  188. if (get_user(tmp, datap)) {
  189. ret = -EFAULT;
  190. goto out_tsk;
  191. }
  192. if (i == PT_CCS) {
  193. tmp &= CCS_MASK;
  194. tmp |= get_reg(child, PT_CCS) & ~CCS_MASK;
  195. }
  196. put_reg(child, i, tmp);
  197. datap++;
  198. }
  199. ret = 0;
  200. break;
  201. }
  202. default:
  203. ret = ptrace_request(child, request, addr, data);
  204. break;
  205. }
  206. out_tsk:
  207. return ret;
  208. }
  209. void do_syscall_trace(void)
  210. {
  211. if (!test_thread_flag(TIF_SYSCALL_TRACE))
  212. return;
  213. if (!(current->ptrace & PT_PTRACED))
  214. return;
  215. /* the 0x80 provides a way for the tracing parent to distinguish
  216. between a syscall stop and SIGTRAP delivery */
  217. ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
  218. ? 0x80 : 0));
  219. /*
  220. * This isn't the same as continuing with a signal, but it will do for
  221. * normal use.
  222. */
  223. if (current->exit_code) {
  224. send_sig(current->exit_code, current, 1);
  225. current->exit_code = 0;
  226. }
  227. }
  228. /* Returns the size of an instruction that has a delay slot. */
  229. static int insn_size(struct task_struct *child, unsigned long pc)
  230. {
  231. unsigned long opcode;
  232. int copied;
  233. int opsize = 0;
  234. /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
  235. copied = access_process_vm(child, pc, &opcode, sizeof(opcode), 0);
  236. if (copied != sizeof(opcode))
  237. return 0;
  238. switch ((opcode & 0x0f00) >> 8) {
  239. case 0x0:
  240. case 0x9:
  241. case 0xb:
  242. opsize = 2;
  243. break;
  244. case 0xe:
  245. case 0xf:
  246. opsize = 6;
  247. break;
  248. case 0xd:
  249. /* Could be 4 or 6; check more bits. */
  250. if ((opcode & 0xff) == 0xff)
  251. opsize = 4;
  252. else
  253. opsize = 6;
  254. break;
  255. default:
  256. panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
  257. opcode, pc);
  258. }
  259. return opsize;
  260. }
  261. static unsigned long get_pseudo_pc(struct task_struct *child)
  262. {
  263. /* Default value for PC is ERP. */
  264. unsigned long pc = get_reg(child, PT_ERP);
  265. if (pc & 0x1) {
  266. unsigned long spc = get_reg(child, PT_SPC);
  267. /* Delay slot bit set. Report as stopped on proper
  268. instruction. */
  269. if (spc) {
  270. /* Rely on SPC if set. FIXME: We might want to check
  271. that EXS indicates we stopped due to a single-step
  272. exception. */
  273. pc = spc;
  274. } else {
  275. /* Calculate the PC from the size of the instruction
  276. that the delay slot we're in belongs to. */
  277. pc += insn_size(child, pc & ~1) - 1;
  278. }
  279. }
  280. return pc;
  281. }
  282. static long bp_owner = 0;
  283. /* Reachable from exit_thread in signal.c, so not static. */
  284. void deconfigure_bp(long pid)
  285. {
  286. int bp;
  287. /* Only deconfigure if the pid is the owner. */
  288. if (bp_owner != pid)
  289. return;
  290. for (bp = 0; bp < 6; bp++) {
  291. unsigned long tmp;
  292. /* Deconfigure start and end address (also gets rid of ownership). */
  293. put_debugreg(pid, PT_BP + 3 + (bp * 2), 0);
  294. put_debugreg(pid, PT_BP + 4 + (bp * 2), 0);
  295. /* Deconfigure relevant bits in control register. */
  296. tmp = get_debugreg(pid, PT_BP_CTRL) & ~(3 << (2 + (bp * 4)));
  297. put_debugreg(pid, PT_BP_CTRL, tmp);
  298. }
  299. /* No owner now. */
  300. bp_owner = 0;
  301. }
  302. static int put_debugreg(long pid, unsigned int regno, long data)
  303. {
  304. int ret = 0;
  305. register int old_srs;
  306. #ifdef CONFIG_ETRAX_KGDB
  307. /* Ignore write, but pretend it was ok if value is 0
  308. (we don't want POKEUSR/SETREGS failing unnessecarily). */
  309. return (data == 0) ? ret : -1;
  310. #endif
  311. /* Simple owner management. */
  312. if (!bp_owner)
  313. bp_owner = pid;
  314. else if (bp_owner != pid) {
  315. /* Ignore write, but pretend it was ok if value is 0
  316. (we don't want POKEUSR/SETREGS failing unnessecarily). */
  317. return (data == 0) ? ret : -1;
  318. }
  319. /* Remember old SRS. */
  320. SPEC_REG_RD(SPEC_REG_SRS, old_srs);
  321. /* Switch to BP bank. */
  322. SUPP_BANK_SEL(BANK_BP);
  323. switch (regno - PT_BP) {
  324. case 0:
  325. SUPP_REG_WR(0, data); break;
  326. case 1:
  327. case 2:
  328. if (data)
  329. ret = -1;
  330. break;
  331. case 3:
  332. SUPP_REG_WR(3, data); break;
  333. case 4:
  334. SUPP_REG_WR(4, data); break;
  335. case 5:
  336. SUPP_REG_WR(5, data); break;
  337. case 6:
  338. SUPP_REG_WR(6, data); break;
  339. case 7:
  340. SUPP_REG_WR(7, data); break;
  341. case 8:
  342. SUPP_REG_WR(8, data); break;
  343. case 9:
  344. SUPP_REG_WR(9, data); break;
  345. case 10:
  346. SUPP_REG_WR(10, data); break;
  347. case 11:
  348. SUPP_REG_WR(11, data); break;
  349. case 12:
  350. SUPP_REG_WR(12, data); break;
  351. case 13:
  352. SUPP_REG_WR(13, data); break;
  353. case 14:
  354. SUPP_REG_WR(14, data); break;
  355. default:
  356. ret = -1;
  357. break;
  358. }
  359. /* Restore SRS. */
  360. SPEC_REG_WR(SPEC_REG_SRS, old_srs);
  361. /* Just for show. */
  362. NOP();
  363. NOP();
  364. NOP();
  365. return ret;
  366. }
  367. static long get_debugreg(long pid, unsigned int regno)
  368. {
  369. register int old_srs;
  370. register long data;
  371. if (pid != bp_owner) {
  372. return 0;
  373. }
  374. /* Remember old SRS. */
  375. SPEC_REG_RD(SPEC_REG_SRS, old_srs);
  376. /* Switch to BP bank. */
  377. SUPP_BANK_SEL(BANK_BP);
  378. switch (regno - PT_BP) {
  379. case 0:
  380. SUPP_REG_RD(0, data); break;
  381. case 1:
  382. case 2:
  383. /* error return value? */
  384. data = 0;
  385. break;
  386. case 3:
  387. SUPP_REG_RD(3, data); break;
  388. case 4:
  389. SUPP_REG_RD(4, data); break;
  390. case 5:
  391. SUPP_REG_RD(5, data); break;
  392. case 6:
  393. SUPP_REG_RD(6, data); break;
  394. case 7:
  395. SUPP_REG_RD(7, data); break;
  396. case 8:
  397. SUPP_REG_RD(8, data); break;
  398. case 9:
  399. SUPP_REG_RD(9, data); break;
  400. case 10:
  401. SUPP_REG_RD(10, data); break;
  402. case 11:
  403. SUPP_REG_RD(11, data); break;
  404. case 12:
  405. SUPP_REG_RD(12, data); break;
  406. case 13:
  407. SUPP_REG_RD(13, data); break;
  408. case 14:
  409. SUPP_REG_RD(14, data); break;
  410. default:
  411. /* error return value? */
  412. data = 0;
  413. }
  414. /* Restore SRS. */
  415. SPEC_REG_WR(SPEC_REG_SRS, old_srs);
  416. /* Just for show. */
  417. NOP();
  418. NOP();
  419. NOP();
  420. return data;
  421. }