rx.h 3.1 KB

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  1. /*
  2. * This file is part of wl1251
  3. *
  4. * Copyright (c) 1998-2007 Texas Instruments Incorporated
  5. * Copyright (C) 2008 Nokia Corporation
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  19. * 02110-1301 USA
  20. *
  21. */
  22. #ifndef __WL1251_RX_H__
  23. #define __WL1251_RX_H__
  24. #include <linux/bitops.h>
  25. #include "wl1251.h"
  26. /*
  27. * RX PATH
  28. *
  29. * The Rx path uses a double buffer and an rx_contro structure, each located
  30. * at a fixed address in the device memory. The host keeps track of which
  31. * buffer is available and alternates between them on a per packet basis.
  32. * The size of each of the two buffers is large enough to hold the longest
  33. * 802.3 packet.
  34. * The RX path goes like that:
  35. * 1) The target generates an interrupt each time a new packet is received.
  36. * There are 2 RX interrupts, one for each buffer.
  37. * 2) The host reads the received packet from one of the double buffers.
  38. * 3) The host triggers a target interrupt.
  39. * 4) The target prepares the next RX packet.
  40. */
  41. #define WL1251_RX_MAX_RSSI -30
  42. #define WL1251_RX_MIN_RSSI -95
  43. #define WL1251_RX_ALIGN_TO 4
  44. #define WL1251_RX_ALIGN(len) (((len) + WL1251_RX_ALIGN_TO - 1) & \
  45. ~(WL1251_RX_ALIGN_TO - 1))
  46. #define SHORT_PREAMBLE_BIT BIT(0)
  47. #define OFDM_RATE_BIT BIT(6)
  48. #define PBCC_RATE_BIT BIT(7)
  49. #define PLCP_HEADER_LENGTH 8
  50. #define RX_DESC_PACKETID_SHIFT 11
  51. #define RX_MAX_PACKET_ID 3
  52. #define RX_DESC_VALID_FCS 0x0001
  53. #define RX_DESC_MATCH_RXADDR1 0x0002
  54. #define RX_DESC_MCAST 0x0004
  55. #define RX_DESC_STAINTIM 0x0008
  56. #define RX_DESC_VIRTUAL_BM 0x0010
  57. #define RX_DESC_BCAST 0x0020
  58. #define RX_DESC_MATCH_SSID 0x0040
  59. #define RX_DESC_MATCH_BSSID 0x0080
  60. #define RX_DESC_ENCRYPTION_MASK 0x0300
  61. #define RX_DESC_MEASURMENT 0x0400
  62. #define RX_DESC_SEQNUM_MASK 0x1800
  63. #define RX_DESC_MIC_FAIL 0x2000
  64. #define RX_DESC_DECRYPT_FAIL 0x4000
  65. struct wl1251_rx_descriptor {
  66. u32 timestamp; /* In microseconds */
  67. u16 length; /* Paylod length, including headers */
  68. u16 flags;
  69. /*
  70. * 0 - 802.11
  71. * 1 - 802.3
  72. * 2 - IP
  73. * 3 - Raw Codec
  74. */
  75. u8 type;
  76. /*
  77. * Received Rate:
  78. * 0x0A - 1MBPS
  79. * 0x14 - 2MBPS
  80. * 0x37 - 5_5MBPS
  81. * 0x0B - 6MBPS
  82. * 0x0F - 9MBPS
  83. * 0x6E - 11MBPS
  84. * 0x0A - 12MBPS
  85. * 0x0E - 18MBPS
  86. * 0xDC - 22MBPS
  87. * 0x09 - 24MBPS
  88. * 0x0D - 36MBPS
  89. * 0x08 - 48MBPS
  90. * 0x0C - 54MBPS
  91. */
  92. u8 rate;
  93. u8 mod_pre; /* Modulation and preamble */
  94. u8 channel;
  95. /*
  96. * 0 - 2.4 Ghz
  97. * 1 - 5 Ghz
  98. */
  99. u8 band;
  100. s8 rssi; /* in dB */
  101. u8 rcpi; /* in dB */
  102. u8 snr; /* in dB */
  103. } __packed;
  104. void wl1251_rx(struct wl1251 *wl);
  105. #endif