rt2x00pci.c 8.6 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00pci
  19. Abstract: rt2x00 generic pci device routines.
  20. */
  21. #include <linux/dma-mapping.h>
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/pci.h>
  25. #include <linux/slab.h>
  26. #include "rt2x00.h"
  27. #include "rt2x00pci.h"
  28. /*
  29. * Register access.
  30. */
  31. int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
  32. const unsigned int offset,
  33. const struct rt2x00_field32 field,
  34. u32 *reg)
  35. {
  36. unsigned int i;
  37. if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
  38. return 0;
  39. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  40. rt2x00pci_register_read(rt2x00dev, offset, reg);
  41. if (!rt2x00_get_field32(*reg, field))
  42. return 1;
  43. udelay(REGISTER_BUSY_DELAY);
  44. }
  45. printk_once(KERN_ERR "%s() Indirect register access failed: "
  46. "offset=0x%.08x, value=0x%.08x\n", __func__, offset, *reg);
  47. *reg = ~0;
  48. return 0;
  49. }
  50. EXPORT_SYMBOL_GPL(rt2x00pci_regbusy_read);
  51. bool rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev)
  52. {
  53. struct data_queue *queue = rt2x00dev->rx;
  54. struct queue_entry *entry;
  55. struct queue_entry_priv_pci *entry_priv;
  56. struct skb_frame_desc *skbdesc;
  57. int max_rx = 16;
  58. while (--max_rx) {
  59. entry = rt2x00queue_get_entry(queue, Q_INDEX);
  60. entry_priv = entry->priv_data;
  61. if (rt2x00dev->ops->lib->get_entry_state(entry))
  62. break;
  63. /*
  64. * Fill in desc fields of the skb descriptor
  65. */
  66. skbdesc = get_skb_frame_desc(entry->skb);
  67. skbdesc->desc = entry_priv->desc;
  68. skbdesc->desc_len = entry->queue->desc_size;
  69. /*
  70. * DMA is already done, notify rt2x00lib that
  71. * it finished successfully.
  72. */
  73. rt2x00lib_dmastart(entry);
  74. rt2x00lib_dmadone(entry);
  75. /*
  76. * Send the frame to rt2x00lib for further processing.
  77. */
  78. rt2x00lib_rxdone(entry);
  79. }
  80. return !max_rx;
  81. }
  82. EXPORT_SYMBOL_GPL(rt2x00pci_rxdone);
  83. void rt2x00pci_flush_queue(struct data_queue *queue, bool drop)
  84. {
  85. unsigned int i;
  86. for (i = 0; !rt2x00queue_empty(queue) && i < 10; i++)
  87. msleep(10);
  88. }
  89. EXPORT_SYMBOL_GPL(rt2x00pci_flush_queue);
  90. /*
  91. * Device initialization handlers.
  92. */
  93. static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev,
  94. struct data_queue *queue)
  95. {
  96. struct queue_entry_priv_pci *entry_priv;
  97. void *addr;
  98. dma_addr_t dma;
  99. unsigned int i;
  100. /*
  101. * Allocate DMA memory for descriptor and buffer.
  102. */
  103. addr = dma_alloc_coherent(rt2x00dev->dev,
  104. queue->limit * queue->desc_size,
  105. &dma, GFP_KERNEL);
  106. if (!addr)
  107. return -ENOMEM;
  108. memset(addr, 0, queue->limit * queue->desc_size);
  109. /*
  110. * Initialize all queue entries to contain valid addresses.
  111. */
  112. for (i = 0; i < queue->limit; i++) {
  113. entry_priv = queue->entries[i].priv_data;
  114. entry_priv->desc = addr + i * queue->desc_size;
  115. entry_priv->desc_dma = dma + i * queue->desc_size;
  116. }
  117. return 0;
  118. }
  119. static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev,
  120. struct data_queue *queue)
  121. {
  122. struct queue_entry_priv_pci *entry_priv =
  123. queue->entries[0].priv_data;
  124. if (entry_priv->desc)
  125. dma_free_coherent(rt2x00dev->dev,
  126. queue->limit * queue->desc_size,
  127. entry_priv->desc, entry_priv->desc_dma);
  128. entry_priv->desc = NULL;
  129. }
  130. int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev)
  131. {
  132. struct data_queue *queue;
  133. int status;
  134. /*
  135. * Allocate DMA
  136. */
  137. queue_for_each(rt2x00dev, queue) {
  138. status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue);
  139. if (status)
  140. goto exit;
  141. }
  142. /*
  143. * Register interrupt handler.
  144. */
  145. status = request_irq(rt2x00dev->irq,
  146. rt2x00dev->ops->lib->irq_handler,
  147. IRQF_SHARED, rt2x00dev->name, rt2x00dev);
  148. if (status) {
  149. ERROR(rt2x00dev, "IRQ %d allocation failed (error %d).\n",
  150. rt2x00dev->irq, status);
  151. goto exit;
  152. }
  153. return 0;
  154. exit:
  155. queue_for_each(rt2x00dev, queue)
  156. rt2x00pci_free_queue_dma(rt2x00dev, queue);
  157. return status;
  158. }
  159. EXPORT_SYMBOL_GPL(rt2x00pci_initialize);
  160. void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev)
  161. {
  162. struct data_queue *queue;
  163. /*
  164. * Free irq line.
  165. */
  166. free_irq(rt2x00dev->irq, rt2x00dev);
  167. /*
  168. * Free DMA
  169. */
  170. queue_for_each(rt2x00dev, queue)
  171. rt2x00pci_free_queue_dma(rt2x00dev, queue);
  172. }
  173. EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize);
  174. /*
  175. * PCI driver handlers.
  176. */
  177. static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev)
  178. {
  179. kfree(rt2x00dev->rf);
  180. rt2x00dev->rf = NULL;
  181. kfree(rt2x00dev->eeprom);
  182. rt2x00dev->eeprom = NULL;
  183. if (rt2x00dev->csr.base) {
  184. iounmap(rt2x00dev->csr.base);
  185. rt2x00dev->csr.base = NULL;
  186. }
  187. }
  188. static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev)
  189. {
  190. struct pci_dev *pci_dev = to_pci_dev(rt2x00dev->dev);
  191. rt2x00dev->csr.base = pci_ioremap_bar(pci_dev, 0);
  192. if (!rt2x00dev->csr.base)
  193. goto exit;
  194. rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
  195. if (!rt2x00dev->eeprom)
  196. goto exit;
  197. rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL);
  198. if (!rt2x00dev->rf)
  199. goto exit;
  200. return 0;
  201. exit:
  202. ERROR_PROBE("Failed to allocate registers.\n");
  203. rt2x00pci_free_reg(rt2x00dev);
  204. return -ENOMEM;
  205. }
  206. int rt2x00pci_probe(struct pci_dev *pci_dev, const struct rt2x00_ops *ops)
  207. {
  208. struct ieee80211_hw *hw;
  209. struct rt2x00_dev *rt2x00dev;
  210. int retval;
  211. retval = pci_enable_device(pci_dev);
  212. if (retval) {
  213. ERROR_PROBE("Enable device failed.\n");
  214. return retval;
  215. }
  216. retval = pci_request_regions(pci_dev, pci_name(pci_dev));
  217. if (retval) {
  218. ERROR_PROBE("PCI request regions failed.\n");
  219. goto exit_disable_device;
  220. }
  221. pci_set_master(pci_dev);
  222. if (pci_set_mwi(pci_dev))
  223. ERROR_PROBE("MWI not available.\n");
  224. if (dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32))) {
  225. ERROR_PROBE("PCI DMA not supported.\n");
  226. retval = -EIO;
  227. goto exit_release_regions;
  228. }
  229. hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
  230. if (!hw) {
  231. ERROR_PROBE("Failed to allocate hardware.\n");
  232. retval = -ENOMEM;
  233. goto exit_release_regions;
  234. }
  235. pci_set_drvdata(pci_dev, hw);
  236. rt2x00dev = hw->priv;
  237. rt2x00dev->dev = &pci_dev->dev;
  238. rt2x00dev->ops = ops;
  239. rt2x00dev->hw = hw;
  240. rt2x00dev->irq = pci_dev->irq;
  241. rt2x00dev->name = pci_name(pci_dev);
  242. if (pci_is_pcie(pci_dev))
  243. rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE);
  244. else
  245. rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI);
  246. retval = rt2x00pci_alloc_reg(rt2x00dev);
  247. if (retval)
  248. goto exit_free_device;
  249. retval = rt2x00lib_probe_dev(rt2x00dev);
  250. if (retval)
  251. goto exit_free_reg;
  252. return 0;
  253. exit_free_reg:
  254. rt2x00pci_free_reg(rt2x00dev);
  255. exit_free_device:
  256. ieee80211_free_hw(hw);
  257. exit_release_regions:
  258. pci_release_regions(pci_dev);
  259. exit_disable_device:
  260. pci_disable_device(pci_dev);
  261. pci_set_drvdata(pci_dev, NULL);
  262. return retval;
  263. }
  264. EXPORT_SYMBOL_GPL(rt2x00pci_probe);
  265. void rt2x00pci_remove(struct pci_dev *pci_dev)
  266. {
  267. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  268. struct rt2x00_dev *rt2x00dev = hw->priv;
  269. /*
  270. * Free all allocated data.
  271. */
  272. rt2x00lib_remove_dev(rt2x00dev);
  273. rt2x00pci_free_reg(rt2x00dev);
  274. ieee80211_free_hw(hw);
  275. /*
  276. * Free the PCI device data.
  277. */
  278. pci_set_drvdata(pci_dev, NULL);
  279. pci_disable_device(pci_dev);
  280. pci_release_regions(pci_dev);
  281. }
  282. EXPORT_SYMBOL_GPL(rt2x00pci_remove);
  283. #ifdef CONFIG_PM
  284. int rt2x00pci_suspend(struct pci_dev *pci_dev, pm_message_t state)
  285. {
  286. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  287. struct rt2x00_dev *rt2x00dev = hw->priv;
  288. int retval;
  289. retval = rt2x00lib_suspend(rt2x00dev, state);
  290. if (retval)
  291. return retval;
  292. pci_save_state(pci_dev);
  293. pci_disable_device(pci_dev);
  294. return pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
  295. }
  296. EXPORT_SYMBOL_GPL(rt2x00pci_suspend);
  297. int rt2x00pci_resume(struct pci_dev *pci_dev)
  298. {
  299. struct ieee80211_hw *hw = pci_get_drvdata(pci_dev);
  300. struct rt2x00_dev *rt2x00dev = hw->priv;
  301. if (pci_set_power_state(pci_dev, PCI_D0) ||
  302. pci_enable_device(pci_dev)) {
  303. ERROR(rt2x00dev, "Failed to resume device.\n");
  304. return -EIO;
  305. }
  306. pci_restore_state(pci_dev);
  307. return rt2x00lib_resume(rt2x00dev);
  308. }
  309. EXPORT_SYMBOL_GPL(rt2x00pci_resume);
  310. #endif /* CONFIG_PM */
  311. /*
  312. * rt2x00pci module information.
  313. */
  314. MODULE_AUTHOR(DRV_PROJECT);
  315. MODULE_VERSION(DRV_VERSION);
  316. MODULE_DESCRIPTION("rt2x00 pci library");
  317. MODULE_LICENSE("GPL");