rt2800pci.h 4.0 KB

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  1. /*
  2. Copyright (C) 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. Copyright (C) 2009 Alban Browaeys <prahal@yahoo.com>
  4. Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
  5. Copyright (C) 2009 Luis Correia <luis.f.correia@gmail.com>
  6. Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
  7. Copyright (C) 2009 Mark Asselstine <asselsm@gmail.com>
  8. Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
  9. Copyright (C) 2009 Bart Zolnierkiewicz <bzolnier@gmail.com>
  10. <http://rt2x00.serialmonkey.com>
  11. This program is free software; you can redistribute it and/or modify
  12. it under the terms of the GNU General Public License as published by
  13. the Free Software Foundation; either version 2 of the License, or
  14. (at your option) any later version.
  15. This program is distributed in the hope that it will be useful,
  16. but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. GNU General Public License for more details.
  19. You should have received a copy of the GNU General Public License
  20. along with this program; if not, write to the
  21. Free Software Foundation, Inc.,
  22. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  23. */
  24. /*
  25. Module: rt2800pci
  26. Abstract: Data structures and registers for the rt2800pci module.
  27. Supported chipsets: RT2800E & RT2800ED.
  28. */
  29. #ifndef RT2800PCI_H
  30. #define RT2800PCI_H
  31. /*
  32. * Queue register offset macros
  33. */
  34. #define TX_QUEUE_REG_OFFSET 0x10
  35. #define TX_BASE_PTR(__x) (TX_BASE_PTR0 + ((__x) * TX_QUEUE_REG_OFFSET))
  36. #define TX_MAX_CNT(__x) (TX_MAX_CNT0 + ((__x) * TX_QUEUE_REG_OFFSET))
  37. #define TX_CTX_IDX(__x) (TX_CTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET))
  38. #define TX_DTX_IDX(__x) (TX_DTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET))
  39. /*
  40. * 8051 firmware image.
  41. */
  42. #define FIRMWARE_RT2860 "rt2860.bin"
  43. #define FIRMWARE_IMAGE_BASE 0x2000
  44. /*
  45. * DMA descriptor defines.
  46. */
  47. #define TXD_DESC_SIZE (4 * sizeof(__le32))
  48. #define RXD_DESC_SIZE (4 * sizeof(__le32))
  49. /*
  50. * TX descriptor format for TX, PRIO and Beacon Ring.
  51. */
  52. /*
  53. * Word0
  54. */
  55. #define TXD_W0_SD_PTR0 FIELD32(0xffffffff)
  56. /*
  57. * Word1
  58. */
  59. #define TXD_W1_SD_LEN1 FIELD32(0x00003fff)
  60. #define TXD_W1_LAST_SEC1 FIELD32(0x00004000)
  61. #define TXD_W1_BURST FIELD32(0x00008000)
  62. #define TXD_W1_SD_LEN0 FIELD32(0x3fff0000)
  63. #define TXD_W1_LAST_SEC0 FIELD32(0x40000000)
  64. #define TXD_W1_DMA_DONE FIELD32(0x80000000)
  65. /*
  66. * Word2
  67. */
  68. #define TXD_W2_SD_PTR1 FIELD32(0xffffffff)
  69. /*
  70. * Word3
  71. * WIV: Wireless Info Valid. 1: Driver filled WI, 0: DMA needs to copy WI
  72. * QSEL: Select on-chip FIFO ID for 2nd-stage output scheduler.
  73. * 0:MGMT, 1:HCCA 2:EDCA
  74. */
  75. #define TXD_W3_WIV FIELD32(0x01000000)
  76. #define TXD_W3_QSEL FIELD32(0x06000000)
  77. #define TXD_W3_TCO FIELD32(0x20000000)
  78. #define TXD_W3_UCO FIELD32(0x40000000)
  79. #define TXD_W3_ICO FIELD32(0x80000000)
  80. /*
  81. * RX descriptor format for RX Ring.
  82. */
  83. /*
  84. * Word0
  85. */
  86. #define RXD_W0_SDP0 FIELD32(0xffffffff)
  87. /*
  88. * Word1
  89. */
  90. #define RXD_W1_SDL1 FIELD32(0x00003fff)
  91. #define RXD_W1_SDL0 FIELD32(0x3fff0000)
  92. #define RXD_W1_LS0 FIELD32(0x40000000)
  93. #define RXD_W1_DMA_DONE FIELD32(0x80000000)
  94. /*
  95. * Word2
  96. */
  97. #define RXD_W2_SDP1 FIELD32(0xffffffff)
  98. /*
  99. * Word3
  100. * AMSDU: RX with 802.3 header, not 802.11 header.
  101. * DECRYPTED: This frame is being decrypted.
  102. */
  103. #define RXD_W3_BA FIELD32(0x00000001)
  104. #define RXD_W3_DATA FIELD32(0x00000002)
  105. #define RXD_W3_NULLDATA FIELD32(0x00000004)
  106. #define RXD_W3_FRAG FIELD32(0x00000008)
  107. #define RXD_W3_UNICAST_TO_ME FIELD32(0x00000010)
  108. #define RXD_W3_MULTICAST FIELD32(0x00000020)
  109. #define RXD_W3_BROADCAST FIELD32(0x00000040)
  110. #define RXD_W3_MY_BSS FIELD32(0x00000080)
  111. #define RXD_W3_CRC_ERROR FIELD32(0x00000100)
  112. #define RXD_W3_CIPHER_ERROR FIELD32(0x00000600)
  113. #define RXD_W3_AMSDU FIELD32(0x00000800)
  114. #define RXD_W3_HTC FIELD32(0x00001000)
  115. #define RXD_W3_RSSI FIELD32(0x00002000)
  116. #define RXD_W3_L2PAD FIELD32(0x00004000)
  117. #define RXD_W3_AMPDU FIELD32(0x00008000)
  118. #define RXD_W3_DECRYPTED FIELD32(0x00010000)
  119. #define RXD_W3_PLCP_SIGNAL FIELD32(0x00020000)
  120. #define RXD_W3_PLCP_RSSI FIELD32(0x00040000)
  121. #endif /* RT2800PCI_H */