fwio.c 21 KB

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  1. /*
  2. * Firmware I/O code for mac80211 Prism54 drivers
  3. *
  4. * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  5. * Copyright (c) 2007-2009, Christian Lamparter <chunkeey@web.de>
  6. * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
  7. *
  8. * Based on:
  9. * - the islsm (softmac prism54) driver, which is:
  10. * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  11. * - stlc45xx driver
  12. * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License version 2 as
  16. * published by the Free Software Foundation.
  17. */
  18. #include <linux/init.h>
  19. #include <linux/slab.h>
  20. #include <linux/firmware.h>
  21. #include <linux/etherdevice.h>
  22. #include <linux/export.h>
  23. #include <net/mac80211.h>
  24. #include "p54.h"
  25. #include "eeprom.h"
  26. #include "lmac.h"
  27. int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
  28. {
  29. struct p54_common *priv = dev->priv;
  30. struct exp_if *exp_if;
  31. struct bootrec *bootrec;
  32. u32 *data = (u32 *)fw->data;
  33. u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
  34. u8 *fw_version = NULL;
  35. size_t len;
  36. int i;
  37. int maxlen;
  38. if (priv->rx_start)
  39. return 0;
  40. while (data < end_data && *data)
  41. data++;
  42. while (data < end_data && !*data)
  43. data++;
  44. bootrec = (struct bootrec *) data;
  45. while (bootrec->data <= end_data && (bootrec->data +
  46. (len = le32_to_cpu(bootrec->len))) <= end_data) {
  47. u32 code = le32_to_cpu(bootrec->code);
  48. switch (code) {
  49. case BR_CODE_COMPONENT_ID:
  50. priv->fw_interface = be32_to_cpup((__be32 *)
  51. bootrec->data);
  52. switch (priv->fw_interface) {
  53. case FW_LM86:
  54. case FW_LM20:
  55. case FW_LM87: {
  56. char *iftype = (char *)bootrec->data;
  57. wiphy_info(priv->hw->wiphy,
  58. "p54 detected a LM%c%c firmware\n",
  59. iftype[2], iftype[3]);
  60. break;
  61. }
  62. case FW_FMAC:
  63. default:
  64. wiphy_err(priv->hw->wiphy,
  65. "unsupported firmware\n");
  66. return -ENODEV;
  67. }
  68. break;
  69. case BR_CODE_COMPONENT_VERSION:
  70. /* 24 bytes should be enough for all firmwares */
  71. if (strnlen((unsigned char *) bootrec->data, 24) < 24)
  72. fw_version = (unsigned char *) bootrec->data;
  73. break;
  74. case BR_CODE_DESCR: {
  75. struct bootrec_desc *desc =
  76. (struct bootrec_desc *)bootrec->data;
  77. priv->rx_start = le32_to_cpu(desc->rx_start);
  78. /* FIXME add sanity checking */
  79. priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
  80. priv->headroom = desc->headroom;
  81. priv->tailroom = desc->tailroom;
  82. priv->privacy_caps = desc->privacy_caps;
  83. priv->rx_keycache_size = desc->rx_keycache_size;
  84. if (le32_to_cpu(bootrec->len) == 11)
  85. priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
  86. else
  87. priv->rx_mtu = (size_t)
  88. 0x620 - priv->tx_hdr_len;
  89. maxlen = priv->tx_hdr_len + /* USB devices */
  90. sizeof(struct p54_rx_data) +
  91. 4 + /* rx alignment */
  92. IEEE80211_MAX_FRAG_THRESHOLD;
  93. if (priv->rx_mtu > maxlen && PAGE_SIZE == 4096) {
  94. printk(KERN_INFO "p54: rx_mtu reduced from %d "
  95. "to %d\n", priv->rx_mtu, maxlen);
  96. priv->rx_mtu = maxlen;
  97. }
  98. break;
  99. }
  100. case BR_CODE_EXPOSED_IF:
  101. exp_if = (struct exp_if *) bootrec->data;
  102. for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
  103. if (exp_if[i].if_id == cpu_to_le16(IF_ID_LMAC))
  104. priv->fw_var = le16_to_cpu(exp_if[i].variant);
  105. break;
  106. case BR_CODE_DEPENDENT_IF:
  107. break;
  108. case BR_CODE_END_OF_BRA:
  109. case LEGACY_BR_CODE_END_OF_BRA:
  110. end_data = NULL;
  111. break;
  112. default:
  113. break;
  114. }
  115. bootrec = (struct bootrec *)&bootrec->data[len];
  116. }
  117. if (fw_version) {
  118. wiphy_info(priv->hw->wiphy,
  119. "FW rev %s - Softmac protocol %x.%x\n",
  120. fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
  121. snprintf(dev->wiphy->fw_version, sizeof(dev->wiphy->fw_version),
  122. "%s - %x.%x", fw_version,
  123. priv->fw_var >> 8, priv->fw_var & 0xff);
  124. }
  125. if (priv->fw_var < 0x500)
  126. wiphy_info(priv->hw->wiphy,
  127. "you are using an obsolete firmware. "
  128. "visit http://wireless.kernel.org/en/users/Drivers/p54 "
  129. "and grab one for \"kernel >= 2.6.28\"!\n");
  130. if (priv->fw_var >= 0x300) {
  131. /* Firmware supports QoS, use it! */
  132. if (priv->fw_var >= 0x500) {
  133. priv->tx_stats[P54_QUEUE_AC_VO].limit = 16;
  134. priv->tx_stats[P54_QUEUE_AC_VI].limit = 16;
  135. priv->tx_stats[P54_QUEUE_AC_BE].limit = 16;
  136. priv->tx_stats[P54_QUEUE_AC_BK].limit = 16;
  137. } else {
  138. priv->tx_stats[P54_QUEUE_AC_VO].limit = 3;
  139. priv->tx_stats[P54_QUEUE_AC_VI].limit = 4;
  140. priv->tx_stats[P54_QUEUE_AC_BE].limit = 3;
  141. priv->tx_stats[P54_QUEUE_AC_BK].limit = 2;
  142. }
  143. priv->hw->queues = P54_QUEUE_AC_NUM;
  144. }
  145. wiphy_info(priv->hw->wiphy,
  146. "cryptographic accelerator WEP:%s, TKIP:%s, CCMP:%s\n",
  147. (priv->privacy_caps & BR_DESC_PRIV_CAP_WEP) ? "YES" : "no",
  148. (priv->privacy_caps &
  149. (BR_DESC_PRIV_CAP_TKIP | BR_DESC_PRIV_CAP_MICHAEL))
  150. ? "YES" : "no",
  151. (priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP)
  152. ? "YES" : "no");
  153. if (priv->rx_keycache_size) {
  154. /*
  155. * NOTE:
  156. *
  157. * The firmware provides at most 255 (0 - 254) slots
  158. * for keys which are then used to offload decryption.
  159. * As a result the 255 entry (aka 0xff) can be used
  160. * safely by the driver to mark keys that didn't fit
  161. * into the full cache. This trick saves us from
  162. * keeping a extra list for uploaded keys.
  163. */
  164. priv->used_rxkeys = kzalloc(BITS_TO_LONGS(
  165. priv->rx_keycache_size), GFP_KERNEL);
  166. if (!priv->used_rxkeys)
  167. return -ENOMEM;
  168. }
  169. return 0;
  170. }
  171. EXPORT_SYMBOL_GPL(p54_parse_firmware);
  172. static struct sk_buff *p54_alloc_skb(struct p54_common *priv, u16 hdr_flags,
  173. u16 payload_len, u16 type, gfp_t memflags)
  174. {
  175. struct p54_hdr *hdr;
  176. struct sk_buff *skb;
  177. size_t frame_len = sizeof(*hdr) + payload_len;
  178. if (frame_len > P54_MAX_CTRL_FRAME_LEN)
  179. return NULL;
  180. if (unlikely(skb_queue_len(&priv->tx_pending) > 64))
  181. return NULL;
  182. skb = __dev_alloc_skb(priv->tx_hdr_len + frame_len, memflags);
  183. if (!skb)
  184. return NULL;
  185. skb_reserve(skb, priv->tx_hdr_len);
  186. hdr = (struct p54_hdr *) skb_put(skb, sizeof(*hdr));
  187. hdr->flags = cpu_to_le16(hdr_flags);
  188. hdr->len = cpu_to_le16(payload_len);
  189. hdr->type = cpu_to_le16(type);
  190. hdr->tries = hdr->rts_tries = 0;
  191. return skb;
  192. }
  193. int p54_download_eeprom(struct p54_common *priv, void *buf,
  194. u16 offset, u16 len)
  195. {
  196. struct p54_eeprom_lm86 *eeprom_hdr;
  197. struct sk_buff *skb;
  198. size_t eeprom_hdr_size;
  199. int ret = 0;
  200. if (priv->fw_var >= 0x509)
  201. eeprom_hdr_size = sizeof(*eeprom_hdr);
  202. else
  203. eeprom_hdr_size = 0x4;
  204. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL, eeprom_hdr_size +
  205. len, P54_CONTROL_TYPE_EEPROM_READBACK,
  206. GFP_KERNEL);
  207. if (unlikely(!skb))
  208. return -ENOMEM;
  209. mutex_lock(&priv->eeprom_mutex);
  210. priv->eeprom = buf;
  211. eeprom_hdr = (struct p54_eeprom_lm86 *) skb_put(skb,
  212. eeprom_hdr_size + len);
  213. if (priv->fw_var < 0x509) {
  214. eeprom_hdr->v1.offset = cpu_to_le16(offset);
  215. eeprom_hdr->v1.len = cpu_to_le16(len);
  216. } else {
  217. eeprom_hdr->v2.offset = cpu_to_le32(offset);
  218. eeprom_hdr->v2.len = cpu_to_le16(len);
  219. eeprom_hdr->v2.magic2 = 0xf;
  220. memcpy(eeprom_hdr->v2.magic, (const char *)"LOCK", 4);
  221. }
  222. p54_tx(priv, skb);
  223. if (!wait_for_completion_interruptible_timeout(
  224. &priv->eeprom_comp, HZ)) {
  225. wiphy_err(priv->hw->wiphy, "device does not respond!\n");
  226. ret = -EBUSY;
  227. }
  228. priv->eeprom = NULL;
  229. mutex_unlock(&priv->eeprom_mutex);
  230. return ret;
  231. }
  232. int p54_update_beacon_tim(struct p54_common *priv, u16 aid, bool set)
  233. {
  234. struct sk_buff *skb;
  235. struct p54_tim *tim;
  236. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*tim),
  237. P54_CONTROL_TYPE_TIM, GFP_ATOMIC);
  238. if (unlikely(!skb))
  239. return -ENOMEM;
  240. tim = (struct p54_tim *) skb_put(skb, sizeof(*tim));
  241. tim->count = 1;
  242. tim->entry[0] = cpu_to_le16(set ? (aid | 0x8000) : aid);
  243. p54_tx(priv, skb);
  244. return 0;
  245. }
  246. int p54_sta_unlock(struct p54_common *priv, u8 *addr)
  247. {
  248. struct sk_buff *skb;
  249. struct p54_sta_unlock *sta;
  250. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*sta),
  251. P54_CONTROL_TYPE_PSM_STA_UNLOCK, GFP_ATOMIC);
  252. if (unlikely(!skb))
  253. return -ENOMEM;
  254. sta = (struct p54_sta_unlock *)skb_put(skb, sizeof(*sta));
  255. memcpy(sta->addr, addr, ETH_ALEN);
  256. p54_tx(priv, skb);
  257. return 0;
  258. }
  259. int p54_tx_cancel(struct p54_common *priv, __le32 req_id)
  260. {
  261. struct sk_buff *skb;
  262. struct p54_txcancel *cancel;
  263. u32 _req_id = le32_to_cpu(req_id);
  264. if (unlikely(_req_id < priv->rx_start || _req_id > priv->rx_end))
  265. return -EINVAL;
  266. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*cancel),
  267. P54_CONTROL_TYPE_TXCANCEL, GFP_ATOMIC);
  268. if (unlikely(!skb))
  269. return -ENOMEM;
  270. cancel = (struct p54_txcancel *)skb_put(skb, sizeof(*cancel));
  271. cancel->req_id = req_id;
  272. p54_tx(priv, skb);
  273. return 0;
  274. }
  275. int p54_setup_mac(struct p54_common *priv)
  276. {
  277. struct sk_buff *skb;
  278. struct p54_setup_mac *setup;
  279. u16 mode;
  280. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*setup),
  281. P54_CONTROL_TYPE_SETUP, GFP_ATOMIC);
  282. if (!skb)
  283. return -ENOMEM;
  284. setup = (struct p54_setup_mac *) skb_put(skb, sizeof(*setup));
  285. if (!(priv->hw->conf.flags & IEEE80211_CONF_IDLE)) {
  286. switch (priv->mode) {
  287. case NL80211_IFTYPE_STATION:
  288. mode = P54_FILTER_TYPE_STATION;
  289. break;
  290. case NL80211_IFTYPE_AP:
  291. mode = P54_FILTER_TYPE_AP;
  292. break;
  293. case NL80211_IFTYPE_ADHOC:
  294. case NL80211_IFTYPE_MESH_POINT:
  295. mode = P54_FILTER_TYPE_IBSS;
  296. break;
  297. case NL80211_IFTYPE_MONITOR:
  298. mode = P54_FILTER_TYPE_PROMISCUOUS;
  299. break;
  300. default:
  301. mode = P54_FILTER_TYPE_HIBERNATE;
  302. break;
  303. }
  304. /*
  305. * "TRANSPARENT and PROMISCUOUS are mutually exclusive"
  306. * STSW45X0C LMAC API - page 12
  307. */
  308. if (((priv->filter_flags & FIF_PROMISC_IN_BSS) ||
  309. (priv->filter_flags & FIF_OTHER_BSS)) &&
  310. (mode != P54_FILTER_TYPE_PROMISCUOUS))
  311. mode |= P54_FILTER_TYPE_TRANSPARENT;
  312. } else {
  313. mode = P54_FILTER_TYPE_HIBERNATE;
  314. }
  315. setup->mac_mode = cpu_to_le16(mode);
  316. memcpy(setup->mac_addr, priv->mac_addr, ETH_ALEN);
  317. memcpy(setup->bssid, priv->bssid, ETH_ALEN);
  318. setup->rx_antenna = 2 & priv->rx_diversity_mask; /* automatic */
  319. setup->rx_align = 0;
  320. if (priv->fw_var < 0x500) {
  321. setup->v1.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  322. memset(setup->v1.rts_rates, 0, 8);
  323. setup->v1.rx_addr = cpu_to_le32(priv->rx_end);
  324. setup->v1.max_rx = cpu_to_le16(priv->rx_mtu);
  325. setup->v1.rxhw = cpu_to_le16(priv->rxhw);
  326. setup->v1.wakeup_timer = cpu_to_le16(priv->wakeup_timer);
  327. setup->v1.unalloc0 = cpu_to_le16(0);
  328. } else {
  329. setup->v2.rx_addr = cpu_to_le32(priv->rx_end);
  330. setup->v2.max_rx = cpu_to_le16(priv->rx_mtu);
  331. setup->v2.rxhw = cpu_to_le16(priv->rxhw);
  332. setup->v2.timer = cpu_to_le16(priv->wakeup_timer);
  333. setup->v2.truncate = cpu_to_le16(48896);
  334. setup->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  335. setup->v2.sbss_offset = 0;
  336. setup->v2.mcast_window = 0;
  337. setup->v2.rx_rssi_threshold = 0;
  338. setup->v2.rx_ed_threshold = 0;
  339. setup->v2.ref_clock = cpu_to_le32(644245094);
  340. setup->v2.lpf_bandwidth = cpu_to_le16(65535);
  341. setup->v2.osc_start_delay = cpu_to_le16(65535);
  342. }
  343. p54_tx(priv, skb);
  344. priv->phy_idle = mode == P54_FILTER_TYPE_HIBERNATE;
  345. return 0;
  346. }
  347. int p54_scan(struct p54_common *priv, u16 mode, u16 dwell)
  348. {
  349. struct sk_buff *skb;
  350. struct p54_hdr *hdr;
  351. struct p54_scan_head *head;
  352. struct p54_iq_autocal_entry *iq_autocal;
  353. union p54_scan_body_union *body;
  354. struct p54_scan_tail_rate *rate;
  355. struct pda_rssi_cal_entry *rssi;
  356. struct p54_rssi_db_entry *rssi_data;
  357. unsigned int i;
  358. void *entry;
  359. __le16 freq = cpu_to_le16(priv->hw->conf.channel->center_freq);
  360. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*head) +
  361. 2 + sizeof(*iq_autocal) + sizeof(*body) +
  362. sizeof(*rate) + 2 * sizeof(*rssi),
  363. P54_CONTROL_TYPE_SCAN, GFP_ATOMIC);
  364. if (!skb)
  365. return -ENOMEM;
  366. head = (struct p54_scan_head *) skb_put(skb, sizeof(*head));
  367. memset(head->scan_params, 0, sizeof(head->scan_params));
  368. head->mode = cpu_to_le16(mode);
  369. head->dwell = cpu_to_le16(dwell);
  370. head->freq = freq;
  371. if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
  372. __le16 *pa_power_points = (__le16 *) skb_put(skb, 2);
  373. *pa_power_points = cpu_to_le16(0x0c);
  374. }
  375. iq_autocal = (void *) skb_put(skb, sizeof(*iq_autocal));
  376. for (i = 0; i < priv->iq_autocal_len; i++) {
  377. if (priv->iq_autocal[i].freq != freq)
  378. continue;
  379. memcpy(iq_autocal, &priv->iq_autocal[i].params,
  380. sizeof(struct p54_iq_autocal_entry));
  381. break;
  382. }
  383. if (i == priv->iq_autocal_len)
  384. goto err;
  385. if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW)
  386. body = (void *) skb_put(skb, sizeof(body->longbow));
  387. else
  388. body = (void *) skb_put(skb, sizeof(body->normal));
  389. for (i = 0; i < priv->output_limit->entries; i++) {
  390. __le16 *entry_freq = (void *) (priv->output_limit->data +
  391. priv->output_limit->entry_size * i);
  392. if (*entry_freq != freq)
  393. continue;
  394. if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
  395. memcpy(&body->longbow.power_limits,
  396. (void *) entry_freq + sizeof(__le16),
  397. priv->output_limit->entry_size);
  398. } else {
  399. struct pda_channel_output_limit *limits =
  400. (void *) entry_freq;
  401. body->normal.val_barker = 0x38;
  402. body->normal.val_bpsk = body->normal.dup_bpsk =
  403. limits->val_bpsk;
  404. body->normal.val_qpsk = body->normal.dup_qpsk =
  405. limits->val_qpsk;
  406. body->normal.val_16qam = body->normal.dup_16qam =
  407. limits->val_16qam;
  408. body->normal.val_64qam = body->normal.dup_64qam =
  409. limits->val_64qam;
  410. }
  411. break;
  412. }
  413. if (i == priv->output_limit->entries)
  414. goto err;
  415. entry = (void *)(priv->curve_data->data + priv->curve_data->offset);
  416. for (i = 0; i < priv->curve_data->entries; i++) {
  417. if (*((__le16 *)entry) != freq) {
  418. entry += priv->curve_data->entry_size;
  419. continue;
  420. }
  421. if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
  422. memcpy(&body->longbow.curve_data,
  423. entry + sizeof(__le16),
  424. priv->curve_data->entry_size);
  425. } else {
  426. struct p54_scan_body *chan = &body->normal;
  427. struct pda_pa_curve_data *curve_data =
  428. (void *) priv->curve_data->data;
  429. entry += sizeof(__le16);
  430. chan->pa_points_per_curve = 8;
  431. memset(chan->curve_data, 0, sizeof(*chan->curve_data));
  432. memcpy(chan->curve_data, entry,
  433. sizeof(struct p54_pa_curve_data_sample) *
  434. min((u8)8, curve_data->points_per_channel));
  435. }
  436. break;
  437. }
  438. if (i == priv->curve_data->entries)
  439. goto err;
  440. if ((priv->fw_var >= 0x500) && (priv->fw_var < 0x509)) {
  441. rate = (void *) skb_put(skb, sizeof(*rate));
  442. rate->basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  443. for (i = 0; i < sizeof(rate->rts_rates); i++)
  444. rate->rts_rates[i] = i;
  445. }
  446. rssi = (struct pda_rssi_cal_entry *) skb_put(skb, sizeof(*rssi));
  447. rssi_data = p54_rssi_find(priv, le16_to_cpu(freq));
  448. rssi->mul = cpu_to_le16(rssi_data->mul);
  449. rssi->add = cpu_to_le16(rssi_data->add);
  450. if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
  451. /* Longbow frontend needs ever more */
  452. rssi = (void *) skb_put(skb, sizeof(*rssi));
  453. rssi->mul = cpu_to_le16(rssi_data->longbow_unkn);
  454. rssi->add = cpu_to_le16(rssi_data->longbow_unk2);
  455. }
  456. if (priv->fw_var >= 0x509) {
  457. rate = (void *) skb_put(skb, sizeof(*rate));
  458. rate->basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  459. for (i = 0; i < sizeof(rate->rts_rates); i++)
  460. rate->rts_rates[i] = i;
  461. }
  462. hdr = (struct p54_hdr *) skb->data;
  463. hdr->len = cpu_to_le16(skb->len - sizeof(*hdr));
  464. p54_tx(priv, skb);
  465. priv->cur_rssi = rssi_data;
  466. return 0;
  467. err:
  468. wiphy_err(priv->hw->wiphy, "frequency change to channel %d failed.\n",
  469. ieee80211_frequency_to_channel(
  470. priv->hw->conf.channel->center_freq));
  471. dev_kfree_skb_any(skb);
  472. return -EINVAL;
  473. }
  474. int p54_set_leds(struct p54_common *priv)
  475. {
  476. struct sk_buff *skb;
  477. struct p54_led *led;
  478. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*led),
  479. P54_CONTROL_TYPE_LED, GFP_ATOMIC);
  480. if (unlikely(!skb))
  481. return -ENOMEM;
  482. led = (struct p54_led *) skb_put(skb, sizeof(*led));
  483. led->flags = cpu_to_le16(0x0003);
  484. led->mask[0] = led->mask[1] = cpu_to_le16(priv->softled_state);
  485. led->delay[0] = cpu_to_le16(1);
  486. led->delay[1] = cpu_to_le16(0);
  487. p54_tx(priv, skb);
  488. return 0;
  489. }
  490. int p54_set_edcf(struct p54_common *priv)
  491. {
  492. struct sk_buff *skb;
  493. struct p54_edcf *edcf;
  494. u8 rtd;
  495. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*edcf),
  496. P54_CONTROL_TYPE_DCFINIT, GFP_ATOMIC);
  497. if (unlikely(!skb))
  498. return -ENOMEM;
  499. edcf = (struct p54_edcf *)skb_put(skb, sizeof(*edcf));
  500. if (priv->use_short_slot) {
  501. edcf->slottime = 9;
  502. edcf->sifs = 0x10;
  503. edcf->eofpad = 0x00;
  504. } else {
  505. edcf->slottime = 20;
  506. edcf->sifs = 0x0a;
  507. edcf->eofpad = 0x06;
  508. }
  509. /*
  510. * calculate the extra round trip delay according to the
  511. * formula from 802.11-2007 17.3.8.6.
  512. */
  513. rtd = 3 * priv->coverage_class;
  514. edcf->slottime += rtd;
  515. edcf->round_trip_delay = cpu_to_le16(rtd);
  516. /* (see prism54/isl_oid.h for further details) */
  517. edcf->frameburst = cpu_to_le16(0);
  518. edcf->flags = 0;
  519. memset(edcf->mapping, 0, sizeof(edcf->mapping));
  520. memcpy(edcf->queue, priv->qos_params, sizeof(edcf->queue));
  521. p54_tx(priv, skb);
  522. return 0;
  523. }
  524. int p54_set_ps(struct p54_common *priv)
  525. {
  526. struct sk_buff *skb;
  527. struct p54_psm *psm;
  528. unsigned int i;
  529. u16 mode;
  530. if (priv->hw->conf.flags & IEEE80211_CONF_PS &&
  531. !priv->powersave_override)
  532. mode = P54_PSM | P54_PSM_BEACON_TIMEOUT | P54_PSM_DTIM |
  533. P54_PSM_CHECKSUM | P54_PSM_MCBC;
  534. else
  535. mode = P54_PSM_CAM;
  536. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*psm),
  537. P54_CONTROL_TYPE_PSM, GFP_ATOMIC);
  538. if (!skb)
  539. return -ENOMEM;
  540. psm = (struct p54_psm *)skb_put(skb, sizeof(*psm));
  541. psm->mode = cpu_to_le16(mode);
  542. psm->aid = cpu_to_le16(priv->aid);
  543. for (i = 0; i < ARRAY_SIZE(psm->intervals); i++) {
  544. psm->intervals[i].interval =
  545. cpu_to_le16(priv->hw->conf.listen_interval);
  546. psm->intervals[i].periods = cpu_to_le16(1);
  547. }
  548. psm->beacon_rssi_skip_max = 200;
  549. psm->rssi_delta_threshold = 0;
  550. psm->nr = 1;
  551. psm->exclude[0] = WLAN_EID_TIM;
  552. p54_tx(priv, skb);
  553. priv->phy_ps = mode != P54_PSM_CAM;
  554. return 0;
  555. }
  556. int p54_init_xbow_synth(struct p54_common *priv)
  557. {
  558. struct sk_buff *skb;
  559. struct p54_xbow_synth *xbow;
  560. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*xbow),
  561. P54_CONTROL_TYPE_XBOW_SYNTH_CFG, GFP_KERNEL);
  562. if (unlikely(!skb))
  563. return -ENOMEM;
  564. xbow = (struct p54_xbow_synth *)skb_put(skb, sizeof(*xbow));
  565. xbow->magic1 = cpu_to_le16(0x1);
  566. xbow->magic2 = cpu_to_le16(0x2);
  567. xbow->freq = cpu_to_le16(5390);
  568. memset(xbow->padding, 0, sizeof(xbow->padding));
  569. p54_tx(priv, skb);
  570. return 0;
  571. }
  572. int p54_upload_key(struct p54_common *priv, u8 algo, int slot, u8 idx, u8 len,
  573. u8 *addr, u8* key)
  574. {
  575. struct sk_buff *skb;
  576. struct p54_keycache *rxkey;
  577. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*rxkey),
  578. P54_CONTROL_TYPE_RX_KEYCACHE, GFP_KERNEL);
  579. if (unlikely(!skb))
  580. return -ENOMEM;
  581. rxkey = (struct p54_keycache *)skb_put(skb, sizeof(*rxkey));
  582. rxkey->entry = slot;
  583. rxkey->key_id = idx;
  584. rxkey->key_type = algo;
  585. if (addr)
  586. memcpy(rxkey->mac, addr, ETH_ALEN);
  587. else
  588. memset(rxkey->mac, ~0, ETH_ALEN);
  589. switch (algo) {
  590. case P54_CRYPTO_WEP:
  591. case P54_CRYPTO_AESCCMP:
  592. rxkey->key_len = min_t(u8, 16, len);
  593. memcpy(rxkey->key, key, rxkey->key_len);
  594. break;
  595. case P54_CRYPTO_TKIPMICHAEL:
  596. rxkey->key_len = 24;
  597. memcpy(rxkey->key, key, 16);
  598. memcpy(&(rxkey->key[16]), &(key
  599. [NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY]), 8);
  600. break;
  601. case P54_CRYPTO_NONE:
  602. rxkey->key_len = 0;
  603. memset(rxkey->key, 0, sizeof(rxkey->key));
  604. break;
  605. default:
  606. wiphy_err(priv->hw->wiphy,
  607. "invalid cryptographic algorithm: %d\n", algo);
  608. dev_kfree_skb(skb);
  609. return -EINVAL;
  610. }
  611. p54_tx(priv, skb);
  612. return 0;
  613. }
  614. int p54_fetch_statistics(struct p54_common *priv)
  615. {
  616. struct ieee80211_tx_info *txinfo;
  617. struct p54_tx_info *p54info;
  618. struct sk_buff *skb;
  619. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL,
  620. sizeof(struct p54_statistics),
  621. P54_CONTROL_TYPE_STAT_READBACK, GFP_KERNEL);
  622. if (!skb)
  623. return -ENOMEM;
  624. /*
  625. * The statistic feedback causes some extra headaches here, if it
  626. * is not to crash/corrupt the firmware data structures.
  627. *
  628. * Unlike all other Control Get OIDs we can not use helpers like
  629. * skb_put to reserve the space for the data we're requesting.
  630. * Instead the extra frame length -which will hold the results later-
  631. * will only be told to the p54_assign_address, so that following
  632. * frames won't be placed into the allegedly empty area.
  633. */
  634. txinfo = IEEE80211_SKB_CB(skb);
  635. p54info = (void *) txinfo->rate_driver_data;
  636. p54info->extra_len = sizeof(struct p54_statistics);
  637. p54_tx(priv, skb);
  638. return 0;
  639. }
  640. int p54_set_groupfilter(struct p54_common *priv)
  641. {
  642. struct p54_group_address_table *grp;
  643. struct sk_buff *skb;
  644. bool on = false;
  645. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*grp),
  646. P54_CONTROL_TYPE_GROUP_ADDRESS_TABLE, GFP_KERNEL);
  647. if (!skb)
  648. return -ENOMEM;
  649. grp = (struct p54_group_address_table *)skb_put(skb, sizeof(*grp));
  650. on = !(priv->filter_flags & FIF_ALLMULTI) &&
  651. (priv->mc_maclist_num > 0 &&
  652. priv->mc_maclist_num <= MC_FILTER_ADDRESS_NUM);
  653. if (on) {
  654. grp->filter_enable = cpu_to_le16(1);
  655. grp->num_address = cpu_to_le16(priv->mc_maclist_num);
  656. memcpy(grp->mac_list, priv->mc_maclist, sizeof(grp->mac_list));
  657. } else {
  658. grp->filter_enable = cpu_to_le16(0);
  659. grp->num_address = cpu_to_le16(0);
  660. memset(grp->mac_list, 0, sizeof(grp->mac_list));
  661. }
  662. p54_tx(priv, skb);
  663. return 0;
  664. }